mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-03 20:54:32 +02:00
esp32h2: add some more fixes and TODOs
This commit is contained in:
2
Kconfig
2
Kconfig
@@ -68,7 +68,7 @@ mainmenu "Espressif IoT Development Framework Configuration"
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default 0x0002 if IDF_TARGET_ESP32S2
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default 0x0002 if IDF_TARGET_ESP32S2
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default 0x0005 if IDF_TARGET_ESP32C3
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default 0x0005 if IDF_TARGET_ESP32C3
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default 0x0009 if IDF_TARGET_ESP32S3
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default 0x0009 if IDF_TARGET_ESP32S3
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default 0x000A if IDF_TARGET_ESP32H2
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default 0x000A if IDF_TARGET_ESP32H2 # ESP32H2-TODO: IDF-3475
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default 0xFFFF
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default 0xFFFF
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menu "SDK tool configuration"
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menu "SDK tool configuration"
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@@ -170,7 +170,6 @@ SECTIONS
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}
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}
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/* ESP32H2-TODO: IDF-3466 */
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/**
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/**
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* Appendix: Memory Usage of ROM bootloader
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* Appendix: Memory Usage of ROM bootloader
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*
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*
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@@ -16,7 +16,7 @@ typedef enum {
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ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
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ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
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ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
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ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
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ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
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ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
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ESP_CHIP_ID_ESP32H2 = 0x000A, /*!< chip ID: ESP32-H2 */
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ESP_CHIP_ID_ESP32H2 = 0x000A, /*!< chip ID: ESP32-H2 */ // ESP32H2-TODO: IDF-3475
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ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
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ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
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} __attribute__((packed)) esp_chip_id_t;
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} __attribute__((packed)) esp_chip_id_t;
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@@ -28,6 +28,7 @@ esp_err_t esp_event_send_noop(system_event_t *event)
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return ESP_OK;
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return ESP_OK;
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}
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}
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#if CONFIG_ESP32_WIFI_ENABLED
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static system_event_id_t esp_event_legacy_wifi_event_id(int32_t event_id)
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static system_event_id_t esp_event_legacy_wifi_event_id(int32_t event_id)
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{
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{
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switch (event_id) {
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switch (event_id) {
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@@ -102,6 +103,7 @@ static system_event_id_t esp_event_legacy_wifi_event_id(int32_t event_id)
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return SYSTEM_EVENT_MAX;
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return SYSTEM_EVENT_MAX;
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}
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}
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}
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}
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#endif // CONFIG_ESP32_WIFI_ENABLED
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static system_event_id_t esp_event_legacy_ip_event_id(int32_t event_id)
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static system_event_id_t esp_event_legacy_ip_event_id(int32_t event_id)
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{
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{
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@@ -133,9 +135,13 @@ static system_event_id_t esp_event_legacy_ip_event_id(int32_t event_id)
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static system_event_id_t esp_event_legacy_event_id(esp_event_base_t event_base, int32_t event_id)
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static system_event_id_t esp_event_legacy_event_id(esp_event_base_t event_base, int32_t event_id)
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{
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{
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#if CONFIG_ESP32_WIFI_ENABLED
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if (event_base == WIFI_EVENT) {
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if (event_base == WIFI_EVENT) {
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return esp_event_legacy_wifi_event_id(event_id);
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return esp_event_legacy_wifi_event_id(event_id);
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} else if (event_base == IP_EVENT) {
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}
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#endif
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if (event_base == IP_EVENT) {
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return esp_event_legacy_ip_event_id(event_id);
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return esp_event_legacy_ip_event_id(event_id);
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} else {
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} else {
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ESP_LOGE(TAG, "invalid event base %s", event_base);
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ESP_LOGE(TAG, "invalid event base %s", event_base);
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@@ -8,7 +8,7 @@ menu "Wi-Fi"
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config ESP32_WIFI_SW_COEXIST_ENABLE
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config ESP32_WIFI_SW_COEXIST_ENABLE
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bool "Software controls WiFi/Bluetooth coexistence"
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bool "Software controls WiFi/Bluetooth coexistence"
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depends on BT_ENABLED
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depends on ESP32_WIFI_ENABLED && BT_ENABLED
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default y
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default y
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help
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help
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If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
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If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
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@@ -444,7 +444,8 @@ static inline void adc_ll_digi_reset(void)
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static inline void adc_ll_pwdet_set_cct(uint32_t cct)
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static inline void adc_ll_pwdet_set_cct(uint32_t cct)
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{
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{
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/* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
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/* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
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// RTCCNTL.sensor_ctrl.sar2_pwdet_cct = cct; // ESP32H2-TODO: IDF-3389
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// RTCCNTL.sensor_ctrl.sar2_pwdet_cct = cct;
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abort(); // ESP32H2-TODO: IDF-3389
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}
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}
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/**
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/**
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@@ -457,7 +458,8 @@ static inline uint32_t adc_ll_pwdet_get_cct(void)
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{
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{
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/* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
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/* Capacitor tuning of the PA power monitor. cct set to the same value with PHY. */
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// return RTCCNTL.sensor_ctrl.sar2_pwdet_cct;
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// return RTCCNTL.sensor_ctrl.sar2_pwdet_cct;
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return 0; // ESP32H2-TODO: IDF-3389
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abort(); // ESP32H2-TODO: IDF-3389
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return 0;
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}
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}
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/**
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/**
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@@ -15,8 +15,8 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "soc/rmt_struct.h"
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#include "soc/rmt_struct.h"
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#include "soc/soc_caps.h"
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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@@ -279,6 +279,15 @@ static inline uint32_t rmt_ll_rx_get_limit(rmt_dev_t *dev, uint32_t channel)
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return dev->rx_lim[channel].rx_lim;
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return dev->rx_lim[channel].rx_lim;
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}
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}
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static inline void rmt_ll_enable_interrupt(rmt_dev_t *dev, uint32_t mask, bool enable)
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{
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if (enable) {
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dev->int_ena.val |= mask;
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} else {
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dev->int_ena.val &= ~mask;
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}
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}
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static inline void rmt_ll_enable_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
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static inline void rmt_ll_enable_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
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{
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{
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if (enable) {
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if (enable) {
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@@ -469,12 +478,14 @@ static inline void rmt_ll_tx_set_carrier_always_on(rmt_dev_t *dev, uint32_t chan
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dev->tx_conf[channel].carrier_eff_en = !enable;
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dev->tx_conf[channel].carrier_eff_en = !enable;
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}
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}
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//Writes items to the specified TX channel memory with the given offset and writen length.
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//Writes items to the specified TX channel memory with the given offset and length.
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//the caller should ensure that (length + off) <= (memory block * SOC_RMT_MEM_WORDS_PER_CHANNEL)
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//the caller should ensure that (length + off) <= (memory block * SOC_RMT_MEM_WORDS_PER_CHANNEL)
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static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const rmt_item32_t *data, uint32_t length, uint32_t off)
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static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const void *data, size_t length_in_words, size_t off)
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{
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{
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for (uint32_t i = 0; i < length; i++) {
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volatile uint32_t *to = (volatile uint32_t *)&mem->chan[channel].data32[off];
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mem->chan[channel].data32[i + off].val = data[i].val;
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uint32_t *from = (uint32_t *)data;
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while (length_in_words--) {
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*to++ = *from++;
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}
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}
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}
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}
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@@ -483,20 +494,6 @@ static inline void rmt_ll_rx_enable_pingpong(rmt_dev_t *dev, uint32_t channel, b
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dev->rx_conf[channel].conf1.mem_rx_wrap_en = enable;
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dev->rx_conf[channel].conf1.mem_rx_wrap_en = enable;
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}
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}
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/************************************************************************************************
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* Following Low Level APIs only used for backward compatible, will be deprecated in the IDF v5.0
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***********************************************************************************************/
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static inline void rmt_ll_set_intr_enable_mask(uint32_t mask)
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{
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RMT.int_ena.val |= mask;
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}
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static inline void rmt_ll_clr_intr_enable_mask(uint32_t mask)
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{
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RMT.int_ena.val &= (~mask);
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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@@ -37,7 +37,7 @@
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#endif
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 27400
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B 0
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#endif
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#endif
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
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#ifndef IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 53600
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#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B 53600
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@@ -1,5 +1,6 @@
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idf_build_get_property(target IDF_TARGET)
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idf_build_get_property(target IDF_TARGET)
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# should test arch here not target: IDF-1754
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if(NOT "${target}" STREQUAL "esp32c3" AND NOT "${target}" STREQUAL "esp32h2")
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if(NOT "${target}" STREQUAL "esp32c3" AND NOT "${target}" STREQUAL "esp32h2")
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return()
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return()
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endif()
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endif()
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@@ -315,9 +315,7 @@
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#define ETS_FRC1_INUM 22
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#define ETS_FRC1_INUM 22
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#define ETS_T1_WDT_INUM 24
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#define ETS_T1_WDT_INUM 24
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#define ETS_CACHEERR_INUM 25
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#define ETS_CACHEERR_INUM 25
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#ifdef CONFIG_IDF_TARGET_ESP32C3
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#define ETS_MEMPROT_ERR_INUM 26
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#define ETS_MEMPROT_ERR_INUM 26
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#endif
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#define ETS_DPORT_INUM 28
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#define ETS_DPORT_INUM 28
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//CPU0 Max valid interrupt number
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//CPU0 Max valid interrupt number
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@@ -346,9 +346,7 @@
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#define ETS_FRC1_INUM 22
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#define ETS_FRC1_INUM 22
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#define ETS_T1_WDT_INUM 24
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#define ETS_T1_WDT_INUM 24
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#define ETS_CACHEERR_INUM 25
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#define ETS_CACHEERR_INUM 25
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#ifdef CONFIG_IDF_TARGET_ESP32H2
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#define ETS_MEMPROT_ERR_INUM 26
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#define ETS_MEMPROT_ERR_INUM 26
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#endif
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#define ETS_DPORT_INUM 28
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#define ETS_DPORT_INUM 28
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//CPU0 Max valid interrupt number
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//CPU0 Max valid interrupt number
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@@ -16,24 +16,28 @@
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#include "soc/gpio_sig_map.h"
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#include "soc/gpio_sig_map.h"
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const rmt_signal_conn_t rmt_periph_signals = {
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const rmt_signal_conn_t rmt_periph_signals = {
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.module = PERIPH_RMT_MODULE,
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.groups = {
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.irq = ETS_RMT_INTR_SOURCE,
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.channels = {
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[0] = {
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[0] = {
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.tx_sig = RMT_SIG_OUT0_IDX,
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.module = PERIPH_RMT_MODULE,
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.rx_sig = -1
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.irq = ETS_RMT_INTR_SOURCE,
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},
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.channels = {
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[1] = {
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[0] = {
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.tx_sig = RMT_SIG_OUT1_IDX,
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.tx_sig = RMT_SIG_OUT0_IDX,
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.rx_sig = -1
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.rx_sig = -1
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},
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},
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[2] = {
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[1] = {
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.tx_sig = -1,
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.tx_sig = RMT_SIG_OUT1_IDX,
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.rx_sig = RMT_SIG_IN0_IDX
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.rx_sig = -1
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},
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},
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[3] = {
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[2] = {
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.tx_sig = -1,
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.tx_sig = -1,
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.rx_sig = RMT_SIG_IN1_IDX
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.rx_sig = RMT_SIG_IN0_IDX
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},
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},
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[3] = {
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.tx_sig = -1,
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.rx_sig = RMT_SIG_IN1_IDX
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},
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}
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}
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}
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}
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};
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};
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@@ -1,5 +1,6 @@
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idf_build_get_property(target IDF_TARGET)
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idf_build_get_property(target IDF_TARGET)
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# should test arch here not target: IDF-1754
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if("${target}" STREQUAL "esp32c3" OR "${target}" STREQUAL "esp32h2")
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if("${target}" STREQUAL "esp32c3" OR "${target}" STREQUAL "esp32h2")
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return()
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return()
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endif()
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endif()
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@@ -11,7 +11,7 @@ function(__add_uf2_targets)
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elseif("${target}" STREQUAL "esp32s3")
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elseif("${target}" STREQUAL "esp32s3")
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set(uf2_family_id "0xc47e5767")
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set(uf2_family_id "0xc47e5767")
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elseif("${target}" STREQUAL "esp32h2")
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elseif("${target}" STREQUAL "esp32h2")
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set(uf2_family_id "0xd42ba06c")
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set(uf2_family_id "0xd42ba06c") # ESP32H2-TODO: IDF-3487
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elseif("${target}" STREQUAL "linux")
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elseif("${target}" STREQUAL "linux")
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return()
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return()
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else()
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else()
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@@ -36,6 +36,6 @@ GENERATORS = collections.OrderedDict([
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})
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})
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])
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])
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SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3', 'esp32h2']
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SUPPORTED_TARGETS = ['esp32', 'esp32s2', 'esp32c3', 'esp32s3']
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PREVIEW_TARGETS = ['linux']
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PREVIEW_TARGETS = ['linux', 'esp32h2']
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Block a user