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esp32c2: remove AES related configs, hardware AES not supported on this chip

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This commit is contained in:
Mahavir Jain
2022-03-18 19:04:46 +05:30
committed by BOT
parent 169430faf3
commit 75eb97fc94
3 changed files with 0 additions and 15 deletions
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8
components/soc/esp32c2/include/soc/Kconfig.soc_caps.in
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@@ -75,14 +75,6 @@ config SOC_ECC_SUPPORTED
bool bool
default y default y
config SOC_AES_SUPPORT_DMA
bool
default y
config SOC_AES_GDMA
bool
default y
config SOC_ADC_DIG_CTRL_SUPPORTED config SOC_ADC_DIG_CTRL_SUPPORTED
bool bool
default y default y

1
components/soc/esp32c2/include/soc/gdma_channel.h
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@@ -10,6 +10,5 @@
#define SOC_GDMA_TRIG_PERIPH_M2M0 (-1) #define SOC_GDMA_TRIG_PERIPH_M2M0 (-1)
#define SOC_GDMA_TRIG_PERIPH_SPI2 (0) #define SOC_GDMA_TRIG_PERIPH_SPI2 (0)
#define SOC_GDMA_TRIG_PERIPH_UART0 (2) #define SOC_GDMA_TRIG_PERIPH_UART0 (2)
#define SOC_GDMA_TRIG_PERIPH_AES0 (6)
#define SOC_GDMA_TRIG_PERIPH_SHA0 (7) #define SOC_GDMA_TRIG_PERIPH_SHA0 (7)
#define SOC_GDMA_TRIG_PERIPH_ADC0 (8) #define SOC_GDMA_TRIG_PERIPH_ADC0 (8)

6
components/soc/esp32c2/include/soc/soc_caps.h
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@@ -44,12 +44,6 @@
#define SOC_SHA_SUPPORTED 1 #define SOC_SHA_SUPPORTED 1
#define SOC_ECC_SUPPORTED 1 #define SOC_ECC_SUPPORTED 1
/*-------------------------- AES CAPS -----------------------------------------*/
#define SOC_AES_SUPPORT_DMA (1)
/* Has a centralized DMA, which is shared with all peripherals */
#define SOC_AES_GDMA (1)
/*-------------------------- ADC CAPS -------------------------------*/ /*-------------------------- ADC CAPS -------------------------------*/
/*!< SAR ADC Module*/ /*!< SAR ADC Module*/
#define SOC_ADC_DIG_CTRL_SUPPORTED 1 #define SOC_ADC_DIG_CTRL_SUPPORTED 1