From df6a32f305a635d2025c03b300787d6f336c5d7e Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Mon, 26 Feb 2024 15:20:14 +0800 Subject: [PATCH] fix(esp_hw_support): fix cache safe check function --- components/esp_hw_support/Kconfig | 1 + components/esp_hw_support/sleep_modes.c | 9 +++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig index 67b9bfc707..80a684a830 100644 --- a/components/esp_hw_support/Kconfig +++ b/components/esp_hw_support/Kconfig @@ -173,6 +173,7 @@ menu "Hardware Settings" config ESP_SLEEP_CACHE_SAFE_ASSERTION bool "Check the cache safety of the sleep wakeup code in sleep process" default n + select ESP_PANIC_HANDLER_IRAM help Enabling it will check the cache safety of the code before the flash power is ready after light sleep wakeup, and check PM_SLP_IRAM_OPT related code cache safety. This option is diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 6222dca02f..625b64a411 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -507,7 +507,12 @@ FORCE_INLINE_ATTR bool light_sleep_uart_prepare(uint32_t pd_flags, int64_t sleep #if !SOC_PM_SUPPORT_TOP_PD || !CONFIG_ESP_CONSOLE_UART suspend_uarts(); #else - if (pd_flags & PMU_SLEEP_PD_TOP) { +#ifdef CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION +#define FORCE_FLUSH_CONSOLE_UART 1 +#else +#define FORCE_FLUSH_CONSOLE_UART 0 +#endif + if (FORCE_FLUSH_CONSOLE_UART || (pd_flags & PMU_SLEEP_PD_TOP)) { if ((s_config.wakeup_triggers & RTC_TIMER_TRIG_EN) && // +1 is for cover the last character flush time (sleep_duration < (int64_t)((UART_LL_FIFO_DEF_LEN - uart_ll_get_txfifo_len(CONSOLE_UART_DEV) + 1) * UART_FLUSH_US_PER_CHAR) + SLEEP_UART_FLUSH_DONE_TO_SLEEP_US)) {