diff --git a/components/spi_flash/flash_ops.c b/components/spi_flash/flash_ops.c
index e2ba3b6ed9..dccba2e0fe 100644
--- a/components/spi_flash/flash_ops.c
+++ b/components/spi_flash/flash_ops.c
@@ -150,8 +150,18 @@ void IRAM_ATTR esp_mspi_pin_init(void)
 #endif
     /* Reserve the GPIO pins */
     uint64_t reserve_pin_mask = 0;
+    uint8_t mspi_io;
     for (esp_mspi_io_t i = 0; i < ESP_MSPI_IO_MAX; i++) {
-        reserve_pin_mask |= BIT64(esp_mspi_get_io(i));
+#if SOC_SPI_MEM_SUPPORT_OPI_MODE
+        if (!bootloader_flash_is_octal_mode_enabled()
+            && i >=  ESP_MSPI_IO_DQS && i <= ESP_MSPI_IO_D7) {
+            continue;
+        }
+#endif
+        mspi_io = esp_mspi_get_io(i);
+        if (mspi_io < 64) {     // 'reserve_pin_mask' have 64 bits length
+            reserve_pin_mask |= BIT64(mspi_io);
+        }
     }
     esp_gpio_reserve_pins(reserve_pin_mask);
 }