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CI: minor testcases fixes and disable some cases that cant run on S3

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This commit is contained in:
Marius Vikhammer
2021-06-09 16:38:22 +08:00
parent d9f5126d24
commit 79b5dedeb1
11 changed files with 53 additions and 17 deletions
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4
components/driver/test/test_dedicated_gpio.c
View File

@@ -58,6 +58,8 @@ TEST_CASE("Dedicated GPIO bundle install/uninstall", "[dedic_gpio]")
#define TEST_GPIO_GROUP_SIZE (4)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// TODO ESP32-S3 IDF-3387
typedef struct {
SemaphoreHandle_t sem;
const int gpios[TEST_GPIO_GROUP_SIZE];
@@ -159,6 +161,8 @@ TEST_CASE("Dedicated GPIO run on multiple CPU core", "[dedic_gpio]")
vSemaphoreDelete(sem);
}
#endif //#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
IRAM_ATTR static void test_dedic_gpio_isr_callback(void *args)
{
SemaphoreHandle_t sem = (SemaphoreHandle_t)args;

8
components/driver/test/test_gdma.c
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@@ -26,6 +26,12 @@ TEST_CASE("GDMA channel allocation", "[gdma]")
};
TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, gdma_new_channel(&channel_config, &tx_channels[0]));
// Free interrupts before installing RX interrupts to ensure enough free interrupts
for (int i = 0; i < SOC_GDMA_PAIRS_PER_GROUP; i++) {
TEST_ESP_OK(gdma_disconnect(tx_channels[i]));
TEST_ESP_OK(gdma_del_channel(tx_channels[i]));
}
// install RX channels for different peripherals
channel_config.direction = GDMA_CHANNEL_DIRECTION_RX;
for (int i = 0; i < SOC_GDMA_PAIRS_PER_GROUP; i++) {
@@ -36,9 +42,7 @@ TEST_CASE("GDMA channel allocation", "[gdma]")
TEST_ASSERT_EQUAL(ESP_ERR_NOT_FOUND, gdma_new_channel(&channel_config, &rx_channels[0]));
for (int i = 0; i < SOC_GDMA_PAIRS_PER_GROUP; i++) {
TEST_ESP_OK(gdma_disconnect(tx_channels[i]));
TEST_ESP_OK(gdma_disconnect(rx_channels[i]));
TEST_ESP_OK(gdma_del_channel(tx_channels[i]));
TEST_ESP_OK(gdma_del_channel(rx_channels[i]));
}

7
components/driver/test/test_gpio.c
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@@ -5,7 +5,7 @@
*/
/**
* About test environment UT_T1_GPIO:
* Please connect GPIO18 and GPIO19
* Please connect TEST_GPIO_EXT_OUT_IO and TEST_GPIO_EXT_IN_IO
*/
#include <stdio.h>
#include <string.h>
@@ -40,8 +40,9 @@
#define TEST_GPIO_INPUT_ONLY_PIN 46
#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_46
#elif CONFIG_IDF_TARGET_ESP32S3
#define TEST_GPIO_EXT_OUT_IO 19 // default output GPIO
#define TEST_GPIO_EXT_IN_IO 20 // default input GPIO
// IO19 and IO20 are connected as USB functions and should be avoided for testing
#define TEST_GPIO_EXT_OUT_IO 17 // default output GPIO
#define TEST_GPIO_EXT_IN_IO 21 // default input GPIO
#define TEST_GPIO_OUTPUT_PIN 12
#define TEST_GPIO_INPUT_ONLY_PIN 46
#define TEST_GPIO_OUTPUT_MAX GPIO_NUM_MAX

4
components/driver/test/test_spi_slave_hd.c
View File

@@ -19,6 +19,8 @@
#if !DISABLED_FOR_TARGETS(ESP32C3)
//There is only one GPSPI controller on ESP32C3, so single-board test is disabled.
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// TODO ESP32S3 IDF-3226
#if SOC_SPI_SUPPORT_SLAVE_HD_VER2
#include "driver/spi_slave_hd.h"
@@ -595,7 +597,7 @@ TEST_CASE("test spi slave hd segment mode, master too long", "[spi][spi_slv_hd]"
}
#endif //SOC_SPI_SUPPORT_SLAVE_HD_VER2
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif //#if !DISABLED_FOR_TARGETS(ESP32C3)
#if !DISABLED_FOR_TARGETS(ESP32, ESP32S2, ESP32S3)

6
components/esp_rom/CMakeLists.txt
View File

@@ -4,7 +4,8 @@ set(sources "patches/esp_rom_crc.c"
"patches/esp_rom_sys.c"
"patches/esp_rom_uart.c")
if(CONFIG_IDF_TARGET_ARCH_XTENSA)
if(CONFIG_IDF_TARGET_ARCH_XTENSA AND NOT (target STREQUAL "esp32s3"))
# Temporarily disabled on S3 due to it breaking longjmp TODO ESP32S3 IDF-3391
list(APPEND sources "patches/esp_rom_longjmp.S")
endif()
@@ -102,7 +103,8 @@ else() # Regular app build
endif()
endif()
if(CONFIG_IDF_TARGET_ARCH_XTENSA)
if(CONFIG_IDF_TARGET_ARCH_XTENSA AND NOT (target STREQUAL "esp32s3"))
# Temporarily disabled on S3 due to it breaking longjmp TODO ESP32S3 IDF-3391
target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=longjmp")
endif()
endif()

6
components/fatfs/test/test_fatfs_sdmmc.c
View File

@@ -39,6 +39,8 @@
#if SOC_SDMMC_HOST_SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// No runner
#include "driver/sdmmc_host.h"
@@ -305,9 +307,11 @@ TEST_CASE("(SD) opendir, readdir, rewinddir, seekdir work as expected using UTF-
}
#endif // CONFIG_FATFS_API_ENCODING_UTF_8 && CONFIG_FATFS_CODEPAGE == 936
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif //SDMMC HOST SUPPORTED
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32C3)
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S2, ESP32S3, ESP32C3)
//no runners
static void sdspi_speed_test(void *buf, size_t buf_size, size_t file_size, bool write);

5
components/mbedtls/test/test_esp_crt_bundle.c
View File

@@ -82,6 +82,9 @@ typedef enum {
int esp_crt_verify_callback(void *buf, mbedtls_x509_crt *crt, int data, uint32_t *flags);
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// TODO ESP32-S3 IDF-1878
static const char *TAG = "cert_bundle_test";
static volatile bool exit_flag;
@@ -341,6 +344,8 @@ TEST_CASE("custom certificate bundle", "[mbedtls]")
vSemaphoreDelete(exit_sema);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
TEST_CASE("custom certificate bundle - weak hash", "[mbedtls]")
{
/* A weak signature hash on the trusted certificate should not stop

2
components/newlib/test_apps/app_test.py
View File

@@ -7,7 +7,7 @@ except ImportError:
pass
@ttfw_idf.idf_component_unit_test(env_tag='COMPONENT_UT_GENERIC', target=['esp32', 'esp32s2', 'esp32c3'])
@ttfw_idf.idf_component_unit_test(env_tag='COMPONENT_UT_GENERIC', target=['esp32', 'esp32s2', 'esp32s3', 'esp32c3'])
def test_component_ut_newlib(env, _): # type: (tiny_test_fw.Env, typing.Any) -> None
dut = env.get_dut('newlib', 'components/newlib/test_apps')
dut.start_app()

14
components/spi_flash/test/test_esp_flash.c
View File

@@ -137,8 +137,8 @@ typedef void (*flash_test_func_t)(const esp_partition_t *part);
These tests run for all the flash chip configs shown in config_list, below (internal and external).
*/
#if defined(CONFIG_SPIRAM)
#if defined(CONFIG_SPIRAM) || TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// No S3 runner
#define FLASH_TEST_CASE_3(STR, FUNCT_TO_RUN)
#define FLASH_TEST_CASE_3_IGNORE(STR, FUNCT_TO_RUN)
#else //CONFIG_SPIRAM
@@ -900,12 +900,15 @@ TEST_CASE("SPI flash test reading with all speed/mode permutations", "[esp_flash
}
#ifndef CONFIG_SPIRAM
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// No S3 runner
TEST_CASE("SPI flash test reading with all speed/mode permutations, 3 chips", "[esp_flash_3][test_env=UT_T1_ESP_FLASH]")
{
for (int i = 0; i < TEST_CONFIG_NUM; i++) {
test_permutations_chip(&config_list[i]);
}
}
#endif// !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif
@@ -976,6 +979,9 @@ static void test_write_large_buffer(const esp_partition_t* part, const uint8_t *
#if !CONFIG_SPIRAM
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// No S3 runner
typedef struct {
uint32_t us_start;
size_t len;
@@ -1151,7 +1157,11 @@ static void test_flash_read_write_performance(const esp_partition_t *part)
free(data_read);
}
TEST_CASE("Test esp_flash read/write performance", "[esp_flash][test_env=UT_T1_ESP_FLASH]") {flash_test_func(test_flash_read_write_performance, 1);}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#endif // !CONFIG_SPIRAM
FLASH_TEST_CASE_3("Test esp_flash read/write performance"", 3 chips", test_flash_read_write_performance);

6
components/spi_flash/test/test_mmap.c
View File

@@ -153,8 +153,8 @@ TEST_CASE("Can mmap into data address space", "[spi_flash][mmap]")
TEST_ASSERT_EQUAL_PTR(NULL, spi_flash_phys2cache(start, SPI_FLASH_MMAP_DATA));
}
#if !DISABLED_FOR_TARGETS(ESP32C3)
/* On C3 the cache is programmatically split between Icache and dcache and with the default setup we dont leave a lot pages
#if !DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
/* On S3/C3 the cache is programmatically split between Icache and dcache and with the default setup we dont leave a lot pages
available for additional mmaps into instruction space. Disabling this test for now since any hypothetical use case for this
is no longer supported "out of the box"
*/
@@ -215,7 +215,7 @@ TEST_CASE("Can mmap into instruction address space", "[spi_flash][mmap]")
}
#endif //!DISABLED_FOR_TARGETS(ESP32C3)
#endif //!DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
TEST_CASE("Can mmap unordered pages into contiguous memory", "[spi_flash][mmap]")

8
components/spi_flash/test/test_spi_flash.c
View File

@@ -32,8 +32,6 @@ struct flash_test_ctx {
SemaphoreHandle_t done;
};
static const char TAG[] = "test_spi_flash";
/* Base offset in flash for tests. */
static size_t start;
@@ -204,6 +202,11 @@ TEST_CASE("spi flash functions can run along with IRAM interrupts", "[spi_flash]
free(read_arg.buf);
}
#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
// TODO ESP32-S3 IDF-2021
static const char TAG[] = "test_spi_flash";
typedef struct {
uint32_t us_start;
size_t len;
@@ -332,6 +335,7 @@ TEST_CASE("Test spi_flash read/write performance", "[spi_flash]")
free(data_read);
}
#endif //!TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3)
#if portNUM_PROCESSORS > 1