From 79fe10fe1ca6a987a3e9165f2a1dbfc0a99faa17 Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Mon, 30 Dec 2024 17:40:18 +0800 Subject: [PATCH] fix(interrupt): fixed wrongly reserved interrupt for wifi on H2 --- .../esp_hw_support/port/esp32h2/esp_cpu_intr.c | 3 +-- .../esp_intr_dump/expected_output/esp32h2.txt | 15 ++++++++------- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/components/esp_hw_support/port/esp32h2/esp_cpu_intr.c b/components/esp_hw_support/port/esp32h2/esp_cpu_intr.c index 9ce7dfa69c..ca63df5141 100644 --- a/components/esp_hw_support/port/esp32h2/esp_cpu_intr.c +++ b/components/esp_hw_support/port/esp32h2/esp_cpu_intr.c @@ -10,13 +10,12 @@ void esp_cpu_intr_get_desc(int core_id, int intr_num, esp_cpu_intr_desc_t *intr_desc_ret) { /* On the ESP32-H2, interrupt: - * - 1 is for Wi-Fi * - 6 for "permanently disabled interrupt" * * Interrupts 3, 4 and 7 are unavailable for PULP CPU as they are bound to Core-Local Interrupts (CLINT) */ // [TODO: IDF-2465] - const uint32_t rsvd_mask = BIT(1) | BIT(3) | BIT(4) | BIT(6) | BIT(7); + const uint32_t rsvd_mask = BIT(3) | BIT(4) | BIT(6) | BIT(7); intr_desc_ret->priority = 1; intr_desc_ret->type = ESP_CPU_INTR_TYPE_NA; diff --git a/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt b/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt index 3af2a0d3d9..5874552020 100644 --- a/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt +++ b/tools/test_apps/system/esp_intr_dump/expected_output/esp32h2.txt @@ -1,16 +1,16 @@ CPU 0 interrupt status: Int Level Type Status 0 * * Reserved - 1 * * Reserved - 2 1 Level Shared: LP_RTC_TIMER + 1 1 Level Shared: LP_RTC_TIMER + 2 1 Level Used: CPUFROM_CPU_0 3 * * Reserved 4 * * Reserved - 5 1 Level Used: CPUFROM_CPU_0 + 5 1 Level Used: SYSTIMER_TARGET0 6 * * Reserved 7 * * Reserved - 8 1 Level Used: SYSTIMER_TARGET0 - 9 1 Level Used: TG0_WDT - 10 1 Level Used: UART0 + 8 1 Level Used: TG0_WDT + 9 1 Level Used: UART0 + 10 * * Free 11 * * Free 12 * * Free 13 * * Free @@ -32,5 +32,6 @@ CPU 0 interrupt status: 29 * * Free 30 * * Free 31 * * Free -Interrupts available for general use: 18 +Interrupts available for general use: 19 + Shared interrupts: 1