From 47f1a2c81bd51b591a1c03c95a2cb0e9c89f3640 Mon Sep 17 00:00:00 2001
From: Song Ruo Jing <songruojing@espressif.com>
Date: Thu, 13 Mar 2025 21:10:20 +0800
Subject: [PATCH 1/2] fix(gpio): fix pu, pd, drv value incorrect from
 gpio_dump_io_configuration on esp32

Closes https://github.com/espressif/esp-idf/issues/14931
---
 components/esp_driver_gpio/src/gpio.c         | 27 ++++++--
 components/esp_hw_support/esp_gpio_reserve.c  |  2 +-
 components/hal/esp32/include/hal/gpio_ll.h    |  2 +-
 components/hal/esp32/include/hal/rtc_io_ll.h  | 35 +++++++++-
 components/hal/esp32c2/include/hal/gpio_ll.h  |  2 +-
 components/hal/esp32c3/include/hal/gpio_ll.h  | 66 +++++++++---------
 components/hal/esp32c5/include/hal/gpio_ll.h  |  3 +-
 .../hal/esp32c5/include/hal/rtc_io_ll.h       | 26 ++++++-
 components/hal/esp32c6/include/hal/gpio_ll.h  |  2 +-
 .../hal/esp32c6/include/hal/rtc_io_ll.h       | 24 ++++++-
 components/hal/esp32c61/include/hal/gpio_ll.h |  2 +-
 components/hal/esp32h2/include/hal/gpio_ll.h  |  2 +-
 components/hal/esp32p4/include/hal/gpio_ll.h  |  2 +-
 .../hal/esp32p4/include/hal/rtc_io_ll.h       | 24 ++++++-
 components/hal/esp32s2/include/hal/gpio_ll.h  |  2 +-
 .../hal/esp32s2/include/hal/rtc_io_ll.h       | 31 +++++++++
 components/hal/esp32s3/include/hal/gpio_ll.h  | 68 +++++++++----------
 .../hal/esp32s3/include/hal/rtc_io_ll.h       | 31 +++++++++
 components/hal/include/hal/rtc_io_hal.h       | 18 ++++-
 19 files changed, 280 insertions(+), 89 deletions(-)

diff --git a/components/esp_driver_gpio/src/gpio.c b/components/esp_driver_gpio/src/gpio.c
index 5357cb99ff..b4071325b0 100644
--- a/components/esp_driver_gpio/src/gpio.c
+++ b/components/esp_driver_gpio/src/gpio.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -76,7 +76,7 @@ static gpio_context_t gpio_context = {
 
 esp_err_t gpio_pullup_en(gpio_num_t gpio_num)
 {
-    GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+    GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
 
     if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
         portENTER_CRITICAL(&gpio_context.gpio_spinlock);
@@ -114,7 +114,7 @@ esp_err_t gpio_pullup_dis(gpio_num_t gpio_num)
 
 esp_err_t gpio_pulldown_en(gpio_num_t gpio_num)
 {
-    GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+    GPIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
 
     if (!rtc_gpio_is_valid_gpio(gpio_num) || SOC_GPIO_SUPPORT_RTC_INDEPENDENT) {
         portENTER_CRITICAL(&gpio_context.gpio_spinlock);
@@ -1027,9 +1027,24 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
         uint32_t gpio_num = __builtin_ffsll(io_bit_mask) - 1;
         io_bit_mask &= ~(1ULL << gpio_num);
 
-        bool pu, pd, ie, oe, od, slp_sel;
-        uint32_t drv, fun_sel, sig_out;
+        bool pu = 0;
+        bool pd = 0;
+        bool ie = 0;
+        bool oe = 0;
+        bool od = 0;
+        bool slp_sel = 0;
+        uint32_t drv = 0;
+        uint32_t fun_sel = 0;
+        uint32_t sig_out = 0;
         gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &od, &drv, &fun_sel, &sig_out, &slp_sel);
+#if !SOC_GPIO_SUPPORT_RTC_INDEPENDENT && SOC_RTCIO_PIN_COUNT > 0
+        if (rtc_gpio_is_valid_gpio(gpio_num)) {
+            int rtcio_num = rtc_io_number_get(gpio_num);
+            pu = rtcio_hal_is_pullup_enabled(rtcio_num);
+            pd = rtcio_hal_is_pulldown_enabled(rtcio_num);
+            drv = rtcio_hal_get_drive_capability(rtcio_num);
+        }
+#endif
 
         fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_reserved(BIT64(gpio_num)) ? " **RESERVED**" : "");
         fprintf(out_stream, "  Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", pu, pd, drv);
@@ -1055,7 +1070,7 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
         fprintf(out_stream, "  SleepSelEn: %d\n", slp_sel);
         fprintf(out_stream, "\n");
     }
-    fprintf(out_stream, "=================IO DUMP End==================\n");
+    fprintf(out_stream, "=================IO DUMP End=================\n");
     return ESP_OK;
 }
 
diff --git a/components/esp_hw_support/esp_gpio_reserve.c b/components/esp_hw_support/esp_gpio_reserve.c
index b7891c879d..c2e5ec71c0 100644
--- a/components/esp_hw_support/esp_gpio_reserve.c
+++ b/components/esp_hw_support/esp_gpio_reserve.c
@@ -10,7 +10,7 @@
 #include "esp_bit_defs.h"
 #include "esp_private/esp_gpio_reserve.h"
 
-static _Atomic uint64_t s_reserved_pin_mask = ATOMIC_VAR_INIT(~(SOC_GPIO_VALID_OUTPUT_GPIO_MASK));
+static _Atomic uint64_t s_reserved_pin_mask = ATOMIC_VAR_INIT(~(SOC_GPIO_VALID_GPIO_MASK));
 
 uint64_t esp_gpio_reserve(uint64_t gpio_mask)
 {
diff --git a/components/hal/esp32/include/hal/gpio_ll.h b/components/hal/esp32/include/hal/gpio_ll.h
index e39552dbf6..f9a0024cad 100644
--- a/components/hal/esp32/include/hal/gpio_ll.h
+++ b/components/hal/esp32/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32/include/hal/rtc_io_ll.h b/components/hal/esp32/include/hal/rtc_io_ll.h
index 78a71c3d05..cae6e69072 100644
--- a/components/hal/esp32/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32/include/hal/rtc_io_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -12,6 +12,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdlib.h>
 #include "soc/rtc_io_struct.h"
 #include "soc/rtc_io_reg.h"
@@ -24,7 +25,7 @@ extern "C" {
 #endif
 
 typedef enum {
-    RTCIO_LL_FUNC_RTC = 0x0,         /*!< The pin controled by RTC module. */
+    RTCIO_LL_FUNC_RTC = 0x0,         /*!< The pin controlled by RTC module. */
     RTCIO_LL_FUNC_DIGITAL = 0x1,     /*!< The pin controlled by DIGITAL module. */
 } rtcio_ll_func_t;
 
@@ -194,6 +195,21 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pullup) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
+    } else {
+        return false;
+    }
+}
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -218,6 +234,21 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pulldown) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
+    } else {
+        return false;
+    }
+}
+
 /**
  * Enable force hold function on an RTC IO pad.
  *
diff --git a/components/hal/esp32c2/include/hal/gpio_ll.h b/components/hal/esp32c2/include/hal/gpio_ll.h
index ae6e070d5d..a39ccc3f29 100644
--- a/components/hal/esp32c2/include/hal/gpio_ll.h
+++ b/components/hal/esp32c2/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h
index 6781f79940..2f9c09ec26 100644
--- a/components/hal/esp32c3/include/hal/gpio_ll.h
+++ b/components/hal/esp32c3/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -34,38 +34,6 @@ extern "C" {
 #define GPIO_LL_PRO_CPU_INTR_ENA      (BIT(0))
 #define GPIO_LL_PRO_CPU_NMI_INTR_ENA  (BIT(1))
 
-/**
- * @brief Get the configuration for an IO
- *
- * @param hw Peripheral GPIO hardware instance address.
- * @param gpio_num GPIO number
- * @param pu Pull-up enabled or not
- * @param pd Pull-down enabled or not
- * @param ie Input enabled or not
- * @param oe Output enabled or not
- * @param od Open-drain enabled or not
- * @param drv Drive strength value
- * @param fun_sel IOMUX function selection value
- * @param sig_out Outputting peripheral signal index
- * @param slp_sel Pin sleep mode enabled or not
- */
-static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
-                                         uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
-{
-    uint32_t bit_mask = 1 << gpio_num;
-    uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
-    *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
-    *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
-    *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
-    *oe = (hw->enable.val & bit_mask) >> gpio_num;
-    *od = hw->pin[gpio_num].pad_driver;
-    *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
-    *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
-    *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
-}
-
 /**
   * @brief Enable pull-up on GPIO.
   *
@@ -755,6 +723,38 @@ static inline bool gpio_ll_deepsleep_wakeup_is_enabled(gpio_dev_t *hw, uint32_t
     return GET_PERI_REG_MASK(RTC_CNTL_GPIO_WAKEUP_REG, 1 << (RTC_CNTL_GPIO_PIN0_WAKEUP_ENABLE_S - gpio_num));
 }
 
+/**
+ * @brief Get the configuration for an IO
+ *
+ * @param hw Peripheral GPIO hardware instance address.
+ * @param gpio_num GPIO number
+ * @param pu Pull-up enabled or not
+ * @param pd Pull-down enabled or not
+ * @param ie Input enabled or not
+ * @param oe Output enabled or not
+ * @param od Open-drain enabled or not
+ * @param drv Drive strength value
+ * @param fun_sel IOMUX function selection value
+ * @param sig_out Outputting peripheral signal index
+ * @param slp_sel Pin sleep mode enabled or not
+ */
+static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
+{
+    uint32_t bit_mask = 1 << gpio_num;
+    uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
+    *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
+    *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
+    *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
+    *oe = (hw->enable.val & bit_mask) >> gpio_num;
+    *od = hw->pin[gpio_num].pad_driver;
+    gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
+    *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
+    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32c5/include/hal/gpio_ll.h b/components/hal/esp32c5/include/hal/gpio_ll.h
index f1c7ead68d..a5acdec4fd 100644
--- a/components/hal/esp32c5/include/hal/gpio_ll.h
+++ b/components/hal/esp32c5/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -42,7 +42,6 @@ extern "C" {
 #define GPIO_LL_GET_HW(num) (((num) == 0) ? (&GPIO) : NULL)
 
 #define GPIO_LL_PRO_CPU_INTR_ENA      (BIT(0))
-#define GPIO_LL_PRO_CPU_NMI_INTR_ENA  (BIT(1))
 
 /**
  * @brief Get the configuration for an IO
diff --git a/components/hal/esp32c5/include/hal/rtc_io_ll.h b/components/hal/esp32c5/include/hal/rtc_io_ll.h
index 89c8c9a37c..679c914d07 100644
--- a/components/hal/esp32c5/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c5/include/hal/rtc_io_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -231,6 +231,18 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     abort();
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    // return LP_IO_MUX.gpion[rtcio_num].gpion_fun_wpu;
+    abort();
+}
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -257,6 +269,18 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     abort();
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    // return LP_IO_MUX.gpion[rtcio_num].gpion_fun_wpd;
+    abort();
+}
+
 /**
  * Enable force hold function for an RTC IO pad.
  *
diff --git a/components/hal/esp32c6/include/hal/gpio_ll.h b/components/hal/esp32c6/include/hal/gpio_ll.h
index 972e2f5c19..c027eac18a 100644
--- a/components/hal/esp32c6/include/hal/gpio_ll.h
+++ b/components/hal/esp32c6/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32c6/include/hal/rtc_io_ll.h b/components/hal/esp32c6/include/hal/rtc_io_ll.h
index 0cd64df36d..a08c5b9164 100644
--- a/components/hal/esp32c6/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c6/include/hal/rtc_io_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -228,6 +228,17 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     LP_IO.gpio[rtcio_num].fun_wpu = 0;
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    return LP_IO.gpio[rtcio_num].fun_wpu;
+}
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -250,6 +261,17 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     LP_IO.gpio[rtcio_num].fun_wpd = 0;
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    return LP_IO.gpio[rtcio_num].fun_wpd;
+}
+
 /**
  * Enable force hold function for an RTC IO pad.
  *
diff --git a/components/hal/esp32c61/include/hal/gpio_ll.h b/components/hal/esp32c61/include/hal/gpio_ll.h
index 956a77625e..42f2c5a16c 100644
--- a/components/hal/esp32c61/include/hal/gpio_ll.h
+++ b/components/hal/esp32c61/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32h2/include/hal/gpio_ll.h b/components/hal/esp32h2/include/hal/gpio_ll.h
index a37ceccaec..25dca76683 100644
--- a/components/hal/esp32h2/include/hal/gpio_ll.h
+++ b/components/hal/esp32h2/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h
index 4e41222a8e..e5a8934b4a 100644
--- a/components/hal/esp32p4/include/hal/gpio_ll.h
+++ b/components/hal/esp32p4/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32p4/include/hal/rtc_io_ll.h b/components/hal/esp32p4/include/hal/rtc_io_ll.h
index a23bb2ead0..ee16c93a30 100644
--- a/components/hal/esp32p4/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32p4/include/hal/rtc_io_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -252,6 +252,17 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     LP_IOMUX.pad[rtcio_num].rue = 0;
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    return LP_IOMUX.pad[rtcio_num].rue;
+}
+
 /**
  * @brief RTC GPIO pulldown enable.
  *
@@ -274,6 +285,17 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     LP_IOMUX.pad[rtcio_num].rde = 0;
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    return LP_IOMUX.pad[rtcio_num].rde;
+}
+
 /**
  * @brief Enable force hold function for an RTC IO pad.
  *
diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h
index 332be579bf..7d4b18e1ff 100644
--- a/components/hal/esp32s2/include/hal/gpio_ll.h
+++ b/components/hal/esp32s2/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
diff --git a/components/hal/esp32s2/include/hal/rtc_io_ll.h b/components/hal/esp32s2/include/hal/rtc_io_ll.h
index 5e695ba145..647a69da79 100644
--- a/components/hal/esp32s2/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s2/include/hal/rtc_io_ll.h
@@ -12,6 +12,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/rtc_io_struct.h"
@@ -206,6 +207,21 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pullup) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
+    } else {
+        return false;
+    }
+}
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -230,6 +246,21 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pulldown) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
+    } else {
+        return false;
+    }
+}
+
 /**
  * Enable force hold function on an RTC IO pad.
  *
diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h
index 4d796b23d8..9eff0f3a2c 100644
--- a/components/hal/esp32s3/include/hal/gpio_ll.h
+++ b/components/hal/esp32s3/include/hal/gpio_ll.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -34,39 +34,6 @@ extern "C" {
 #define GPIO_LL_INTR_ENA      (BIT(0))
 #define GPIO_LL_NMI_INTR_ENA  (BIT(1))
 
-/**
- * @brief Get the configuration for an IO
- *
- * @param hw Peripheral GPIO hardware instance address.
- * @param gpio_num GPIO number
- * @param pu Pull-up enabled or not
- * @param pd Pull-down enabled or not
- * @param ie Input enabled or not
- * @param oe Output enabled or not
- * @param od Open-drain enabled or not
- * @param drv Drive strength value
- * @param fun_sel IOMUX function selection value
- * @param sig_out Outputting peripheral signal index
- * @param slp_sel Pin sleep mode enabled or not
- */
-static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
-                                         uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
-{
-    uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
-    uint32_t bit_mask = 1 << bit_shift;
-    uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
-    *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
-    *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
-    *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
-    *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
-    *od = hw->pin[gpio_num].pad_driver;
-    *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
-    *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
-    *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
-}
-
 /**
   * @brief Enable pull-up on GPIO.
   *
@@ -723,6 +690,39 @@ static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num
     PIN_SLP_OUTPUT_ENABLE(GPIO_PIN_MUX_REG[gpio_num]);
 }
 
+/**
+ * @brief Get the configuration for an IO
+ *
+ * @param hw Peripheral GPIO hardware instance address.
+ * @param gpio_num GPIO number
+ * @param pu Pull-up enabled or not
+ * @param pd Pull-down enabled or not
+ * @param ie Input enabled or not
+ * @param oe Output enabled or not
+ * @param od Open-drain enabled or not
+ * @param drv Drive strength value
+ * @param fun_sel IOMUX function selection value
+ * @param sig_out Outputting peripheral signal index
+ * @param slp_sel Pin sleep mode enabled or not
+ */
+static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
+{
+    uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
+    uint32_t bit_mask = 1 << bit_shift;
+    uint32_t iomux_reg_val = REG_READ(GPIO_PIN_MUX_REG[gpio_num]);
+    *pu = (iomux_reg_val & FUN_PU_M) >> FUN_PU_S;
+    *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
+    *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
+    *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
+    *od = hw->pin[gpio_num].pad_driver;
+    gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
+    *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
+    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/components/hal/esp32s3/include/hal/rtc_io_ll.h b/components/hal/esp32s3/include/hal/rtc_io_ll.h
index 6cd31a3a00..a5cd10b502 100644
--- a/components/hal/esp32s3/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32s3/include/hal/rtc_io_ll.h
@@ -12,6 +12,7 @@
 
 #pragma once
 
+#include <stdbool.h>
 #include <stdlib.h>
 #include <stdbool.h>
 #include "soc/rtc_io_struct.h"
@@ -233,6 +234,21 @@ static inline void rtcio_ll_pullup_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pullup_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pullup) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pullup);
+    } else {
+        return false;
+    }
+}
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -257,6 +273,21 @@ static inline void rtcio_ll_pulldown_disable(int rtcio_num)
     }
 }
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ MAX(rtcio).
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+static inline bool rtcio_ll_is_pulldown_enabled(int rtcio_num)
+{
+    if (rtc_io_desc[rtcio_num].pulldown) {
+        return GET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, rtc_io_desc[rtcio_num].pulldown);
+    } else {
+        return false;
+    }
+}
+
 /**
  * Enable force hold function on an RTC IO pad.
  *
diff --git a/components/hal/include/hal/rtc_io_hal.h b/components/hal/include/hal/rtc_io_hal.h
index 086bec8c0d..af90befbfb 100644
--- a/components/hal/include/hal/rtc_io_hal.h
+++ b/components/hal/include/hal/rtc_io_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -161,6 +161,14 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
  */
 #define rtcio_hal_pullup_disable(rtcio_num) rtcio_ll_pullup_disable(rtcio_num)
 
+/**
+ * @brief Get RTC GPIO pad pullup status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @return Whether the pullup of the pad is enabled or not.
+ */
+#define rtcio_hal_is_pullup_enabled(rtcio_num)  rtcio_ll_is_pullup_enabled(rtcio_num)
+
 /**
  * RTC GPIO pulldown enable.
  *
@@ -175,6 +183,14 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
  */
 #define rtcio_hal_pulldown_disable(rtcio_num) rtcio_ll_pulldown_disable(rtcio_num)
 
+/**
+ * @brief Get RTC GPIO pad pulldown status.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTCIO_PIN_COUNT.
+ * @return Whether the pulldown of the pad is enabled or not.
+ */
+#define rtcio_hal_is_pulldown_enabled(rtcio_num)  rtcio_ll_is_pulldown_enabled(rtcio_num)
+
 /**
  * Select a RTC IOMUX function for the RTC IO
  *

From 0077f642df820f1ad64d11910d1b7bbe722d1a61 Mon Sep 17 00:00:00 2001
From: Song Ruo Jing <songruojing@espressif.com>
Date: Fri, 20 Dec 2024 21:14:34 +0800
Subject: [PATCH 2/2] fix(gpio): fix 8/16-bit gpio, rtc/lp_io register access

---
 components/hal/esp32c2/include/hal/gpio_ll.h  |  5 ++--
 components/hal/esp32c3/include/hal/gpio_ll.h  |  5 ++--
 components/hal/esp32c6/include/hal/gpio_ll.h  |  4 +--
 .../hal/esp32c6/include/hal/rtc_io_ll.h       |  8 +++---
 components/hal/esp32h2/include/hal/gpio_ll.h  |  2 +-
 components/hal/esp32p4/include/hal/gpio_ll.h  |  8 ++++--
 components/hal/esp32s2/include/hal/gpio_ll.h  |  1 -
 components/hal/esp32s3/include/hal/gpio_ll.h  |  1 -
 .../soc/esp32c2/include/soc/gpio_struct.h     |  4 +--
 .../soc/esp32c3/include/soc/gpio_struct.h     | 22 +++++-----------
 .../esp32c5/mp/include/soc/lp_gpio_struct.h   | 26 +++++++++----------
 .../soc/esp32c6/include/soc/lp_io_struct.h    | 18 ++++++-------
 tools/ci/check_copyright_ignore.txt           |  1 -
 13 files changed, 50 insertions(+), 55 deletions(-)

diff --git a/components/hal/esp32c2/include/hal/gpio_ll.h b/components/hal/esp32c2/include/hal/gpio_ll.h
index a39ccc3f29..8a78f41845 100644
--- a/components/hal/esp32c2/include/hal/gpio_ll.h
+++ b/components/hal/esp32c2/include/hal/gpio_ll.h
@@ -21,6 +21,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -60,7 +61,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
@@ -535,7 +536,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
 {
     gpio_func_in_sel_cfg_reg_t reg;
     reg.val = hw->func_in_sel_cfg[in_sig_idx].val;
-    return (reg.sig_in_sel ? reg.func_sel : -1);
+    return (reg.sig_in_sel ? reg.in_sel : -1);
 }
 
 /**
diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h
index 2f9c09ec26..087f873ac7 100644
--- a/components/hal/esp32c3/include/hal/gpio_ll.h
+++ b/components/hal/esp32c3/include/hal/gpio_ll.h
@@ -23,6 +23,7 @@
 #include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -529,7 +530,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
 {
     typeof(hw->func_in_sel_cfg[in_sig_idx]) reg;
     reg.val = hw->func_in_sel_cfg[in_sig_idx].val;
-    return (reg.sig_in_sel ? reg.func_sel : -1);
+    return (reg.sig_in_sel ? reg.in_sel : -1);
 }
 
 /**
@@ -751,7 +752,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32c6/include/hal/gpio_ll.h b/components/hal/esp32c6/include/hal/gpio_ll.h
index c027eac18a..f248d2e171 100644
--- a/components/hal/esp32c6/include/hal/gpio_ll.h
+++ b/components/hal/esp32c6/include/hal/gpio_ll.h
@@ -20,13 +20,13 @@
 #include "soc/gpio_periph.h"
 #include "soc/gpio_struct.h"
 #include "soc/lp_aon_struct.h"
-#include "soc/lp_io_struct.h"
 #include "soc/pmu_struct.h"
 #include "soc/usb_serial_jtag_reg.h"
 #include "soc/pcr_struct.h"
 #include "soc/clk_tree_defs.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -66,7 +66,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32c6/include/hal/rtc_io_ll.h b/components/hal/esp32c6/include/hal/rtc_io_ll.h
index a08c5b9164..247a9c44b3 100644
--- a/components/hal/esp32c6/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c6/include/hal/rtc_io_ll.h
@@ -136,9 +136,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_data_w1ts, BIT(rtcio_num));
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_w1ts, BIT(rtcio_num));
     } else {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_data_w1tc, BIT(rtcio_num));
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_w1tc, BIT(rtcio_num));
     }
 }
 
@@ -356,7 +356,7 @@ static inline void rtcio_ll_intr_enable(int rtcio_num, rtcio_ll_intr_type_t type
     LP_IO.pin[rtcio_num].int_type = type;
 
     /* Work around for HW issue,
-       need to also enable this clk, so that LP_IO.status.status_interrupt can get updated,
+       need to also enable this clk, so that (LP_IO.status, status_interrupt) can get updated,
        and trigger the interrupt on the LP Core
     */
     LP_IO.date.clk_en = 1;
@@ -449,7 +449,7 @@ static inline  uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline  void rtcio_ll_clear_interrupt_status(void)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.status_w1tc, status_w1tc, 0xff);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.status_w1tc, status_intr_w1tc, 0xff);
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32h2/include/hal/gpio_ll.h b/components/hal/esp32h2/include/hal/gpio_ll.h
index 25dca76683..9688001e42 100644
--- a/components/hal/esp32h2/include/hal/gpio_ll.h
+++ b/components/hal/esp32h2/include/hal/gpio_ll.h
@@ -66,7 +66,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h
index e5a8934b4a..7d882ecb0f 100644
--- a/components/hal/esp32p4/include/hal/gpio_ll.h
+++ b/components/hal/esp32p4/include/hal/gpio_ll.h
@@ -284,7 +284,9 @@ static inline void gpio_ll_pin_input_hysteresis_enable(gpio_dev_t *hw, uint32_t
     uint64_t bit_mask = 1ULL << gpio_num;
     if (!(bit_mask & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK)) {
         // GPIO0-15
-        LP_IOMUX.lp_pad_hys.reg_lp_gpio_hys |= bit_mask;
+        uint32_t hys_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys);
+        hys_mask |= bit_mask;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys, hys_mask);
     } else {
         if (gpio_num < 32 + SOC_RTCIO_PIN_COUNT) {
             // GPIO 16-47
@@ -307,7 +309,9 @@ static inline void gpio_ll_pin_input_hysteresis_disable(gpio_dev_t *hw, uint32_t
     uint64_t bit_mask = 1ULL << gpio_num;
     if (!(bit_mask & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK)) {
         // GPIO0-15
-        LP_IOMUX.lp_pad_hys.reg_lp_gpio_hys &= ~bit_mask;
+        uint32_t hys_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys);
+        hys_mask &= ~bit_mask;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys, hys_mask);
     } else {
         if (gpio_num < 32 + SOC_RTCIO_PIN_COUNT) {
             // GPIO 16-47
diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h
index 7d4b18e1ff..a2b97fee85 100644
--- a/components/hal/esp32s2/include/hal/gpio_ll.h
+++ b/components/hal/esp32s2/include/hal/gpio_ll.h
@@ -18,7 +18,6 @@
 #include "soc/soc.h"
 #include "soc/gpio_periph.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/rtc_io_reg.h"
 #include "soc/gpio_struct.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h
index 9eff0f3a2c..27747c2768 100644
--- a/components/hal/esp32s3/include/hal/gpio_ll.h
+++ b/components/hal/esp32s3/include/hal/gpio_ll.h
@@ -18,7 +18,6 @@
 #include "soc/soc.h"
 #include "soc/gpio_periph.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/rtc_io_reg.h"
 #include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
 #include "soc/gpio_struct.h"
diff --git a/components/soc/esp32c2/include/soc/gpio_struct.h b/components/soc/esp32c2/include/soc/gpio_struct.h
index 83f7f41402..97ab45e928 100644
--- a/components/soc/esp32c2/include/soc/gpio_struct.h
+++ b/components/soc/esp32c2/include/soc/gpio_struct.h
@@ -301,7 +301,7 @@ typedef union {
          *  set this value: s=0-53: connect GPIO[s] to this port. s=0x38: set this port always
          *  high level. s=0x3C: set this port always low level.
          */
-        uint32_t func_sel:5;
+        uint32_t in_sel:5;
         /** in_inv_sel : R/W; bitpos: [5]; default: 0;
          *  set this bit to invert input signal. 1:invert. 0:not invert.
          */
@@ -325,7 +325,7 @@ typedef union {
          *  output of GPIO[n] equals input of peripheral[s]. s=256: output of GPIO[n] equals
          *  GPIO_OUT_REG[n].
          */
-        uint32_t func_sel:8;
+        uint32_t out_sel:8;
         /** out_inv_sel : R/W; bitpos: [8]; default: 0;
          *  set this bit to invert output signal.1:invert.0:not invert.
          */
diff --git a/components/soc/esp32c3/include/soc/gpio_struct.h b/components/soc/esp32c3/include/soc/gpio_struct.h
index 45f5e55412..26aef1ead0 100644
--- a/components/soc/esp32c3/include/soc/gpio_struct.h
+++ b/components/soc/esp32c3/include/soc/gpio_struct.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_GPIO_STRUCT_H_
 #define _SOC_GPIO_STRUCT_H_
 #include <stdint.h>
@@ -190,7 +182,7 @@ typedef volatile struct gpio_dev_s {
     uint32_t reserved_150;
     union {
         struct {
-            uint32_t func_sel:         5;
+            uint32_t in_sel:           5;
             uint32_t sig_in_inv:       1;
             uint32_t sig_in_sel:       1;
             uint32_t reserved7:       25;
@@ -327,7 +319,7 @@ typedef volatile struct gpio_dev_s {
     uint32_t reserved_550;
     union {
         struct {
-            uint32_t func_sel:          8;
+            uint32_t out_sel:           8;
             uint32_t inv_sel:           1;
             uint32_t oen_sel:           1;
             uint32_t oen_inv_sel:       1;
diff --git a/components/soc/esp32c5/mp/include/soc/lp_gpio_struct.h b/components/soc/esp32c5/mp/include/soc/lp_gpio_struct.h
index deb66bb732..7689b3ca03 100644
--- a/components/soc/esp32c5/mp/include/soc/lp_gpio_struct.h
+++ b/components/soc/esp32c5/mp/include/soc/lp_gpio_struct.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -33,7 +33,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to enable the output register LP_IO_OUT_REG of GPIO0 ~
          *  GPIO7.\\
          *
@@ -42,7 +42,7 @@ typedef union {
          *  will be set to 1.
          *  - Recommended operation: use this register to set LP_IO_OUT_REG.
          */
-        uint32_t out_w1ts:8;
+        uint32_t out_data_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -53,7 +53,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to clear the output register LP_IO_OUT_REG of GPIO0 ~
          *  GPIO7.\\
          *
@@ -62,7 +62,7 @@ typedef union {
          *  will be cleared.
          *  - Recommended operation: use this register to clear LP_IO_OUT_REG.
          */
-        uint32_t out_w1tc:8;
+        uint32_t out_data_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -90,7 +90,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** enable_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** out_enable_w1ts : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to set the output enable register LP_IO_ENABLE_REG of
          *  GPIO0 ~ GPIO7.\\
          *
@@ -99,7 +99,7 @@ typedef union {
          *  LP_IO_ENABLE_REG will be set to 1.
          *  - Recommended operation: use this register to set LP_IO_ENABLE_REG.
          */
-        uint32_t enable_w1ts:8;
+        uint32_t out_enable_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -110,7 +110,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** enable_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** out_enable_w1tc : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to clear the output enable register LP_IO_ENABLE_REG of
          *  GPIO0 ~ GPIO7.\\
          *
@@ -119,7 +119,7 @@ typedef union {
          *  LP_IO_ENABLE_REG will be cleared.
          *  - Recommended operation: use this register to clear LP_IO_ENABLE_REG.
          */
-        uint32_t enable_w1tc:8;
+        uint32_t out_enable_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -165,7 +165,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to set the interrupt status register LP_IO_STATUS_INT of
          *  GPIO0 ~ GPIO7.\\
          *
@@ -174,7 +174,7 @@ typedef union {
          *  LP_IO_STATUS_INT will be set to 1.
          *  - Recommended operation: use this register to set LP_IO_STATUS_INT.
          */
-        uint32_t status_w1ts:8;
+        uint32_t status_intr_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -185,7 +185,7 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
          *  Configures whether or not to clear the interrupt status register LP_IO_STATUS_INT
          *  of GPIO0 ~ GPIO7. \\
          *
@@ -194,7 +194,7 @@ typedef union {
          *  LP_IO_STATUS_INT will be cleared
          *  - ecommended operation: use this register to clear LP_IO_STATUS_INT.
          */
-        uint32_t status_w1tc:8;
+        uint32_t status_intr_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
diff --git a/components/soc/esp32c6/include/soc/lp_io_struct.h b/components/soc/esp32c6/include/soc/lp_io_struct.h
index cfaa3127cf..e12d27246c 100644
--- a/components/soc/esp32c6/include/soc/lp_io_struct.h
+++ b/components/soc/esp32c6/include/soc/lp_io_struct.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -30,10 +30,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** out_w1ts : WT; bitpos: [7:0]; default: 0;
          *  set one time output data
          */
-        uint32_t out_data_w1ts:8;
+        uint32_t out_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -44,10 +44,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** out_w1tc : WT; bitpos: [7:0]; default: 0;
          *  clear one time output data
          */
-        uint32_t out_data_w1tc:8;
+        uint32_t out_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -114,10 +114,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
          *  set one time output data
          */
-        uint32_t status_w1ts:8;
+        uint32_t status_intr_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -128,10 +128,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
          *  clear one time output data
          */
-        uint32_t status_w1tc:8;
+        uint32_t status_intr_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt
index 7e66c07000..4301c98401 100644
--- a/tools/ci/check_copyright_ignore.txt
+++ b/tools/ci/check_copyright_ignore.txt
@@ -594,7 +594,6 @@ components/soc/esp32c3/include/soc/boot_mode.h
 components/soc/esp32c3/include/soc/extmem_reg.h
 components/soc/esp32c3/include/soc/fe_reg.h
 components/soc/esp32c3/include/soc/gpio_reg.h
-components/soc/esp32c3/include/soc/gpio_struct.h
 components/soc/esp32c3/include/soc/i2c_reg.h
 components/soc/esp32c3/include/soc/interrupt_core0_reg.h
 components/soc/esp32c3/include/soc/ledc_reg.h