From 80c013ee5af897ef555fbad1ad98600f148a7f21 Mon Sep 17 00:00:00 2001 From: chenjianqiang Date: Wed, 10 Oct 2018 20:21:01 +0800 Subject: [PATCH] bugfix(psram): fix the error that two macro definitions are undeclared 1. add definition of FLASH_ID_GD25LQ32C 2. modify DPORT_SPI3_CLK_EN as DPORT_SPI_CLK_EN_2 --- components/esp32/include/rom/spi_flash.h | 2 ++ components/esp32/spiram_psram.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/components/esp32/include/rom/spi_flash.h b/components/esp32/include/rom/spi_flash.h index 35d010d797..cc9856f455 100644 --- a/components/esp32/include/rom/spi_flash.h +++ b/components/esp32/include/rom/spi_flash.h @@ -117,6 +117,8 @@ extern "C" { #define ESP_ROM_SPIFLASH_WR_PROTECT (ESP_ROM_SPIFLASH_BP0|ESP_ROM_SPIFLASH_BP1|ESP_ROM_SPIFLASH_BP2) #define ESP_ROM_SPIFLASH_QE BIT9 +#define FLASH_ID_GD25LQ32C 0xC86016 + typedef enum { ESP_ROM_SPIFLASH_QIO_MODE = 0, ESP_ROM_SPIFLASH_QOUT_MODE, diff --git a/components/esp32/spiram_psram.c b/components/esp32/spiram_psram.c index 52d40bb5a1..c2481d37c7 100644 --- a/components/esp32/spiram_psram.c +++ b/components/esp32/spiram_psram.c @@ -611,7 +611,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad while (1) { spi_status = READ_PERI_REG(SPI_EXT2_REG(PSRAM_SPI_3)); if (spi_status != 0 && spi_status != 1) { - DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN); + DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_2); break; } }