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Merge branch 'feature/bringup_723_cmake_rmt_driver_update' into 'master'

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RMT new features in ESP32S2

Closes IDF-1286

See merge request espressif/esp-idf!7401
This commit is contained in:
Michael (XIAO Xufeng)
2020-03-26 10:24:18 +08:00
parent 661f4c430d 4fc16e2374
commit 826cc7ecb6
12 changed files with 692 additions and 120 deletions
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52
components/driver/include/driver/rmt.h
View File

@@ -34,7 +34,7 @@ extern "C" {
* @brief Define memory space of each RMT channel (in words = 4 bytes) * @brief Define memory space of each RMT channel (in words = 4 bytes)
* *
*/ */
#define RMT_MEM_ITEM_NUM RMT_CHANNEL_MEM_WORDS #define RMT_MEM_ITEM_NUM SOC_RMT_CHANNEL_MEM_WORDS
/** /**
* @brief Data struct of RMT TX configure parameters * @brief Data struct of RMT TX configure parameters
@@ -44,6 +44,9 @@ typedef struct {
rmt_carrier_level_t carrier_level; /*!< Level of the RMT output, when the carrier is applied */ rmt_carrier_level_t carrier_level; /*!< Level of the RMT output, when the carrier is applied */
rmt_idle_level_t idle_level; /*!< RMT idle level */ rmt_idle_level_t idle_level; /*!< RMT idle level */
uint8_t carrier_duty_percent; /*!< RMT carrier duty (%) */ uint8_t carrier_duty_percent; /*!< RMT carrier duty (%) */
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
uint32_t loop_count; /*!< Maximum loop count */
#endif
bool carrier_en; /*!< RMT carrier enable */ bool carrier_en; /*!< RMT carrier enable */
bool loop_en; /*!< Enable sending RMT items in a loop */ bool loop_en; /*!< Enable sending RMT items in a loop */
bool idle_output_en; /*!< RMT idle level output enable */ bool idle_output_en; /*!< RMT idle level output enable */
@@ -56,6 +59,12 @@ typedef struct {
uint16_t idle_threshold; /*!< RMT RX idle threshold */ uint16_t idle_threshold; /*!< RMT RX idle threshold */
uint8_t filter_ticks_thresh; /*!< RMT filter tick number */ uint8_t filter_ticks_thresh; /*!< RMT filter tick number */
bool filter_en; /*!< RMT receiver filter enable */ bool filter_en; /*!< RMT receiver filter enable */
#if SOC_RMT_SUPPORT_RX_DEMODULATION
bool rm_carrier; /*!< RMT receiver remove carrier enable */
uint32_t carrier_freq_hz; /*!< RMT carrier frequency */
uint8_t carrier_duty_percent; /*!< RMT carrier duty (%) */
rmt_carrier_level_t carrier_level; /*!< The level to remove the carrier */
#endif
} rmt_rx_config_t; } rmt_rx_config_t;
/** /**
@@ -783,6 +792,47 @@ esp_err_t rmt_write_sample(rmt_channel_t channel, const uint8_t *src, size_t src
*/ */
rmt_tx_end_callback_t rmt_register_tx_end_callback(rmt_tx_end_fn_t function, void *arg); rmt_tx_end_callback_t rmt_register_tx_end_callback(rmt_tx_end_fn_t function, void *arg);
#if SOC_RMT_SUPPORT_RX_PINGPONG
/**
* @brief Set RMT RX threshold event interrupt enable
*
* An interrupt will be triggered when the number of received items reaches the threshold value
*
* @param channel RMT channel
* @param en enable or disable RX event interrupt.
* @param evt_thresh RMT event interrupt threshold value
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_set_rx_thr_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh);
#endif
#if SOC_RMT_SUPPORT_TX_GROUP
/**
* @brief Add channel into a group (channels in the same group will transmit simultaneously)
*
* @param channel RMT channel
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_add_channel_to_group(rmt_channel_t channel);
/**
* @brief Remove channel out of a group
*
* @param channel RMT channel
*
* @return
* - ESP_ERR_INVALID_ARG Parameter error
* - ESP_OK Success
*/
esp_err_t rmt_remove_channel_from_group(rmt_channel_t channel);
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

230
components/driver/rmt.c
View File

@@ -1,4 +1,4 @@
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
// //
// Licensed under the Apache License, Version 2.0 (the "License"); // Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License. // you may not use this file except in compliance with the License.
@@ -79,6 +79,12 @@ typedef struct {
#endif #endif
rmt_item32_t *tx_buf; rmt_item32_t *tx_buf;
RingbufHandle_t rx_buf; RingbufHandle_t rx_buf;
#if SOC_RMT_SUPPORT_RX_PINGPONG
rmt_item32_t *rx_item_buf;
uint32_t rx_item_buf_size;
uint32_t rx_item_len;
uint32_t rx_item_start_idx;
#endif
sample_to_rmt_t sample_to_rmt; sample_to_rmt_t sample_to_rmt;
size_t sample_size_remain; size_t sample_size_remain;
const uint8_t *sample_cur; const uint8_t *sample_cur;
@@ -154,8 +160,8 @@ esp_err_t rmt_set_tx_carrier(rmt_channel_t channel, bool carrier_en, uint16_t hi
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_CHECK(carrier_level < RMT_CARRIER_LEVEL_MAX, RMT_CARRIER_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(carrier_level < RMT_CARRIER_LEVEL_MAX, RMT_CARRIER_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_set_carrier_high_low_ticks(p_rmt_obj[channel]->hal.regs, channel, high_level, low_level); rmt_ll_set_tx_carrier_high_low_ticks(p_rmt_obj[channel]->hal.regs, channel, high_level, low_level);
rmt_ll_set_carrier_to_level(p_rmt_obj[channel]->hal.regs, channel, carrier_level); rmt_ll_set_carrier_on_level(p_rmt_obj[channel]->hal.regs, channel, carrier_level);
rmt_ll_enable_carrier(p_rmt_obj[channel]->hal.regs, channel, carrier_en); rmt_ll_enable_carrier(p_rmt_obj[channel]->hal.regs, channel, carrier_en);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
@@ -165,7 +171,7 @@ esp_err_t rmt_set_mem_pd(rmt_channel_t channel, bool pd_en)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_power_down_mem(p_rmt_obj[channel]->hal.regs, channel, pd_en); rmt_ll_power_down_mem(p_rmt_obj[channel]->hal.regs, pd_en);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
@@ -174,7 +180,7 @@ esp_err_t rmt_get_mem_pd(rmt_channel_t channel, bool *pd_en)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
*pd_en = rmt_ll_is_mem_power_down(p_rmt_obj[channel]->hal.regs, channel); *pd_en = rmt_ll_is_mem_power_down(p_rmt_obj[channel]->hal.regs);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
@@ -187,7 +193,17 @@ esp_err_t rmt_tx_start(rmt_channel_t channel, bool tx_idx_rst)
rmt_ll_reset_tx_pointer(p_rmt_obj[channel]->hal.regs, channel); rmt_ll_reset_tx_pointer(p_rmt_obj[channel]->hal.regs, channel);
} }
rmt_ll_clear_tx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel); rmt_ll_clear_tx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel);
// enable tx end interrupt in non-loop mode
if (!rmt_ll_is_tx_loop_enabled(p_rmt_obj[channel]->hal.regs, channel)) {
rmt_ll_enable_tx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, true); rmt_ll_enable_tx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, true);
} else {
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
rmt_ll_reset_tx_loop(p_rmt_obj[channel]->hal.regs, channel);
rmt_ll_enable_tx_loop_count(p_rmt_obj[channel]->hal.regs, channel, true);
rmt_ll_clear_tx_loop_interrupt(p_rmt_obj[channel]->hal.regs, channel);
rmt_ll_enable_tx_loop_interrupt(p_rmt_obj[channel]->hal.regs, channel, true);
#endif
}
rmt_ll_start_tx(p_rmt_obj[channel]->hal.regs, channel); rmt_ll_start_tx(p_rmt_obj[channel]->hal.regs, channel);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
@@ -213,6 +229,14 @@ esp_err_t rmt_rx_start(rmt_channel_t channel, bool rx_idx_rst)
} }
rmt_ll_clear_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel); rmt_ll_clear_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel);
rmt_ll_enable_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, true); rmt_ll_enable_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, true);
#if SOC_RMT_SUPPORT_RX_PINGPONG
const uint32_t item_block_len = rmt_ll_get_mem_blocks(p_rmt_obj[channel]->hal.regs, channel) * RMT_MEM_ITEM_NUM;
p_rmt_obj[channel]->rx_item_start_idx = 0;
p_rmt_obj[channel]->rx_item_len = 0;
rmt_set_rx_thr_intr_en(channel, true, item_block_len / 2);
#endif
rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, true); rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, true);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
@@ -222,8 +246,12 @@ esp_err_t rmt_rx_stop(rmt_channel_t channel)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, false);
rmt_ll_enable_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, false); rmt_ll_enable_rx_end_interrupt(p_rmt_obj[channel]->hal.regs, channel, false);
rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, false);
rmt_ll_reset_rx_pointer(p_rmt_obj[channel]->hal.regs, channel);
#if SOC_RMT_SUPPORT_RX_PINGPONG
rmt_ll_enable_rx_thres_interrupt(p_rmt_obj[channel]->hal.regs, channel, false);
#endif
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
@@ -262,7 +290,7 @@ esp_err_t rmt_set_tx_loop_mode(rmt_channel_t channel, bool loop_en)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_enable_tx_cyclic(p_rmt_obj[channel]->hal.regs, channel, loop_en); rmt_ll_enable_tx_loop(p_rmt_obj[channel]->hal.regs, channel, loop_en);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
@@ -271,7 +299,7 @@ esp_err_t rmt_get_tx_loop_mode(rmt_channel_t channel, bool *loop_en)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
*loop_en = rmt_ll_is_tx_cyclic_enabled(p_rmt_obj[channel]->hal.regs, channel); *loop_en = rmt_ll_is_tx_loop_enabled(p_rmt_obj[channel]->hal.regs, channel);
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
@@ -358,6 +386,26 @@ esp_err_t rmt_set_rx_intr_en(rmt_channel_t channel, bool en)
return ESP_OK; return ESP_OK;
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
esp_err_t rmt_set_rx_thr_intr_en(rmt_channel_t channel, bool en, uint16_t evt_thresh)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if (en) {
uint32_t item_block_len = rmt_ll_get_mem_blocks(p_rmt_obj[channel]->hal.regs, channel) * RMT_MEM_ITEM_NUM;
RMT_CHECK(evt_thresh <= item_block_len, "RMT EVT THRESH ERR", ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL();
rmt_ll_set_rx_limit(p_rmt_obj[channel]->hal.regs, channel, evt_thresh);
rmt_ll_enable_rx_thres_interrupt(p_rmt_obj[channel]->hal.regs, channel, true);
RMT_EXIT_CRITICAL();
} else {
RMT_ENTER_CRITICAL();
rmt_ll_enable_rx_thres_interrupt(p_rmt_obj[channel]->hal.regs, channel, false);
RMT_EXIT_CRITICAL();
}
return ESP_OK;
}
#endif
esp_err_t rmt_set_err_intr_en(rmt_channel_t channel, bool en) esp_err_t rmt_set_err_intr_en(rmt_channel_t channel, bool en)
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
@@ -380,7 +428,8 @@ esp_err_t rmt_set_tx_thr_intr_en(rmt_channel_t channel, bool en, uint16_t evt_th
{ {
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG); RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
if (en) { if (en) {
RMT_CHECK(evt_thresh <= 256, "RMT EVT THRESH ERR", ESP_ERR_INVALID_ARG); uint32_t item_block_len = rmt_ll_get_mem_blocks(p_rmt_obj[channel]->hal.regs, channel) * RMT_MEM_ITEM_NUM;
RMT_CHECK(evt_thresh <= item_block_len, "RMT EVT THRESH ERR", ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_set_tx_limit(p_rmt_obj[channel]->hal.regs, channel, evt_thresh); rmt_ll_set_tx_limit(p_rmt_obj[channel]->hal.regs, channel, evt_thresh);
rmt_ll_enable_tx_thres_interrupt(p_rmt_obj[channel]->hal.regs, channel, true); rmt_ll_enable_tx_thres_interrupt(p_rmt_obj[channel]->hal.regs, channel, true);
@@ -447,7 +496,6 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
} }
rmt_ll_set_mem_blocks(dev, channel, mem_cnt); rmt_ll_set_mem_blocks(dev, channel, mem_cnt);
rmt_ll_set_mem_owner(dev, channel, RMT_MEM_OWNER_HW); rmt_ll_set_mem_owner(dev, channel, RMT_MEM_OWNER_HW);
rmt_ll_enable_carrier(dev, channel, false); // disable carrier feature by default
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
s_rmt_src_clock_hz[channel] = rmt_source_clk_hz; s_rmt_src_clock_hz[channel] = rmt_source_clk_hz;
@@ -458,7 +506,13 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
uint8_t idle_level = rmt_param->tx_config.idle_level; uint8_t idle_level = rmt_param->tx_config.idle_level;
RMT_ENTER_CRITICAL(); RMT_ENTER_CRITICAL();
rmt_ll_enable_tx_cyclic(dev, channel, rmt_param->tx_config.loop_en); rmt_ll_enable_tx_loop(dev, channel, rmt_param->tx_config.loop_en);
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
if (rmt_param->tx_config.loop_en) {
rmt_ll_set_tx_loop_count(dev, channel, rmt_param->tx_config.loop_count);
}
#endif
/* always enable tx ping-pong */
rmt_ll_enable_tx_pingpong(dev, true); rmt_ll_enable_tx_pingpong(dev, true);
/*Set idle level */ /*Set idle level */
rmt_ll_enable_tx_idle(dev, channel, rmt_param->tx_config.idle_output_en); rmt_ll_enable_tx_idle(dev, channel, rmt_param->tx_config.idle_output_en);
@@ -470,11 +524,11 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
duty_div = rmt_source_clk_hz / carrier_freq_hz; duty_div = rmt_source_clk_hz / carrier_freq_hz;
duty_h = duty_div * carrier_duty_percent / 100; duty_h = duty_div * carrier_duty_percent / 100;
duty_l = duty_div - duty_h; duty_l = duty_div - duty_h;
rmt_ll_set_carrier_to_level(dev, channel, carrier_level); rmt_ll_set_carrier_on_level(dev, channel, carrier_level);
rmt_ll_set_carrier_high_low_ticks(dev, channel, duty_h, duty_l); rmt_ll_set_tx_carrier_high_low_ticks(dev, channel, duty_h, duty_l);
} else { } else {
rmt_ll_set_carrier_to_level(dev, channel, 0); rmt_ll_set_carrier_on_level(dev, channel, 0);
rmt_ll_set_carrier_high_low_ticks(dev, channel, 0, 0); rmt_ll_set_tx_carrier_high_low_ticks(dev, channel, 0, 0);
} }
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
@@ -490,6 +544,22 @@ static esp_err_t rmt_internal_config(rmt_dev_t *dev, const rmt_config_t *rmt_par
/* Set RX filter */ /* Set RX filter */
rmt_ll_set_rx_filter_thres(dev, channel, filter_cnt); rmt_ll_set_rx_filter_thres(dev, channel, filter_cnt);
rmt_ll_enable_rx_filter(dev, channel, rmt_param->rx_config.filter_en); rmt_ll_enable_rx_filter(dev, channel, rmt_param->rx_config.filter_en);
#if SOC_RMT_SUPPORT_RX_PINGPONG
/* always enable rx ping-pong */
rmt_ll_enable_rx_pingpong(dev, channel, true);
#endif
#if SOC_RMT_SUPPORT_RX_DEMODULATION
rmt_ll_enable_carrier(dev, channel, rmt_param->rx_config.rm_carrier);
if (rmt_param->rx_config.rm_carrier) {
uint32_t duty_total = rmt_source_clk_hz / rmt_ll_get_counter_clock_div(dev, channel) / rmt_param->rx_config.carrier_freq_hz;
uint32_t duty_high = duty_total * rmt_param->rx_config.carrier_duty_percent / 100;
// there could be residual in timing the carrier pulse, so double enlarge the theoretical value
rmt_ll_set_rx_carrier_high_low_ticks(dev, channel, duty_high * 2, (duty_total - duty_high) * 2);
rmt_ll_set_carrier_on_level(dev, channel, rmt_param->rx_config.carrier_level);
}
#endif
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
ESP_LOGD(RMT_TAG, "Rmt Rx Channel %u|Gpio %u|Sclk_Hz %u|Div %u|Thresold %u|Filter %u", ESP_LOGD(RMT_TAG, "Rmt Rx Channel %u|Gpio %u|Sclk_Hz %u|Div %u|Thresold %u|Filter %u",
@@ -660,13 +730,28 @@ static void IRAM_ATTR rmt_driver_isr_default(void *arg)
rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_SW); rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_SW);
if (p_rmt->rx_buf) { if (p_rmt->rx_buf) {
addr = RMTMEM.chan[channel].data32; addr = RMTMEM.chan[channel].data32;
#if SOC_RMT_SUPPORT_RX_PINGPONG
if (item_len > p_rmt->rx_item_start_idx) {
item_len = item_len - p_rmt->rx_item_start_idx;
}
memcpy((void *)(p_rmt->rx_item_buf + p_rmt->rx_item_len), (void *)(addr + p_rmt->rx_item_start_idx), item_len * 4);
p_rmt->rx_item_len += item_len;
BaseType_t res = xRingbufferSendFromISR(p_rmt->rx_buf, (void *)(p_rmt->rx_item_buf), p_rmt->rx_item_len * 4, &HPTaskAwoken);
#else
BaseType_t res = xRingbufferSendFromISR(p_rmt->rx_buf, (void *)addr, item_len * 4, &HPTaskAwoken); BaseType_t res = xRingbufferSendFromISR(p_rmt->rx_buf, (void *)addr, item_len * 4, &HPTaskAwoken);
#endif
if (res == pdFALSE) { if (res == pdFALSE) {
ESP_EARLY_LOGE(RMT_TAG, "RMT RX BUFFER FULL"); ESP_EARLY_LOGE(RMT_TAG, "RMT RX BUFFER FULL");
} }
} else { } else {
ESP_EARLY_LOGE(RMT_TAG, "RMT RX BUFFER ERROR"); ESP_EARLY_LOGE(RMT_TAG, "RMT RX BUFFER ERROR");
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
p_rmt->rx_item_start_idx = 0;
p_rmt->rx_item_len = 0;
memset((void *)p_rmt->rx_item_buf, 0, p_rmt->rx_item_buf_size);
#endif
rmt_ll_reset_rx_pointer(p_rmt_obj[channel]->hal.regs, channel); rmt_ll_reset_rx_pointer(p_rmt_obj[channel]->hal.regs, channel);
rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_HW); rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_HW);
rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, true); rmt_ll_enable_rx(p_rmt_obj[channel]->hal.regs, channel, true);
@@ -674,6 +759,49 @@ static void IRAM_ATTR rmt_driver_isr_default(void *arg)
rmt_ll_clear_rx_end_interrupt(hal->regs, channel); rmt_ll_clear_rx_end_interrupt(hal->regs, channel);
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
// Rx thres interrupt
status = rmt_ll_get_rx_thres_interrupt_status(hal->regs);
while (status) {
channel = __builtin_ffs(status) - 1;
status &= ~(1 << channel);
rmt_obj_t *p_rmt = p_rmt_obj[channel];
int mem_item_size = rmt_ll_get_mem_blocks(p_rmt_obj[channel]->hal.regs, channel) * RMT_MEM_ITEM_NUM;
int rx_thres_lim = rmt_ll_get_rx_limit(p_rmt_obj[channel]->hal.regs, channel);
int item_len = (p_rmt->rx_item_start_idx == 0) ? rx_thres_lim : (mem_item_size - rx_thres_lim);
if ((p_rmt->rx_item_len + item_len) < (p_rmt->rx_item_buf_size / 4)) {
rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_SW);
memcpy((void *)(p_rmt->rx_item_buf + p_rmt->rx_item_len), (void *)(RMTMEM.chan[channel].data32 + p_rmt->rx_item_start_idx), item_len * 4);
rmt_ll_set_mem_owner(p_rmt_obj[channel]->hal.regs, channel, RMT_MEM_OWNER_HW);
p_rmt->rx_item_len += item_len;
p_rmt->rx_item_start_idx += item_len;
if (p_rmt->rx_item_start_idx >= mem_item_size) {
p_rmt->rx_item_start_idx = 0;
}
} else {
ESP_EARLY_LOGE(RMT_TAG, "---RX buffer too small: %d", sizeof(p_rmt->rx_item_buf));
}
rmt_ll_clear_rx_thres_interrupt(hal->regs, channel);
}
#endif
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
// loop count interrupt
status = rmt_ll_get_tx_loop_interrupt_status(hal->regs);
while (status) {
channel = __builtin_ffs(status) - 1;
status &= ~(1 << channel);
rmt_obj_t *p_rmt = p_rmt_obj[channel];
if (p_rmt) {
xSemaphoreGiveFromISR(p_rmt->tx_sem, &HPTaskAwoken);
if (rmt_tx_end_callback.function != NULL) {
rmt_tx_end_callback.function(channel, rmt_tx_end_callback.arg);
}
}
rmt_ll_clear_tx_loop_interrupt(hal->regs, channel);
}
#endif
// Err interrupt // Err interrupt
status = rmt_ll_get_err_interrupt_status(hal->regs); status = rmt_ll_get_err_interrupt_status(hal->regs);
while (status) { while (status) {
@@ -710,7 +838,10 @@ esp_err_t rmt_driver_uninstall(rmt_channel_t channel)
rmt_set_rx_intr_en(channel, 0); rmt_set_rx_intr_en(channel, 0);
rmt_set_err_intr_en(channel, 0); rmt_set_err_intr_en(channel, 0);
rmt_set_tx_intr_en(channel, 0); rmt_set_tx_intr_en(channel, 0);
rmt_set_tx_thr_intr_en(channel, 0, 0xffff); rmt_set_tx_thr_intr_en(channel, false, 0xffff);
#if SOC_RMT_SUPPORT_RX_PINGPONG
rmt_set_rx_thr_intr_en(channel, false, 0xffff);
#endif
_lock_acquire_recursive(&rmt_driver_isr_lock); _lock_acquire_recursive(&rmt_driver_isr_lock);
@@ -742,6 +873,13 @@ esp_err_t rmt_driver_uninstall(rmt_channel_t channel)
if (p_rmt_obj[channel]->sample_to_rmt) { if (p_rmt_obj[channel]->sample_to_rmt) {
p_rmt_obj[channel]->sample_to_rmt = NULL; p_rmt_obj[channel]->sample_to_rmt = NULL;
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
if (p_rmt_obj[channel]->rx_item_buf) {
free(p_rmt_obj[channel]->rx_item_buf);
p_rmt_obj[channel]->rx_item_buf = NULL;
p_rmt_obj[channel]->rx_item_buf_size = 0;
}
#endif
free(p_rmt_obj[channel]); free(p_rmt_obj[channel]);
p_rmt_obj[channel] = NULL; p_rmt_obj[channel] = NULL;
@@ -762,12 +900,12 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
} }
#if !CONFIG_SPIRAM_USE_MALLOC #if !CONFIG_SPIRAM_USE_MALLOC
p_rmt_obj[channel] = (rmt_obj_t *)malloc(sizeof(rmt_obj_t)); p_rmt_obj[channel] = calloc(1, sizeof(rmt_obj_t));
#else #else
if (!(intr_alloc_flags & ESP_INTR_FLAG_IRAM)) { if (!(intr_alloc_flags & ESP_INTR_FLAG_IRAM)) {
p_rmt_obj[channel] = (rmt_obj_t *)malloc(sizeof(rmt_obj_t)); p_rmt_obj[channel] = calloc(1, sizeof(rmt_obj_t));
} else { } else {
p_rmt_obj[channel] = (rmt_obj_t *)heap_caps_calloc(1, sizeof(rmt_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT); p_rmt_obj[channel] = heap_caps_calloc(1, sizeof(rmt_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
} }
#endif #endif
@@ -775,7 +913,6 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
ESP_LOGE(RMT_TAG, "RMT driver malloc error"); ESP_LOGE(RMT_TAG, "RMT driver malloc error");
return ESP_ERR_NO_MEM; return ESP_ERR_NO_MEM;
} }
memset(p_rmt_obj[channel], 0, sizeof(rmt_obj_t));
rmt_hal_init(&p_rmt_obj[channel]->hal); rmt_hal_init(&p_rmt_obj[channel]->hal);
rmt_hal_channel_reset(&p_rmt_obj[channel]->hal, channel); rmt_hal_channel_reset(&p_rmt_obj[channel]->hal, channel);
@@ -804,6 +941,26 @@ esp_err_t rmt_driver_install(rmt_channel_t channel, size_t rx_buf_size, int intr
if (p_rmt_obj[channel]->rx_buf == NULL && rx_buf_size > 0) { if (p_rmt_obj[channel]->rx_buf == NULL && rx_buf_size > 0) {
p_rmt_obj[channel]->rx_buf = xRingbufferCreate(rx_buf_size, RINGBUF_TYPE_NOSPLIT); p_rmt_obj[channel]->rx_buf = xRingbufferCreate(rx_buf_size, RINGBUF_TYPE_NOSPLIT);
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
if (p_rmt_obj[channel]->rx_item_buf == NULL && rx_buf_size > 0) {
#if !CONFIG_SPIRAM_USE_MALLOC
p_rmt_obj[channel]->rx_item_buf = calloc(1, rx_buf_size);
#else
if (!(p_rmt_obj[channel]->intr_alloc_flags & ESP_INTR_FLAG_IRAM)) {
p_rmt_obj[channel]->rx_item_buf = calloc(1, rx_buf_size);
} else {
p_rmt_obj[channel]->rx_item_buf = heap_caps_calloc(1, rx_buf_size, MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
}
#endif
if (p_rmt_obj[channel]->rx_item_buf == NULL) {
ESP_LOGE(RMT_TAG, "RMT malloc fail");
return ESP_FAIL;
}
p_rmt_obj[channel]->rx_item_buf_size = rx_buf_size;
}
#endif
rmt_set_err_intr_en(channel, 1); rmt_set_err_intr_en(channel, 1);
_lock_acquire_recursive(&rmt_driver_isr_lock); _lock_acquire_recursive(&rmt_driver_isr_lock);
@@ -858,8 +1015,17 @@ esp_err_t rmt_write_items(rmt_channel_t channel, const rmt_item32_t *rmt_item, i
rmt_tx_start(channel, true); rmt_tx_start(channel, true);
p_rmt->wait_done = wait_tx_done; p_rmt->wait_done = wait_tx_done;
if (wait_tx_done) { if (wait_tx_done) {
// wait loop done
if (rmt_ll_is_tx_loop_enabled(p_rmt_obj[channel]->hal.regs, channel)) {
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
xSemaphoreTake(p_rmt->tx_sem, portMAX_DELAY); xSemaphoreTake(p_rmt->tx_sem, portMAX_DELAY);
xSemaphoreGive(p_rmt->tx_sem); xSemaphoreGive(p_rmt->tx_sem);
#endif
} else {
// wait tx end
xSemaphoreTake(p_rmt->tx_sem, portMAX_DELAY);
xSemaphoreGive(p_rmt->tx_sem);
}
} }
return ESP_OK; return ESP_OK;
} }
@@ -1000,3 +1166,27 @@ esp_err_t rmt_get_counter_clock(rmt_channel_t channel, uint32_t *clock_hz)
RMT_EXIT_CRITICAL(); RMT_EXIT_CRITICAL();
return ESP_OK; return ESP_OK;
} }
#if SOC_RMT_SUPPORT_TX_GROUP
esp_err_t rmt_add_channel_to_group(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL();
rmt_ll_enable_tx_sync(p_rmt_obj[channel]->hal.regs, true);
rmt_ll_add_channel_to_group(p_rmt_obj[channel]->hal.regs, channel);
rmt_ll_reset_counter_clock_div(p_rmt_obj[channel]->hal.regs, channel);
RMT_EXIT_CRITICAL();
return ESP_OK;
}
esp_err_t rmt_remove_channel_from_group(rmt_channel_t channel)
{
RMT_CHECK(channel < RMT_CHANNEL_MAX, RMT_CHANNEL_ERROR_STR, ESP_ERR_INVALID_ARG);
RMT_ENTER_CRITICAL();
if (rmt_ll_remove_channel_from_group(p_rmt_obj[channel]->hal.regs, channel) == 0) {
rmt_ll_enable_tx_sync(p_rmt_obj[channel]->hal.regs, false);
}
RMT_EXIT_CRITICAL();
return ESP_OK;
}
#endif

236
components/driver/test/test_rmt.c
View File

@@ -1,5 +1,5 @@
// RMT driver unit test is based on extended NEC protocol // RMT driver unit test is based on extended NEC protocol
// Please don't use channel number: RMT_CHANNELS_NUM - 1 // Please don't use channel number: SOC_RMT_CHANNELS_NUM - 1
#include <stdio.h> #include <stdio.h>
#include <string.h> #include <string.h>
#include "sdkconfig.h" #include "sdkconfig.h"
@@ -14,6 +14,10 @@
// CI ONLY: Don't connect any other signals to this GPIO // CI ONLY: Don't connect any other signals to this GPIO
#define RMT_DATA_IO (12) // bind signal RMT_SIG_OUT0_IDX and RMT_SIG_IN0_IDX on the same GPIO #define RMT_DATA_IO (12) // bind signal RMT_SIG_OUT0_IDX and RMT_SIG_IN0_IDX on the same GPIO
#define RMT_TESTBENCH_FLAGS_ALWAYS_ON (1<<0)
#define RMT_TESTBENCH_FLAGS_CARRIER_ON (1<<1)
#define RMT_TESTBENCH_FLAGS_LOOP_ON (1<<2)
static const char *TAG = "RMT.test"; static const char *TAG = "RMT.test";
static ir_builder_t *s_ir_builder = NULL; static ir_builder_t *s_ir_builder = NULL;
static ir_parser_t *s_ir_parser = NULL; static ir_parser_t *s_ir_parser = NULL;
@@ -23,13 +27,34 @@ static void rmt_setup_testbench(int tx_channel, int rx_channel, uint32_t flags)
// RMT channel configuration // RMT channel configuration
if (tx_channel >= 0) { if (tx_channel >= 0) {
rmt_config_t tx_config = RMT_DEFAULT_CONFIG_TX(RMT_DATA_IO, tx_channel); rmt_config_t tx_config = RMT_DEFAULT_CONFIG_TX(RMT_DATA_IO, tx_channel);
tx_config.flags = flags; if (flags & RMT_TESTBENCH_FLAGS_ALWAYS_ON) {
tx_config.flags |= RMT_CHANNEL_FLAGS_ALWAYS_ON;
}
if (flags & RMT_TESTBENCH_FLAGS_CARRIER_ON) {
tx_config.tx_config.carrier_en = true;
}
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
if (flags & RMT_TESTBENCH_FLAGS_LOOP_ON) {
tx_config.tx_config.loop_en = true;
tx_config.tx_config.loop_count = 10;
}
#endif
TEST_ESP_OK(rmt_config(&tx_config)); TEST_ESP_OK(rmt_config(&tx_config));
} }
if (rx_channel >= 0) { if (rx_channel >= 0) {
rmt_config_t rx_config = RMT_DEFAULT_CONFIG_RX(RMT_DATA_IO, rx_channel); rmt_config_t rx_config = RMT_DEFAULT_CONFIG_RX(RMT_DATA_IO, rx_channel);
rx_config.flags = flags; if (flags & RMT_TESTBENCH_FLAGS_ALWAYS_ON) {
rx_config.flags |= RMT_CHANNEL_FLAGS_ALWAYS_ON;
}
#if SOC_RMT_SUPPORT_RX_DEMODULATION
if (flags & RMT_TESTBENCH_FLAGS_CARRIER_ON) {
rx_config.rx_config.rm_carrier = true;
rx_config.rx_config.carrier_freq_hz = 38000;
rx_config.rx_config.carrier_duty_percent = 33;
rx_config.rx_config.carrier_level = RMT_CARRIER_LEVEL_HIGH;
}
#endif
TEST_ESP_OK(rmt_config(&rx_config)); TEST_ESP_OK(rmt_config(&rx_config));
} }
@@ -83,7 +108,7 @@ TEST_CASE("RMT wrong configuration", "[rmt][error]")
TEST_ASSERT(rmt_config(&wrong_config) == ESP_ERR_INVALID_ARG); TEST_ASSERT(rmt_config(&wrong_config) == ESP_ERR_INVALID_ARG);
wrong_config = correct_config; wrong_config = correct_config;
wrong_config.channel = RMT_CHANNELS_NUM; wrong_config.channel = SOC_RMT_CHANNELS_NUM;
TEST_ASSERT(rmt_config(&wrong_config) == ESP_ERR_INVALID_ARG); TEST_ASSERT(rmt_config(&wrong_config) == ESP_ERR_INVALID_ARG);
wrong_config = correct_config; wrong_config = correct_config;
@@ -95,7 +120,7 @@ TEST_CASE("RMT wrong configuration", "[rmt][error]")
TEST_CASE("RMT miscellaneous functions", "[rmt]") TEST_CASE("RMT miscellaneous functions", "[rmt]")
{ {
rmt_channel_t channel = RMT_CHANNELS_NUM - 2; rmt_channel_t channel = SOC_RMT_CHANNELS_NUM - 2;
uint8_t div_cnt; uint8_t div_cnt;
rmt_source_clk_t src_clk; rmt_source_clk_t src_clk;
uint8_t memNum; uint8_t memNum;
@@ -160,7 +185,7 @@ TEST_CASE("RMT multiple channels", "[rmt]")
TEST_CASE("RMT install/uninstall test", "[rmt][pressure]") TEST_CASE("RMT install/uninstall test", "[rmt][pressure]")
{ {
rmt_config_t rx_cfg = RMT_DEFAULT_CONFIG_TX(RMT_DATA_IO, RMT_CHANNELS_NUM - 2); rmt_config_t rx_cfg = RMT_DEFAULT_CONFIG_TX(RMT_DATA_IO, SOC_RMT_CHANNELS_NUM - 2);
TEST_ESP_OK(rmt_config(&rx_cfg)); TEST_ESP_OK(rmt_config(&rx_cfg));
for (int i = 0; i < 100; i++) { for (int i = 0; i < 100; i++) {
TEST_ESP_OK(rmt_driver_install(rx_cfg.channel, 1000, 0)); TEST_ESP_OK(rmt_driver_install(rx_cfg.channel, 1000, 0));
@@ -168,7 +193,7 @@ TEST_CASE("RMT install/uninstall test", "[rmt][pressure]")
} }
} }
TEST_CASE("RMT NEC TX and RX", "[rmt][timeout=240]") static void do_nec_tx_rx(uint32_t flags)
{ {
RingbufHandle_t rb = NULL; RingbufHandle_t rb = NULL;
rmt_item32_t *items = NULL; rmt_item32_t *items = NULL;
@@ -179,11 +204,8 @@ TEST_CASE("RMT NEC TX and RX", "[rmt][timeout=240]")
int tx_channel = 0; int tx_channel = 0;
int rx_channel = 1; int rx_channel = 1;
uint32_t test_flags[] = {0, RMT_CHANNEL_FLAGS_ALWAYS_ON}; // test REF_TICK clock source
// test on different flags combinations // test on different flags combinations
for (int run = 0; run < sizeof(test_flags) / sizeof(test_flags[0]); run++) { rmt_setup_testbench(tx_channel, rx_channel, flags);
rmt_setup_testbench(tx_channel, rx_channel, test_flags[run]);
// get ready to receive // get ready to receive
TEST_ESP_OK(rmt_get_ringbuf_handle(rx_channel, &rb)); TEST_ESP_OK(rmt_get_ringbuf_handle(rx_channel, &rb));
@@ -228,14 +250,33 @@ TEST_CASE("RMT NEC TX and RX", "[rmt][timeout=240]")
TEST_ASSERT_EQUAL(0x30, cmd); TEST_ASSERT_EQUAL(0x30, cmd);
rmt_clean_testbench(tx_channel, rx_channel); rmt_clean_testbench(tx_channel, rx_channel);
} }
// basic nec tx and rx test, using APB source clock, no modulation
TEST_CASE("RMT NEC TX and RX (APB)", "[rmt]")
{
do_nec_tx_rx(0);
} }
TEST_CASE("RMT TX (RMT_CHANNEL_MEM_WORDS-1) symbols", "[rmt][boundary]") // test with RMT_TESTBENCH_FLAGS_ALWAYS_ON will take a long time (REF_TICK is much slower than APB CLOCK)
TEST_CASE("RMT NEC TX and RX (REF_TICK)", "[rmt][timeout=240]")
{
do_nec_tx_rx(RMT_TESTBENCH_FLAGS_ALWAYS_ON);
}
#if SOC_RMT_SUPPORT_RX_DEMODULATION
// basic nec tx and rx test, using APB source clock, with modulation and demodulation on
TEST_CASE("RMT NEC TX and RX (Modulation/Demodulation)", "[rmt]")
{
do_nec_tx_rx(RMT_TESTBENCH_FLAGS_CARRIER_ON);
}
#endif
TEST_CASE("RMT TX (SOC_RMT_CHANNEL_MEM_WORDS-1) symbols", "[rmt][boundary]")
{ {
int tx_channel = 0; int tx_channel = 0;
rmt_setup_testbench(tx_channel, -1, 0); rmt_setup_testbench(tx_channel, -1, 0);
rmt_item32_t *items = malloc(sizeof(rmt_item32_t) * (RMT_CHANNEL_MEM_WORDS - 1)); rmt_item32_t *items = malloc(sizeof(rmt_item32_t) * (SOC_RMT_CHANNEL_MEM_WORDS - 1));
for (int i = 0; i < RMT_CHANNEL_MEM_WORDS - 1; i++) { for (int i = 0; i < SOC_RMT_CHANNEL_MEM_WORDS - 1; i++) {
items[i] = (rmt_item32_t) { items[i] = (rmt_item32_t) {
{{ {{
200, 1, 200, 0 200, 1, 200, 0
@@ -243,7 +284,7 @@ TEST_CASE("RMT TX (RMT_CHANNEL_MEM_WORDS-1) symbols", "[rmt][boundary]")
} }
}; };
} }
TEST_ESP_OK(rmt_write_items(tx_channel, items, RMT_CHANNEL_MEM_WORDS - 1, 1)); TEST_ESP_OK(rmt_write_items(tx_channel, items, SOC_RMT_CHANNEL_MEM_WORDS - 1, 1));
free(items); free(items);
rmt_clean_testbench(tx_channel, -1); rmt_clean_testbench(tx_channel, -1);
} }
@@ -312,3 +353,168 @@ TEST_CASE("RMT TX stop", "[rmt]")
TEST_ASSERT(num < count); TEST_ASSERT(num < count);
rmt_clean_testbench(tx_channel, rx_channel); rmt_clean_testbench(tx_channel, rx_channel);
} }
#if SOC_RMT_SUPPORT_RX_PINGPONG
TEST_CASE("RMT Ping-Pong operation", "[rmt]")
{
int tx_channel = 0;
int rx_channel = 1;
rmt_item32_t frames[SOC_RMT_CHANNEL_MEM_WORDS * 2]; // send two block data using ping-pong
RingbufHandle_t rb = NULL;
uint32_t size = sizeof(frames) / sizeof(frames[0]);
// The design of the following test frame should trigger three rx threshold interrupt and one rx end interrupt
int i = 0;
for (i = 0; i < size - 1; i++) {
frames[i].level0 = 1;
frames[i].duration0 = 100;
frames[i].level1 = 0;
frames[i].duration1 = 100;
}
frames[i].level0 = 1;
frames[i].duration0 = 0;
frames[i].level1 = 0;
frames[i].duration1 = 0;
rmt_setup_testbench(tx_channel, rx_channel, 0);
// get ready to receive
TEST_ESP_OK(rmt_get_ringbuf_handle(rx_channel, &rb));
TEST_ASSERT_NOT_NULL(rb);
TEST_ESP_OK(rmt_rx_start(rx_channel, true));
vTaskDelay(pdMS_TO_TICKS(1000));
for (uint32_t test_count = 0; test_count < 5; test_count++) {
TEST_ESP_OK(rmt_write_items(tx_channel, frames, size, true));
// parse received data
uint32_t length = 0;
rmt_item32_t *items = (rmt_item32_t *) xRingbufferReceive(rb, &length, 1000);
if (items) {
vRingbufferReturnItem(rb, (void *) items);
}
TEST_ASSERT_EQUAL(4 * (size - 1), length);
}
rmt_clean_testbench(tx_channel, rx_channel);
}
#endif
#if SOC_RMT_SUPPORT_TX_GROUP
static uint32_t tx_end_time0, tx_end_time1;
static void rmt_tx_end_cb(rmt_channel_t channel, void *arg)
{
if (channel == 0) {
tx_end_time0 = esp_cpu_get_ccount();
} else {
tx_end_time1 = esp_cpu_get_ccount();
}
}
TEST_CASE("RMT TX simultaneously", "[rmt]")
{
rmt_item32_t frames[SOC_RMT_CHANNEL_MEM_WORDS];
uint32_t size = sizeof(frames) / sizeof(frames[0]);
int channel0 = 0;
int channel1 = 1;
int i = 0;
for (i = 0; i < size - 1; i++) {
frames[i].level0 = 1;
frames[i].duration0 = 1000;
frames[i].level1 = 0;
frames[i].duration1 = 1000;
}
frames[i].level0 = 0;
frames[i].duration0 = 0;
frames[i].level1 = 0;
frames[i].duration1 = 0;
rmt_config_t tx_config0 = RMT_DEFAULT_CONFIG_TX(12, channel0);
rmt_config_t tx_config1 = RMT_DEFAULT_CONFIG_TX(13, channel1);
TEST_ESP_OK(rmt_config(&tx_config0));
TEST_ESP_OK(rmt_config(&tx_config1));
TEST_ESP_OK(rmt_driver_install(channel0, 0, 0));
TEST_ESP_OK(rmt_driver_install(channel1, 0, 0));
rmt_register_tx_end_callback(rmt_tx_end_cb, NULL);
TEST_ESP_OK(rmt_add_channel_to_group(channel0));
TEST_ESP_OK(rmt_add_channel_to_group(channel1));
TEST_ESP_OK(rmt_write_items(channel0, frames, size, false));
vTaskDelay(pdMS_TO_TICKS(1000));
TEST_ESP_OK(rmt_write_items(channel1, frames, size, false));
TEST_ESP_OK(rmt_wait_tx_done(channel0, portMAX_DELAY));
TEST_ESP_OK(rmt_wait_tx_done(channel1, portMAX_DELAY));
ESP_LOGI(TAG, "tx_end_time0=%u, tx_end_time1=%u", tx_end_time0, tx_end_time1);
TEST_ASSERT_LESS_OR_EQUAL_UINT32(2000, tx_end_time1 - tx_end_time0);
TEST_ESP_OK(rmt_remove_channel_from_group(channel0));
TEST_ESP_OK(rmt_remove_channel_from_group(channel1));
TEST_ESP_OK(rmt_driver_uninstall(channel0));
TEST_ESP_OK(rmt_driver_uninstall(channel1));
}
#endif
#if SOC_RMT_SUPPORT_TX_LOOP_COUNT
static void rmt_tx_loop_end(rmt_channel_t channel, void *arg)
{
rmt_tx_stop(channel);
}
TEST_CASE("RMT TX loop", "[rmt]")
{
RingbufHandle_t rb = NULL;
rmt_item32_t *items = NULL;
uint32_t length = 0;
uint32_t addr = 0x10;
uint32_t cmd = 0x20;
bool repeat = false;
int tx_channel = 0;
int rx_channel = 1;
uint32_t count = 0;
rmt_setup_testbench(tx_channel, rx_channel, RMT_TESTBENCH_FLAGS_LOOP_ON);
// get ready to receive
TEST_ESP_OK(rmt_get_ringbuf_handle(rx_channel, &rb));
TEST_ASSERT_NOT_NULL(rb);
TEST_ESP_OK(rmt_rx_start(rx_channel, true));
vTaskDelay(pdMS_TO_TICKS(1000));
// register callback functions, invoked when tx loop count to ceiling
rmt_register_tx_end_callback(rmt_tx_loop_end, NULL);
// build NEC codes
ESP_LOGI(TAG, "Send command 0x%x to address 0x%x", cmd, addr);
// Send new key code
TEST_ESP_OK(s_ir_builder->build_frame(s_ir_builder, addr, cmd));
TEST_ESP_OK(s_ir_builder->get_result(s_ir_builder, &items, &length));
TEST_ESP_OK(rmt_write_items(tx_channel, items, length, true)); // wait until done
// parse NEC codes
while (rb) {
items = (rmt_item32_t *) xRingbufferReceive(rb, &length, 1000);
if (items) {
length /= 4; // one RMT = 4 Bytes
if (s_ir_parser->input(s_ir_parser, items, length) == ESP_OK) {
if (s_ir_parser->get_scan_code(s_ir_parser, &addr, &cmd, &repeat) == ESP_OK) {
count++;
ESP_LOGI(TAG, "Scan Code %s --- addr: 0x%04x cmd: 0x%04x", repeat ? "(repeat)" : "", addr, cmd);
}
}
vRingbufferReturnItem(rb, (void *) items);
} else {
ESP_LOGI(TAG, "done");
break;
}
}
TEST_ASSERT_EQUAL(10, count);
rmt_clean_testbench(tx_channel, rx_channel);
}
#endif

2
components/soc/include/hal/rmt_types.h
View File

@@ -29,7 +29,7 @@ typedef enum {
RMT_CHANNEL_1, /*!< RMT channel number 1 */ RMT_CHANNEL_1, /*!< RMT channel number 1 */
RMT_CHANNEL_2, /*!< RMT channel number 2 */ RMT_CHANNEL_2, /*!< RMT channel number 2 */
RMT_CHANNEL_3, /*!< RMT channel number 3 */ RMT_CHANNEL_3, /*!< RMT channel number 3 */
#if RMT_CHANNELS_NUM > 4 #if SOC_RMT_CHANNELS_NUM > 4
RMT_CHANNEL_4, /*!< RMT channel number 4 */ RMT_CHANNEL_4, /*!< RMT channel number 4 */
RMT_CHANNEL_5, /*!< RMT channel number 5 */ RMT_CHANNEL_5, /*!< RMT channel number 5 */
RMT_CHANNEL_6, /*!< RMT channel number 6 */ RMT_CHANNEL_6, /*!< RMT channel number 6 */

4
components/soc/soc/esp32/include/soc/rmt_caps.h
View File

@@ -18,8 +18,8 @@
extern "C" { extern "C" {
#endif #endif
#define RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory */ #define SOC_RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory */
#define RMT_CHANNELS_NUM (8) /*!< Total 8 channels */ #define SOC_RMT_CHANNELS_NUM (8) /*!< Total 8 channels */
#ifdef __cplusplus #ifdef __cplusplus
} }

8
components/soc/soc/esp32s2/include/soc/rmt_caps.h
View File

@@ -18,8 +18,12 @@
extern "C" { extern "C" {
#endif #endif
#define RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory */ #define SOC_RMT_CHANNEL_MEM_WORDS (64) /*!< Each channel owns 64 words memory (1 word = 4 Bytes) */
#define RMT_CHANNELS_NUM (4) /*!< Total 4 channels */ #define SOC_RMT_CHANNELS_NUM (4) /*!< Total 4 channels */
#define SOC_RMT_SUPPORT_RX_PINGPONG (1) /*!< Support Ping-Pong mode on RX path */
#define SOC_RMT_SUPPORT_RX_DEMODULATION (1) /*!< Support signal demodulation on RX path (i.e. remove carrier) */
#define SOC_RMT_SUPPORT_TX_LOOP_COUNT (1) /*!< Support transmit specified number of cycles in loop mode */
#define SOC_RMT_SUPPORT_TX_GROUP (1) /*!< Support a group of TX channels to transmit simultaneously */
#ifdef __cplusplus #ifdef __cplusplus
} }

4
components/soc/soc/esp32s2/include/soc/rmt_struct.h
View File

@@ -21,7 +21,7 @@ extern "C" {
#endif #endif
typedef volatile struct { typedef volatile struct {
uint32_t data_ch[4]; /**/ uint32_t data_ch[4]; /* Data FIFO, Can only be accessed by PeriBus2 */
struct { struct {
union { union {
struct { struct {
@@ -283,7 +283,7 @@ typedef volatile struct {
uint32_t reserved_f0; uint32_t reserved_f0;
uint32_t reserved_f4; uint32_t reserved_f4;
uint32_t reserved_f8; uint32_t reserved_f8;
uint32_t date; /**/ uint32_t date; /* Version Control Register */
} rmt_dev_t; } rmt_dev_t;
extern rmt_dev_t RMT; extern rmt_dev_t RMT;

26
components/soc/src/esp32/include/hal/rmt_ll.h
View File

@@ -21,6 +21,11 @@ extern "C" {
#include "soc/rmt_struct.h" #include "soc/rmt_struct.h"
#include "soc/rmt_caps.h" #include "soc/rmt_caps.h"
static inline void rmt_ll_enable_drive_clock(rmt_dev_t *dev, bool enable)
{
dev->conf_ch[0].conf0.clk_en = enable;
}
static inline void rmt_ll_reset_counter_clock_div(rmt_dev_t *dev, uint32_t channel) static inline void rmt_ll_reset_counter_clock_div(rmt_dev_t *dev, uint32_t channel)
{ {
dev->conf_ch[channel].conf1.ref_cnt_rst = 1; dev->conf_ch[channel].conf1.ref_cnt_rst = 1;
@@ -57,14 +62,14 @@ static inline void rmt_ll_enable_rx(rmt_dev_t *dev, uint32_t channel, bool enabl
dev->conf_ch[channel].conf1.rx_en = enable; dev->conf_ch[channel].conf1.rx_en = enable;
} }
static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable)
{ {
dev->conf_ch[channel].conf0.mem_pd = enable; dev->conf_ch[0].conf0.mem_pd = enable; // Only conf0 register of channel0 has `mem_pd`
} }
static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev, uint32_t channel) static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev)
{ {
return dev->conf_ch[channel].conf0.mem_pd; return dev->conf_ch[0].conf0.mem_pd; // Only conf0 register of channel0 has `mem_pd`
} }
static inline void rmt_ll_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num) static inline void rmt_ll_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num)
@@ -84,7 +89,8 @@ static inline void rmt_ll_set_counter_clock_div(rmt_dev_t *dev, uint32_t channel
static inline uint32_t rmt_ll_get_counter_clock_div(rmt_dev_t *dev, uint32_t channel) static inline uint32_t rmt_ll_get_counter_clock_div(rmt_dev_t *dev, uint32_t channel)
{ {
return dev->conf_ch[channel].conf0.div_cnt; uint32_t div = dev->conf_ch[channel].conf0.div_cnt;
return div == 0 ? 256 : div;
} }
static inline void rmt_ll_enable_tx_pingpong(rmt_dev_t *dev, bool enable) static inline void rmt_ll_enable_tx_pingpong(rmt_dev_t *dev, bool enable)
@@ -117,12 +123,12 @@ static inline uint32_t rmt_ll_get_mem_owner(rmt_dev_t *dev, uint32_t channel)
return dev->conf_ch[channel].conf1.mem_owner; return dev->conf_ch[channel].conf1.mem_owner;
} }
static inline void rmt_ll_enable_tx_cyclic(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_enable_tx_loop(rmt_dev_t *dev, uint32_t channel, bool enable)
{ {
dev->conf_ch[channel].conf1.tx_conti_mode = enable; dev->conf_ch[channel].conf1.tx_conti_mode = enable;
} }
static inline bool rmt_ll_is_tx_cyclic_enabled(rmt_dev_t *dev, uint32_t channel) static inline bool rmt_ll_is_tx_loop_enabled(rmt_dev_t *dev, uint32_t channel)
{ {
return dev->conf_ch[channel].conf1.tx_conti_mode; return dev->conf_ch[channel].conf1.tx_conti_mode;
} }
@@ -248,7 +254,7 @@ static inline uint32_t rmt_ll_get_tx_thres_interrupt_status(rmt_dev_t *dev)
return (status & 0xFF000000) >> 24; return (status & 0xFF000000) >> 24;
} }
static inline void rmt_ll_set_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks) static inline void rmt_ll_set_tx_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
{ {
dev->carrier_duty_ch[channel].high = high_ticks; dev->carrier_duty_ch[channel].high = high_ticks;
dev->carrier_duty_ch[channel].low = low_ticks; dev->carrier_duty_ch[channel].low = low_ticks;
@@ -265,14 +271,14 @@ static inline void rmt_ll_enable_carrier(rmt_dev_t *dev, uint32_t channel, bool
dev->conf_ch[channel].conf0.carrier_en = enable; dev->conf_ch[channel].conf0.carrier_en = enable;
} }
static inline void rmt_ll_set_carrier_to_level(rmt_dev_t *dev, uint32_t channel, uint8_t level) static inline void rmt_ll_set_carrier_on_level(rmt_dev_t *dev, uint32_t channel, uint8_t level)
{ {
dev->conf_ch[channel].conf0.carrier_out_lv = level; dev->conf_ch[channel].conf0.carrier_out_lv = level;
} }
static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const rmt_item32_t *data, uint32_t length, uint32_t off) static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const rmt_item32_t *data, uint32_t length, uint32_t off)
{ {
length = (off + length) > RMT_CHANNEL_MEM_WORDS ? (RMT_CHANNEL_MEM_WORDS - off) : length; length = (off + length) > SOC_RMT_CHANNEL_MEM_WORDS ? (SOC_RMT_CHANNEL_MEM_WORDS - off) : length;
for (uint32_t i = 0; i < length; i++) { for (uint32_t i = 0; i < length; i++) {
mem->chan[channel].data32[i + off].val = data[i].val; mem->chan[channel].data32[i + off].val = data[i].val;
} }

131
components/soc/src/esp32s2/include/hal/rmt_ll.h
View File

@@ -21,9 +21,16 @@ extern "C" {
#include "soc/rmt_struct.h" #include "soc/rmt_struct.h"
#include "soc/rmt_caps.h" #include "soc/rmt_caps.h"
static inline void rmt_ll_enable_drive_clock(rmt_dev_t *dev, bool enable)
{
dev->apb_conf.clk_en = enable; // register clock gating
dev->apb_conf.mem_clk_force_on = enable; // memory clock gating
}
static inline void rmt_ll_reset_counter_clock_div(rmt_dev_t *dev, uint32_t channel) static inline void rmt_ll_reset_counter_clock_div(rmt_dev_t *dev, uint32_t channel)
{ {
dev->ref_cnt_rst.val |= (1 << channel);
dev->ref_cnt_rst.val &= ~(1 << channel);
} }
static inline void rmt_ll_reset_tx_pointer(rmt_dev_t *dev, uint32_t channel) static inline void rmt_ll_reset_tx_pointer(rmt_dev_t *dev, uint32_t channel)
@@ -53,14 +60,18 @@ static inline void rmt_ll_enable_rx(rmt_dev_t *dev, uint32_t channel, bool enabl
dev->conf_ch[channel].conf1.rx_en = enable; dev->conf_ch[channel].conf1.rx_en = enable;
} }
static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_power_down_mem(rmt_dev_t *dev, bool enable)
{ {
dev->apb_conf.mem_force_pu = !enable;
dev->apb_conf.mem_force_pd = enable; dev->apb_conf.mem_force_pd = enable;
} }
static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev, uint32_t channel) static inline bool rmt_ll_is_mem_power_down(rmt_dev_t *dev)
{ {
return dev->apb_conf.mem_force_pd; // the RTC domain can also power down RMT memory
// so it's probably not enough to detect whether it's powered down or not
// mem_force_pd has higher priority than mem_force_pu
return (dev->apb_conf.mem_force_pd) || !(dev->apb_conf.mem_force_pu);
} }
static inline void rmt_ll_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num) static inline void rmt_ll_set_mem_blocks(rmt_dev_t *dev, uint32_t channel, uint8_t block_num)
@@ -80,7 +91,8 @@ static inline void rmt_ll_set_counter_clock_div(rmt_dev_t *dev, uint32_t channel
static inline uint32_t rmt_ll_get_counter_clock_div(rmt_dev_t *dev, uint32_t channel) static inline uint32_t rmt_ll_get_counter_clock_div(rmt_dev_t *dev, uint32_t channel)
{ {
return dev->conf_ch[channel].conf0.div_cnt; uint32_t div = dev->conf_ch[channel].conf0.div_cnt;
return div == 0 ? 256 : div;
} }
static inline void rmt_ll_enable_tx_pingpong(rmt_dev_t *dev, bool enable) static inline void rmt_ll_enable_tx_pingpong(rmt_dev_t *dev, bool enable)
@@ -113,16 +125,48 @@ static inline uint32_t rmt_ll_get_mem_owner(rmt_dev_t *dev, uint32_t channel)
return dev->conf_ch[channel].conf1.mem_owner; return dev->conf_ch[channel].conf1.mem_owner;
} }
static inline void rmt_ll_enable_tx_cyclic(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_enable_tx_loop(rmt_dev_t *dev, uint32_t channel, bool enable)
{ {
dev->conf_ch[channel].conf1.tx_conti_mode = enable; dev->conf_ch[channel].conf1.tx_conti_mode = enable;
} }
static inline bool rmt_ll_is_tx_cyclic_enabled(rmt_dev_t *dev, uint32_t channel) static inline bool rmt_ll_is_tx_loop_enabled(rmt_dev_t *dev, uint32_t channel)
{ {
return dev->conf_ch[channel].conf1.tx_conti_mode; return dev->conf_ch[channel].conf1.tx_conti_mode;
} }
static inline void rmt_ll_set_tx_loop_count(rmt_dev_t *dev, uint32_t channel, uint32_t count)
{
dev->tx_lim_ch[channel].tx_loop_num = count;
}
static inline void rmt_ll_reset_tx_loop(rmt_dev_t *dev, uint32_t channel)
{
dev->tx_lim_ch[channel].loop_count_reset = 1;
dev->tx_lim_ch[channel].loop_count_reset = 0;
}
static inline void rmt_ll_enable_tx_loop_count(rmt_dev_t *dev, uint32_t channel, bool enable)
{
dev->tx_lim_ch[channel].tx_loop_cnt_en = enable;
}
static inline void rmt_ll_enable_tx_sync(rmt_dev_t *dev, bool enable)
{
dev->tx_sim.en = enable;
}
static inline void rmt_ll_add_channel_to_group(rmt_dev_t *dev, uint32_t channel)
{
dev->tx_sim.val |= 1 << channel;
}
static inline uint32_t rmt_ll_remove_channel_from_group(rmt_dev_t *dev, uint32_t channel)
{
dev->tx_sim.val &= ~(1 << channel);
return dev->tx_sim.val & 0x0F;
}
static inline void rmt_ll_enable_rx_filter(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_enable_rx_filter(rmt_dev_t *dev, uint32_t channel, bool enable)
{ {
dev->conf_ch[channel].conf1.rx_filter_en = enable; dev->conf_ch[channel].conf1.rx_filter_en = enable;
@@ -173,6 +217,16 @@ static inline void rmt_ll_set_tx_limit(rmt_dev_t *dev, uint32_t channel, uint32_
dev->tx_lim_ch[channel].limit = limit; dev->tx_lim_ch[channel].limit = limit;
} }
static inline void rmt_ll_set_rx_limit(rmt_dev_t *dev, uint32_t channel, uint32_t limit)
{
dev->tx_lim_ch[channel].rx_lim = limit;
}
static inline uint32_t rmt_ll_get_rx_limit(rmt_dev_t *dev, uint32_t channel)
{
return dev->tx_lim_ch[channel].rx_lim;
}
static inline void rmt_ll_enable_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_enable_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
{ {
dev->int_ena.val &= ~(1 << (channel * 3)); dev->int_ena.val &= ~(1 << (channel * 3));
@@ -197,6 +251,18 @@ static inline void rmt_ll_enable_tx_thres_interrupt(rmt_dev_t *dev, uint32_t cha
dev->int_ena.val |= (enable << (channel + 12)); dev->int_ena.val |= (enable << (channel + 12));
} }
static inline void rmt_ll_enable_tx_loop_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
{
dev->int_ena.val &= ~(1 << (channel + 16));
dev->int_ena.val |= (enable << (channel + 16));
}
static inline void rmt_ll_enable_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel, bool enable)
{
dev->int_ena.val &= ~(1 << (channel + 20));
dev->int_ena.val |= (enable << (channel + 20));
}
static inline void rmt_ll_clear_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel) static inline void rmt_ll_clear_tx_end_interrupt(rmt_dev_t *dev, uint32_t channel)
{ {
dev->int_clr.val = (1 << (channel * 3)); dev->int_clr.val = (1 << (channel * 3));
@@ -217,6 +283,16 @@ static inline void rmt_ll_clear_tx_thres_interrupt(rmt_dev_t *dev, uint32_t chan
dev->int_clr.val = (1 << (channel + 12)); dev->int_clr.val = (1 << (channel + 12));
} }
static inline void rmt_ll_clear_tx_loop_interrupt(rmt_dev_t *dev, uint32_t channel)
{
dev->int_clr.val = (1 << (channel + 16));
}
static inline void rmt_ll_clear_rx_thres_interrupt(rmt_dev_t *dev, uint32_t channel)
{
dev->int_clr.val = (1 << (channel + 20));
}
static inline uint32_t rmt_ll_get_tx_end_interrupt_status(rmt_dev_t *dev) static inline uint32_t rmt_ll_get_tx_end_interrupt_status(rmt_dev_t *dev)
{ {
uint32_t status = dev->int_st.val; uint32_t status = dev->int_st.val;
@@ -232,7 +308,7 @@ static inline uint32_t rmt_ll_get_rx_end_interrupt_status(rmt_dev_t *dev)
static inline uint32_t rmt_ll_get_err_interrupt_status(rmt_dev_t *dev) static inline uint32_t rmt_ll_get_err_interrupt_status(rmt_dev_t *dev)
{ {
uint32_t status = dev->int_st.val; uint32_t status = dev->int_st.val;
return ((status & 0x04) >> 2) | ((status & 0x20) >> 4) | ((status & 0x100) >> 6) | ((status & 0x800) >> 8);; return ((status & 0x04) >> 2) | ((status & 0x20) >> 4) | ((status & 0x100) >> 6) | ((status & 0x800) >> 8);
} }
static inline uint32_t rmt_ll_get_tx_thres_interrupt_status(rmt_dev_t *dev) static inline uint32_t rmt_ll_get_tx_thres_interrupt_status(rmt_dev_t *dev)
@@ -241,36 +317,69 @@ static inline uint32_t rmt_ll_get_tx_thres_interrupt_status(rmt_dev_t *dev)
return (status & 0xF000) >> 12; return (status & 0xF000) >> 12;
} }
static inline void rmt_ll_set_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks) static inline uint32_t rmt_ll_get_tx_loop_interrupt_status(rmt_dev_t *dev)
{
uint32_t status = dev->int_st.val;
return (status & 0xF0000) >> 16;
}
static inline uint32_t rmt_ll_get_rx_thres_interrupt_status(rmt_dev_t *dev)
{
uint32_t status = dev->int_st.val;
return (status & 0xF00000) >> 20;
}
static inline void rmt_ll_set_tx_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
{ {
dev->carrier_duty_ch[channel].high = high_ticks; dev->carrier_duty_ch[channel].high = high_ticks;
dev->carrier_duty_ch[channel].low = low_ticks; dev->carrier_duty_ch[channel].low = low_ticks;
} }
static inline void rmt_ll_set_rx_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t high_ticks, uint32_t low_ticks)
{
dev->ch_rx_carrier_rm[channel].carrier_high_thres_ch = high_ticks;
dev->ch_rx_carrier_rm[channel].carrier_low_thres_ch = low_ticks;
}
static inline void rmt_ll_get_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t *high_ticks, uint32_t *low_ticks) static inline void rmt_ll_get_carrier_high_low_ticks(rmt_dev_t *dev, uint32_t channel, uint32_t *high_ticks, uint32_t *low_ticks)
{ {
*high_ticks = dev->carrier_duty_ch[channel].high; *high_ticks = dev->carrier_duty_ch[channel].high;
*low_ticks = dev->carrier_duty_ch[channel].low; *low_ticks = dev->carrier_duty_ch[channel].low;
} }
// This function has different meaning for TX and RX
// TX: enable to modulate carrier
// RX: enable to demodulate carrier
static inline void rmt_ll_enable_carrier(rmt_dev_t *dev, uint32_t channel, bool enable) static inline void rmt_ll_enable_carrier(rmt_dev_t *dev, uint32_t channel, bool enable)
{ {
dev->conf_ch[channel].conf0.carrier_en = enable; dev->conf_ch[channel].conf0.carrier_en = enable;
} }
static inline void rmt_ll_set_carrier_to_level(rmt_dev_t *dev, uint32_t channel, uint8_t level) static inline void rmt_ll_set_carrier_on_level(rmt_dev_t *dev, uint32_t channel, uint8_t level)
{ {
dev->conf_ch[channel].conf0.carrier_out_lv = level; dev->conf_ch[channel].conf0.carrier_out_lv = level;
} }
// set true, enable carrier in all RMT state (idle, reading, sending)
// set false, enable carrier only in sending state (i.e. there're effective data in RAM to be sent)
static inline void rmt_ll_tx_set_carrier_always_on(rmt_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf_ch[channel].conf0.carrier_eff_en = !enable;
}
static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const rmt_item32_t *data, uint32_t length, uint32_t off) static inline void rmt_ll_write_memory(rmt_mem_t *mem, uint32_t channel, const rmt_item32_t *data, uint32_t length, uint32_t off)
{ {
length = (off + length) > RMT_CHANNEL_MEM_WORDS ? (RMT_CHANNEL_MEM_WORDS - off) : length; length = (off + length) > SOC_RMT_CHANNEL_MEM_WORDS ? (SOC_RMT_CHANNEL_MEM_WORDS - off) : length;
for (uint32_t i = 0; i < length; i++) { for (uint32_t i = 0; i < length; i++) {
mem->chan[channel].data32[i + off].val = data[i].val; mem->chan[channel].data32[i + off].val = data[i].val;
} }
} }
static inline void rmt_ll_enable_rx_pingpong(rmt_dev_t *dev, uint32_t channel, bool enable)
{
dev->conf_ch[channel].conf1.chk_rx_carrier_en = enable;
}
/************************************************************************************************ /************************************************************************************************
* Following Low Level APIs only used for backward compatible, will be deprecated in the future! * Following Low Level APIs only used for backward compatible, will be deprecated in the future!
***********************************************************************************************/ ***********************************************************************************************/

4
components/soc/src/hal/rmt_hal.c
View File

@@ -56,7 +56,7 @@ void rmt_hal_set_carrier_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_
uint32_t carrier_div = (base_clk_hz + carrier_clk_hz / 2) / carrier_clk_hz; uint32_t carrier_div = (base_clk_hz + carrier_clk_hz / 2) / carrier_clk_hz;
uint32_t div_high = (uint32_t)(carrier_div * carrier_clk_duty); uint32_t div_high = (uint32_t)(carrier_div * carrier_clk_duty);
uint32_t div_low = carrier_div - div_high; uint32_t div_low = carrier_div - div_high;
rmt_ll_set_carrier_high_low_ticks(hal->regs, channel, div_high, div_low); rmt_ll_set_tx_carrier_high_low_ticks(hal->regs, channel, div_high, div_low);
} }
void rmt_hal_get_carrier_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t *carrier_clk_hz, float *carrier_clk_duty) void rmt_hal_get_carrier_clock(rmt_hal_context_t *hal, uint32_t channel, uint32_t base_clk_hz, uint32_t *carrier_clk_hz, float *carrier_clk_duty)
@@ -84,7 +84,7 @@ uint32_t rmt_hal_receive(rmt_hal_context_t *hal, uint32_t channel, rmt_item32_t
{ {
uint32_t len = 0; uint32_t len = 0;
rmt_ll_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_SW); rmt_ll_set_mem_owner(hal->regs, channel, RMT_MEM_OWNER_SW);
for (len = 0; len < RMT_CHANNEL_MEM_WORDS; len++) { for (len = 0; len < SOC_RMT_CHANNEL_MEM_WORDS; len++) {
buf[len].val = hal->mem->chan[channel].data32[len].val; buf[len].val = hal->mem->chan[channel].data32[len].val;
if (!(buf[len].val & 0x7FFF)) { if (!(buf[len].val & 0x7FFF)) {
break; break;

11
docs/en/api-reference/peripherals/rmt.rst
View File

@@ -131,6 +131,8 @@ Transmit Mode
When configuring channel in transmit mode, set **tx_config** and the following members of :cpp:type:`rmt_tx_config_t`: When configuring channel in transmit mode, set **tx_config** and the following members of :cpp:type:`rmt_tx_config_t`:
.. list::
* Transmit the currently configured data items in a loop - **loop_en** * Transmit the currently configured data items in a loop - **loop_en**
* Enable the RMT carrier signal - **carrier_en** * Enable the RMT carrier signal - **carrier_en**
* Frequency of the carrier in Hz - **carrier_freq_hz** * Frequency of the carrier in Hz - **carrier_freq_hz**
@@ -138,17 +140,22 @@ When configuring channel in transmit mode, set **tx_config** and the following m
* Level of the RMT output, when the carrier is applied - **carrier_level** * Level of the RMT output, when the carrier is applied - **carrier_level**
* Enable the RMT output if idle - **idle_output_en** * Enable the RMT output if idle - **idle_output_en**
* Set the signal level on the RMT output if idle - **idle_level** * Set the signal level on the RMT output if idle - **idle_level**
:esp32s2: * Specify maximum number of transmissions in a loop - **loop_count**
Receive Mode Receive Mode
^^^^^^^^^^^^ ^^^^^^^^^^^^
In receive mode, set **rx_config** and the following members of :cpp:type:`rmt_rx_config_t`: In receive mode, set **rx_config** and the following members of :cpp:type:`rmt_rx_config_t`:
.. list::
* Enable a filter on the input of the RMT receiver - **filter_en** * Enable a filter on the input of the RMT receiver - **filter_en**
* A threshold of the filter, set in the number of ticks - **filter_ticks_thresh**. Pulses shorter than this setting will be filtered out. Note, that the range of entered tick values is [0..255]. * A threshold of the filter, set in the number of ticks - **filter_ticks_thresh**. Pulses shorter than this setting will be filtered out. Note, that the range of entered tick values is [0..255].
* A pulse length threshold that will turn the RMT receiver idle, set in number of ticks - **idle_threshold**. The receiver will ignore pulses longer than this setting. * A pulse length threshold that will turn the RMT receiver idle, set in number of ticks - **idle_threshold**. The receiver will ignore pulses longer than this setting.
:esp32s2: * Enable the RMT carrier demodulation - **carrier_rm**
:esp32s2: * Frequency of the carrier in Hz - **carrier_freq_hz**
:esp32s2: * Duty cycle of the carrier signal in percent (%) - **carrier_duty_percent**
:esp32s2: * Level of the RMT input, where the carrier is modulated to - **carrier_level**
Finalize Configuration Finalize Configuration
^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^

4
tools/unit-test-app/components/test_utils/ref_clock.c
View File

@@ -49,7 +49,7 @@
#include "sdkconfig.h" #include "sdkconfig.h"
/* Select which RMT and PCNT channels, and GPIO to use */ /* Select which RMT and PCNT channels, and GPIO to use */
#define REF_CLOCK_RMT_CHANNEL RMT_CHANNELS_NUM - 1 #define REF_CLOCK_RMT_CHANNEL SOC_RMT_CHANNELS_NUM - 1
#define REF_CLOCK_PCNT_UNIT 0 #define REF_CLOCK_PCNT_UNIT 0
#define REF_CLOCK_GPIO 21 #define REF_CLOCK_GPIO 21
@@ -101,7 +101,7 @@ void ref_clock_init()
rmt_ll_set_counter_clock_div(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 1); rmt_ll_set_counter_clock_div(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 1);
rmt_ll_set_mem_blocks(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 1); rmt_ll_set_mem_blocks(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 1);
rmt_ll_set_counter_clock_src(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 0); rmt_ll_set_counter_clock_src(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, 0);
rmt_ll_enable_tx_cyclic(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, true); rmt_ll_enable_tx_loop(s_rmt.regs, REF_CLOCK_RMT_CHANNEL, true);
rmt_ll_start_tx(s_rmt.regs, REF_CLOCK_RMT_CHANNEL); rmt_ll_start_tx(s_rmt.regs, REF_CLOCK_RMT_CHANNEL);
// Route signal to PCNT // Route signal to PCNT