Merge branch 'feature/ets_timer' into 'master'

esp_timer: add high-resolution timer api

See merge request !1090
This commit is contained in:
Ivan Grokhotkov
2017-08-28 16:38:11 +08:00
15 changed files with 1679 additions and 56 deletions
@@ -32,12 +32,15 @@
#define FRC_TIMER_COUNT_S 0
#define FRC_TIMER_CTRL_REG(i) (REG_FRC_TIMER_BASE(i) + 0x8)
#define FRC_TIMER_INT_ENABLE (BIT(8)) // enable interrupt
#define FRC_TIMER_INT_STATUS (BIT(8)) // interrupt status (RO)
#define FRC_TIMER_ENABLE (BIT(7)) // enable timer
#define FRC_TIMER_AUTOLOAD (BIT(6)) // enable autoload
#define FRC_TIMER_PRESCALER 0x00000007 // 0: divide by 1, 2: divide by 16, 4: divide by 256
#define FRC_TIMER_PRESCALER 0x00000007
#define FRC_TIMER_PRESCALER_S 1
#define FRC_TIMER_EDGE_INT (BIT(0)) // 0: level, 1: edge
#define FRC_TIMER_PRESCALER_1 (0 << FRC_TIMER_PRESCALER_S)
#define FRC_TIMER_PRESCALER_16 (2 << FRC_TIMER_PRESCALER_S)
#define FRC_TIMER_PRESCALER_256 (4 << FRC_TIMER_PRESCALER_S)
#define FRC_TIMER_LEVEL_INT (BIT(0)) // 1: level, 0: edge
#define FRC_TIMER_INT_REG(i) (REG_FRC_TIMER_BASE(i) + 0xC)
#define FRC_TIMER_INT_CLR (BIT(0)) // clear interrupt
+2 -2
View File
@@ -376,7 +376,7 @@
* 7 1 software BT/BLE VHCI BT/BLE VHCI
* 8 1 extern level BT/BLE BB(RX/TX) BT/BLE BB(RX/TX)
* 9 1 extern level
* 10 1 extern edge Internal Timer
* 10 1 extern edge
* 11 3 profiling
* 12 1 extern level
* 13 1 extern level
@@ -388,7 +388,7 @@
* 19 2 extern level
* 20 2 extern level
* 21 2 extern level
* 22 3 extern edge FRC1 timer
* 22 3 extern edge
* 23 3 extern level
* 24 4 extern level TG1_WDT
* 25 4 extern level CACHEERR