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Merge branch 'feature/ets_timer' into 'master'
esp_timer: add high-resolution timer api See merge request !1090
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@@ -32,12 +32,15 @@
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#define FRC_TIMER_COUNT_S 0
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#define FRC_TIMER_CTRL_REG(i) (REG_FRC_TIMER_BASE(i) + 0x8)
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#define FRC_TIMER_INT_ENABLE (BIT(8)) // enable interrupt
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#define FRC_TIMER_INT_STATUS (BIT(8)) // interrupt status (RO)
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#define FRC_TIMER_ENABLE (BIT(7)) // enable timer
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#define FRC_TIMER_AUTOLOAD (BIT(6)) // enable autoload
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#define FRC_TIMER_PRESCALER 0x00000007 // 0: divide by 1, 2: divide by 16, 4: divide by 256
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#define FRC_TIMER_PRESCALER 0x00000007
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#define FRC_TIMER_PRESCALER_S 1
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#define FRC_TIMER_EDGE_INT (BIT(0)) // 0: level, 1: edge
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#define FRC_TIMER_PRESCALER_1 (0 << FRC_TIMER_PRESCALER_S)
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#define FRC_TIMER_PRESCALER_16 (2 << FRC_TIMER_PRESCALER_S)
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#define FRC_TIMER_PRESCALER_256 (4 << FRC_TIMER_PRESCALER_S)
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#define FRC_TIMER_LEVEL_INT (BIT(0)) // 1: level, 0: edge
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#define FRC_TIMER_INT_REG(i) (REG_FRC_TIMER_BASE(i) + 0xC)
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#define FRC_TIMER_INT_CLR (BIT(0)) // clear interrupt
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@@ -376,7 +376,7 @@
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* 7 1 software BT/BLE VHCI BT/BLE VHCI
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* 8 1 extern level BT/BLE BB(RX/TX) BT/BLE BB(RX/TX)
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* 9 1 extern level
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* 10 1 extern edge Internal Timer
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* 10 1 extern edge
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* 11 3 profiling
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* 12 1 extern level
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* 13 1 extern level
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@@ -388,7 +388,7 @@
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* 19 2 extern level
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* 20 2 extern level
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* 21 2 extern level
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* 22 3 extern edge FRC1 timer
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* 22 3 extern edge
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* 23 3 extern level
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* 24 4 extern level TG1_WDT
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* 25 4 extern level CACHEERR
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