espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-03 12:44:33 +02:00
Code Issues Packages Projects Releases Wiki Activity

spi_master:fix error when use spi_bus_add_device more than 3 device

Browse Source 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
This commit is contained in:
wanlei
2022-09-14 12:40:22 +08:00
parent 73509d93a5
commit 8290d450f3
7 changed files with 17 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
components/soc/esp32/include/soc/soc_caps.h
View File

@@ -195,6 +195,7 @@
#define SOC_SPI_DMA_CHAN_NUM 2 #define SOC_SPI_DMA_CHAN_NUM 2
#define SOC_SPI_PERIPH_CS_NUM(i) 3 #define SOC_SPI_PERIPH_CS_NUM(i) 3
#define SOC_SPI_MAX_CS_NUM 3
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64
#define SOC_SPI_MAX_PRE_DIVIDER 8192 #define SOC_SPI_MAX_PRE_DIVIDER 8192

1
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -175,6 +175,7 @@
/*-------------------------- SPI CAPS ----------------------------------------*/ /*-------------------------- SPI CAPS ----------------------------------------*/
#define SOC_SPI_PERIPH_NUM 2 #define SOC_SPI_PERIPH_NUM 2
#define SOC_SPI_PERIPH_CS_NUM(i) 6 #define SOC_SPI_PERIPH_CS_NUM(i) 6
#define SOC_SPI_MAX_CS_NUM 6
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64

20
components/soc/esp32c3/spi_periph.c
View File

@@ -1,16 +1,8 @@
// Copyright 2020 Espressif Systems (Shanghai) PTE LTD /*
// * SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
// Licensed under the Apache License, Version 2.0 (the "License"); *
// you may not use this file except in compliance with the License. * SPDX-License-Identifier: Apache-2.0
// You may obtain a copy of the License at */
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "soc/spi_periph.h" #include "soc/spi_periph.h"
#include "stddef.h" #include "stddef.h"
@@ -54,7 +46,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
.spiq_in = FSPIQ_IN_IDX, .spiq_in = FSPIQ_IN_IDX,
.spiwp_in = FSPIWP_IN_IDX, .spiwp_in = FSPIWP_IN_IDX,
.spihd_in = FSPIHD_IN_IDX, .spihd_in = FSPIHD_IN_IDX,
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX}, .spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
.spics_in = FSPICS0_IN_IDX, .spics_in = FSPICS0_IN_IDX,
.spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK, .spiclk_iomux_pin = SPI2_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI, .spid_iomux_pin = SPI2_IOMUX_PIN_NUM_MOSI,

5
components/soc/esp32s2/include/soc/soc_caps.h
View File

@@ -183,9 +183,10 @@
#define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels #define SOC_SIGMADELTA_CHANNEL_NUM (8) // 8 channels
/*-------------------------- SPI CAPS ----------------------------------------*/ /*-------------------------- SPI CAPS ----------------------------------------*/
#define SOC_SPI_PERIPH_NUM 3 #define SOC_SPI_PERIPH_NUM 3
#define SOC_SPI_DMA_CHAN_NUM 3 #define SOC_SPI_DMA_CHAN_NUM 3
#define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3)) #define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3))
#define SOC_SPI_MAX_CS_NUM 6
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 72 #define SOC_SPI_MAXIMUM_BUFFER_SIZE 72
#define SOC_SPI_MAX_PRE_DIVIDER 8192 #define SOC_SPI_MAX_PRE_DIVIDER 8192

2
components/soc/esp32s2/spi_periph.c
View File

@@ -54,7 +54,7 @@ const spi_signal_conn_t spi_periph_signal[SOC_SPI_PERIPH_NUM] = {
.spiq_in = FSPIQ_IN_IDX, .spiq_in = FSPIQ_IN_IDX,
.spiwp_in = FSPIWP_IN_IDX, .spiwp_in = FSPIWP_IN_IDX,
.spihd_in = FSPIHD_IN_IDX, .spihd_in = FSPIHD_IN_IDX,
.spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX}, .spics_out = {FSPICS0_OUT_IDX, FSPICS1_OUT_IDX, FSPICS2_OUT_IDX, FSPICS3_OUT_IDX, FSPICS4_OUT_IDX, FSPICS5_OUT_IDX},
.spics_in = FSPICS0_IN_IDX, .spics_in = FSPICS0_IN_IDX,
.spiclk_iomux_pin = FSPI_IOMUX_PIN_NUM_CLK, .spiclk_iomux_pin = FSPI_IOMUX_PIN_NUM_CLK,
.spid_iomux_pin = FSPI_IOMUX_PIN_NUM_MOSI, .spid_iomux_pin = FSPI_IOMUX_PIN_NUM_MOSI,

7
components/soc/esp32s3/include/soc/spi_caps.h
View File

@@ -14,9 +14,10 @@
#pragma once #pragma once
#define SOC_SPI_PERIPH_NUM 3 #define SOC_SPI_PERIPH_NUM 3
#define SOC_SPI_DMA_CHAN_NUM 3 #define SOC_SPI_DMA_CHAN_NUM 3
#define SOC_SPI_PERIPH_CS_NUM(i) 3 #define SOC_SPI_PERIPH_CS_NUM(i) (((i)==0)? 2: (((i)==1)? 6: 3))
#define SOC_SPI_MAX_CS_NUM 6
#define SOC_SPI_MAXIMUM_BUFFER_SIZE 64 #define SOC_SPI_MAXIMUM_BUFFER_SIZE 64

2
components/soc/include/soc/spi_periph.h
View File

@@ -57,7 +57,7 @@ typedef struct {
const uint8_t spiq_in; const uint8_t spiq_in;
const uint8_t spiwp_in; const uint8_t spiwp_in;
const uint8_t spihd_in; const uint8_t spihd_in;
const uint8_t spics_out[3]; // /CS GPIO output mux signals const uint8_t spics_out[SOC_SPI_MAX_CS_NUM]; // /CS GPIO output mux signals
const uint8_t spics_in; const uint8_t spics_in;
const uint8_t spidqs_out; const uint8_t spidqs_out;
const uint8_t spicd_out; const uint8_t spicd_out;