diff --git a/components/hal/esp32c3/include/hal/spi_ll.h b/components/hal/esp32c3/include/hal/spi_ll.h index 5527ee1eb7..013238142b 100644 --- a/components/hal/esp32c3/include/hal/spi_ll.h +++ b/components/hal/esp32c3/include/hal/spi_ll.h @@ -1005,7 +1005,7 @@ static inline void spi_ll_set_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) static inline void spi_ll_clear_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) { -#define CLR_INTR(intr_bit, _, __, clr_op) if (intr_mask & (intr_bit)) hw->clr_op; +#define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg; FOR_EACH_ITEM(CLR_INTR, INTR_LIST); #undef CLR_INTR } diff --git a/components/hal/esp32s2/include/hal/spi_ll.h b/components/hal/esp32s2/include/hal/spi_ll.h index d11fbcd98a..5ede97d958 100644 --- a/components/hal/esp32s2/include/hal/spi_ll.h +++ b/components/hal/esp32s2/include/hal/spi_ll.h @@ -995,7 +995,7 @@ static inline void spi_ll_set_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) static inline void spi_ll_clear_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) { -#define CLR_INTR(intr_bit, _, __, clr_op) if (intr_mask & (intr_bit)) hw->clr_op; +#define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg; FOR_EACH_ITEM(CLR_INTR, INTR_LIST); #undef CLR_INTR } diff --git a/components/hal/esp32s3/include/hal/spi_ll.h b/components/hal/esp32s3/include/hal/spi_ll.h index 8c040e20ef..27693ca12d 100644 --- a/components/hal/esp32s3/include/hal/spi_ll.h +++ b/components/hal/esp32s3/include/hal/spi_ll.h @@ -979,16 +979,16 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw) //helper macros to generate code for each interrupts #define FOR_EACH_ITEM(op, list) do { list(op) } while(0) #define INTR_LIST(item) \ - item(SPI_LL_INTR_TRANS_DONE, dma_int_ena.trans_done, dma_int_raw.trans_done, dma_int_clr.trans_done=1) \ - item(SPI_LL_INTR_RDBUF, dma_int_ena.rd_buf_done, dma_int_raw.rd_buf_done, dma_int_clr.rd_buf_done=1) \ - item(SPI_LL_INTR_WRBUF, dma_int_ena.wr_buf_done, dma_int_raw.wr_buf_done, dma_int_clr.wr_buf_done=1) \ - item(SPI_LL_INTR_RDDMA, dma_int_ena.rd_dma_done, dma_int_raw.rd_dma_done, dma_int_clr.rd_dma_done=1) \ - item(SPI_LL_INTR_WRDMA, dma_int_ena.wr_dma_done, dma_int_raw.wr_dma_done, dma_int_clr.wr_dma_done=1) \ - item(SPI_LL_INTR_SEG_DONE, dma_int_ena.dma_seg_trans_done, dma_int_raw.dma_seg_trans_done, dma_int_clr.dma_seg_trans_done=1) \ - item(SPI_LL_INTR_CMD7, dma_int_ena.cmd7, dma_int_raw.cmd7, dma_int_clr.cmd7=1) \ - item(SPI_LL_INTR_CMD8, dma_int_ena.cmd8, dma_int_raw.cmd8, dma_int_clr.cmd8=1) \ - item(SPI_LL_INTR_CMD9, dma_int_ena.cmd9, dma_int_raw.cmd9, dma_int_clr.cmd9=1) \ - item(SPI_LL_INTR_CMDA, dma_int_ena.cmda, dma_int_raw.cmda, dma_int_clr.cmda=1) + item(SPI_LL_INTR_TRANS_DONE, dma_int_ena.trans_done, dma_int_raw.trans_done, dma_int_clr.trans_done, dma_int_set.trans_done_int_set) \ + item(SPI_LL_INTR_RDBUF, dma_int_ena.rd_buf_done, dma_int_raw.rd_buf_done, dma_int_clr.rd_buf_done, dma_int_set.rd_buf_done_int_set) \ + item(SPI_LL_INTR_WRBUF, dma_int_ena.wr_buf_done, dma_int_raw.wr_buf_done, dma_int_clr.wr_buf_done, dma_int_set.wr_buf_done_int_set) \ + item(SPI_LL_INTR_RDDMA, dma_int_ena.rd_dma_done, dma_int_raw.rd_dma_done, dma_int_clr.rd_dma_done, dma_int_set.rd_dma_done_int_set) \ + item(SPI_LL_INTR_WRDMA, dma_int_ena.wr_dma_done, dma_int_raw.wr_dma_done, dma_int_clr.wr_dma_done, dma_int_set.wr_dma_done_int_set) \ + item(SPI_LL_INTR_SEG_DONE, dma_int_ena.dma_seg_trans_done, dma_int_raw.dma_seg_trans_done, dma_int_clr.dma_seg_trans_done, dma_int_set.dma_seg_trans_done_int_set) \ + item(SPI_LL_INTR_CMD7, dma_int_ena.cmd7, dma_int_raw.cmd7, dma_int_clr.cmd7, dma_int_set.cmd7_int_set) \ + item(SPI_LL_INTR_CMD8, dma_int_ena.cmd8, dma_int_raw.cmd8, dma_int_clr.cmd8, dma_int_set.cmd8_int_set) \ + item(SPI_LL_INTR_CMD9, dma_int_ena.cmd9, dma_int_raw.cmd9, dma_int_clr.cmd9, dma_int_set.cmd9_int_set) \ + item(SPI_LL_INTR_CMDA, dma_int_ena.cmda, dma_int_raw.cmda, dma_int_clr.cmda, dma_int_set.cmda_int_set) static inline void spi_ll_enable_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) @@ -1007,21 +1007,21 @@ static inline void spi_ll_disable_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) static inline void spi_ll_set_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) { -#define SET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit)) hw->st_reg = 1; +#define SET_INTR(intr_bit, _, __, ___, set_reg) if (intr_mask & (intr_bit)) hw->set_reg = 1; FOR_EACH_ITEM(SET_INTR, INTR_LIST); #undef SET_INTR } static inline void spi_ll_clear_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) { -#define CLR_INTR(intr_bit, _, __, clr_op) if (intr_mask & (intr_bit)) hw->clr_op; +#define CLR_INTR(intr_bit, _, __, clr_reg, ...) if (intr_mask & (intr_bit)) hw->clr_reg = 1; FOR_EACH_ITEM(CLR_INTR, INTR_LIST); #undef CLR_INTR } static inline bool spi_ll_get_intr(spi_dev_t* hw, spi_ll_intr_t intr_mask) { -#define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true; +#define GET_INTR(intr_bit, _, raw_reg, ...) if (intr_mask & (intr_bit) && hw->raw_reg) return true; FOR_EACH_ITEM(GET_INTR, INTR_LIST); return false; #undef GET_INTR @@ -1047,7 +1047,7 @@ static inline void spi_ll_disable_int(spi_dev_t *hw) */ static inline void spi_ll_clear_int_stat(spi_dev_t *hw) { - hw->dma_int_raw.trans_done = 0; + hw->dma_int_clr.trans_done = 1; } /** @@ -1057,7 +1057,7 @@ static inline void spi_ll_clear_int_stat(spi_dev_t *hw) */ static inline void spi_ll_set_int_stat(spi_dev_t *hw) { - hw->dma_int_raw.trans_done = 1; + hw->dma_int_set.trans_done_int_set = 1; } /** diff --git a/components/soc/esp32s3/include/soc/spi_caps.h b/components/soc/esp32s3/include/soc/spi_caps.h index 3976153e1e..deab59b23a 100644 --- a/components/soc/esp32s3/include/soc/spi_caps.h +++ b/components/soc/esp32s3/include/soc/spi_caps.h @@ -35,4 +35,4 @@ #define SOC_MEMSPI_IS_INDEPENDENT 1 -#define SOC_SPI_MAX_PRE_DIVIDER 8192 +#define SOC_SPI_MAX_PRE_DIVIDER 16