From 84ff4d6e372fa25a56ac48e20d6b50a05fed67c2 Mon Sep 17 00:00:00 2001 From: Alexey Lapshin Date: Mon, 13 Feb 2023 22:37:11 +0700 Subject: [PATCH] esp_rom: always inline cache.h functions for esp32 --- components/esp_rom/include/esp32/rom/cache.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/components/esp_rom/include/esp32/rom/cache.h b/components/esp_rom/include/esp32/rom/cache.h index fd28e9f1f0..5b56d7e046 100644 --- a/components/esp_rom/include/esp32/rom/cache.h +++ b/components/esp_rom/include/esp32/rom/cache.h @@ -65,7 +65,7 @@ void mmu_init(int cpu_no); * 4 : mmu table to be written is out of range * 5 : vaddr is out of range */ -static inline unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num) +static inline __attribute__((always_inline)) unsigned int IRAM_ATTR cache_flash_mmu_set(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num) { extern unsigned int cache_flash_mmu_set_rom(int cpu_no, int pid, unsigned int vaddr, unsigned int paddr, int psize, int num); @@ -118,7 +118,7 @@ unsigned int IRAM_ATTR cache_sram_mmu_set(int cpu_no, int pid, unsigned int vadd * * @return None */ -static inline void IRAM_ATTR Cache_Read_Init(int cpu_no) +static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Init(int cpu_no) { extern void Cache_Read_Init_rom(int cpu_no); DPORT_STALL_OTHER_CPU_START(); @@ -134,7 +134,7 @@ static inline void IRAM_ATTR Cache_Read_Init(int cpu_no) * * @return None */ -static inline void IRAM_ATTR Cache_Flush(int cpu_no) +static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Flush(int cpu_no) { extern void Cache_Flush_rom(int cpu_no); DPORT_STALL_OTHER_CPU_START(); @@ -150,7 +150,7 @@ static inline void IRAM_ATTR Cache_Flush(int cpu_no) * * @return None */ -static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no) +static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Disable(int cpu_no) { extern void Cache_Read_Disable_rom(int cpu_no); DPORT_STALL_OTHER_CPU_START(); @@ -166,7 +166,7 @@ static inline void IRAM_ATTR Cache_Read_Disable(int cpu_no) * * @return None */ -static inline void IRAM_ATTR Cache_Read_Enable(int cpu_no) +static inline __attribute__((always_inline)) void IRAM_ATTR Cache_Read_Enable(int cpu_no) { extern void Cache_Read_Enable_rom(int cpu_no); DPORT_STALL_OTHER_CPU_START();