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Merge branch 'master' into feature/esp32s2beta_merge

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This commit is contained in:
Angus Gratton
2019-10-22 13:51:49 +11:00
committed by Angus Gratton
parent ae21d669b9 4c3c109e60
commit 8675a818f9
143 changed files with 4319 additions and 1090 deletions
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5
components/soc/src/hal/spi_flash_hal.c
View File

@@ -67,8 +67,3 @@ esp_err_t spi_flash_hal_init(spi_flash_memspi_data_t *data_out, const spi_flash_
ESP_EARLY_LOGD(TAG, "extra_dummy: %d", data_out->extra_dummy);
return ESP_OK;
}
static inline spi_dev_t *get_spi_dev(spi_flash_host_driver_t *chip_drv)
{
return ((spi_flash_memspi_data_t *)chip_drv->driver_data)->spi;
}

93
components/soc/src/hal/spi_flash_hal_iram.c
View File

@@ -19,22 +19,22 @@
#define ADDRESS_MASK_24BIT 0xFFFFFF
static inline spi_dev_t *get_spi_dev(spi_flash_host_driver_t *chip_drv)
static inline spi_dev_t *get_spi_dev(spi_flash_host_driver_t *host)
{
return ((spi_flash_memspi_data_t *)chip_drv->driver_data)->spi;
return ((spi_flash_memspi_data_t *)host->driver_data)->spi;
}
void spi_flash_hal_poll_cmd_done(spi_flash_host_driver_t *driver)
void spi_flash_hal_poll_cmd_done(spi_flash_host_driver_t *host)
{
while (!spi_flash_ll_cmd_is_done(get_spi_dev(driver))) {
while (!spi_flash_ll_cmd_is_done(get_spi_dev(host))) {
//nop
}
}
esp_err_t spi_flash_hal_device_config(spi_flash_host_driver_t *driver)
esp_err_t spi_flash_hal_device_config(spi_flash_host_driver_t *host)
{
spi_flash_memspi_data_t *drv_data = (spi_flash_memspi_data_t *)driver->driver_data;
spi_dev_t *dev = get_spi_dev(driver);
spi_flash_memspi_data_t *drv_data = (spi_flash_memspi_data_t *)host->driver_data;
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_reset(dev);
spi_flash_ll_set_cs_pin(dev, drv_data->cs_num);
spi_flash_ll_set_clock(dev, &drv_data->clock_conf);
@@ -52,89 +52,98 @@ esp_err_t spi_flash_hal_device_config(spi_flash_host_driver_t *driver)
return ESP_OK;
}
esp_err_t spi_flash_hal_configure_host_read_mode(spi_flash_host_driver_t *driver, esp_flash_read_mode_t read_mode,
uint32_t addr_bitlen, uint32_t dummy_cyclelen_base,
uint32_t read_command)
esp_err_t spi_flash_hal_configure_host_io_mode(
spi_flash_host_driver_t *host,
uint32_t command,
uint32_t addr_bitlen,
int dummy_cyclelen_base,
esp_flash_io_mode_t io_mode)
{
// Add dummy cycles to compensate for latency of GPIO matrix and external delay, if necessary...
int dummy_cyclelen = dummy_cyclelen_base + ((spi_flash_memspi_data_t *)driver->driver_data)->extra_dummy;
int dummy_cyclelen = dummy_cyclelen_base + ((spi_flash_memspi_data_t *)host->driver_data)->extra_dummy;
spi_dev_t *dev = get_spi_dev(driver);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_set_command8(dev, command);
spi_flash_ll_set_addr_bitlen(dev, addr_bitlen);
spi_flash_ll_set_command8(dev, read_command);
spi_flash_ll_read_phase(dev);
spi_flash_ll_set_dummy(dev, dummy_cyclelen);
spi_flash_ll_set_read_mode(dev, read_mode);
//disable all data phases, enable them later if needed
spi_flash_ll_set_miso_bitlen(dev, 0);
spi_flash_ll_set_mosi_bitlen(dev, 0);
spi_flash_ll_set_read_mode(dev, io_mode);
return ESP_OK;
}
esp_err_t spi_flash_hal_common_command(spi_flash_host_driver_t *chip_drv, spi_flash_trans_t *trans)
esp_err_t spi_flash_hal_common_command(spi_flash_host_driver_t *host, spi_flash_trans_t *trans)
{
chip_drv->configure_host_read_mode(chip_drv, SPI_FLASH_FASTRD, 0, 0, 0);
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_flash_ll_set_command8(dev, trans->command);
spi_flash_ll_set_addr_bitlen(dev, 0);
host->configure_host_io_mode(host, trans->command, 0, 0, SPI_FLASH_FASTRD);
spi_dev_t *dev = get_spi_dev(host);
//disable dummy if no input phase
if (trans->miso_len == 0) {
spi_flash_ll_set_dummy(dev, 0);
}
spi_flash_ll_set_miso_bitlen(dev, trans->miso_len);
spi_flash_ll_set_mosi_bitlen(dev, trans->mosi_len);
spi_flash_ll_write_word(dev, trans->mosi_data);
spi_flash_ll_user_start(dev);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
spi_flash_ll_get_buffer_data(dev, trans->miso_data, 8);
return ESP_OK;
}
void spi_flash_hal_erase_chip(spi_flash_host_driver_t *chip_drv)
void spi_flash_hal_erase_chip(spi_flash_host_driver_t *host)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_erase_chip(dev);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
}
void spi_flash_hal_erase_sector(spi_flash_host_driver_t *chip_drv, uint32_t start_address)
void spi_flash_hal_erase_sector(spi_flash_host_driver_t *host, uint32_t start_address)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_set_addr_bitlen(dev, 24);
spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
spi_flash_ll_erase_sector(dev);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
}
void spi_flash_hal_erase_block(spi_flash_host_driver_t *chip_drv, uint32_t start_address)
void spi_flash_hal_erase_block(spi_flash_host_driver_t *host, uint32_t start_address)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_set_addr_bitlen(dev, 24);
spi_flash_ll_set_address(dev, start_address & ADDRESS_MASK_24BIT);
spi_flash_ll_erase_block(dev);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
}
void spi_flash_hal_program_page(spi_flash_host_driver_t *chip_drv, const void *buffer, uint32_t address, uint32_t length)
void spi_flash_hal_program_page(spi_flash_host_driver_t *host, const void *buffer, uint32_t address, uint32_t length)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_set_addr_bitlen(dev, 24);
spi_flash_ll_set_address(dev, (address & ADDRESS_MASK_24BIT) | (length << 24));
spi_flash_ll_program_page(dev, buffer, length);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
}
esp_err_t spi_flash_hal_read(spi_flash_host_driver_t *chip_drv, void *buffer, uint32_t address, uint32_t read_len)
esp_err_t spi_flash_hal_read(spi_flash_host_driver_t *host, void *buffer, uint32_t address, uint32_t read_len)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
//the command is already set by ``spi_flash_hal_configure_host_read_mode`` before.
spi_dev_t *dev = get_spi_dev(host);
//the command is already set by ``spi_flash_hal_configure_host_io_mode`` before.
spi_flash_ll_set_address(dev, address << 8);
spi_flash_ll_set_miso_bitlen(dev, read_len * 8);
spi_flash_ll_user_start(dev);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
spi_flash_ll_get_buffer_data(dev, buffer, read_len);
return ESP_OK;
}
bool spi_flash_hal_host_idle(spi_flash_host_driver_t *chip_drv)
bool spi_flash_hal_host_idle(spi_flash_host_driver_t *host)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
bool idle = spi_flash_ll_host_idle(dev);
// Not clear if this is necessary, or only necessary if
@@ -146,10 +155,10 @@ bool spi_flash_hal_host_idle(spi_flash_host_driver_t *chip_drv)
return idle;
}
esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_driver_t *chip_drv, bool wp)
esp_err_t spi_flash_hal_set_write_protect(spi_flash_host_driver_t *host, bool wp)
{
spi_dev_t *dev = get_spi_dev(chip_drv);
spi_dev_t *dev = get_spi_dev(host);
spi_flash_ll_set_write_protect(dev, wp);
chip_drv->poll_cmd_done(chip_drv);
host->poll_cmd_done(host);
return ESP_OK;
}