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https://github.com/espressif/esp-idf.git
synced 2025-11-02 16:11:41 +01:00
feat(i2s): support i2s etm event and task
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@@ -19,6 +19,8 @@
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extern "C" {
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#endif
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#define ETM_LL_SUPPORT_STATUS 1 // Support to get and clear the status of the ETM event and task
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/**
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* @brief Enable the clock for ETM register
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*
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@@ -19,6 +19,8 @@
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#include "soc/i2s_periph.h"
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#include "soc/i2s_struct.h"
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#include "soc/pcr_struct.h"
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#include "soc/soc_etm_struct.h"
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#include "soc/soc_etm_source.h"
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#include "hal/i2s_types.h"
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#include "hal/hal_utils.h"
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@@ -28,6 +30,7 @@ extern "C" {
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#endif
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#define I2S_LL_GET_HW(num) (((num) == 0)? (&I2S0) : NULL)
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#define I2S_LL_GET_ID(hw) (((hw) == &I2S0)? 0 : -1)
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#define I2S_LL_TDM_CH_MASK (0xffff)
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#define I2S_LL_PDM_BCK_FACTOR (64)
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@@ -38,6 +41,30 @@ extern "C" {
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#define I2S_LL_PLL_F160M_CLK_FREQ (160 * 1000000) // PLL_F160M_CLK: 160MHz
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#define I2S_LL_DEFAULT_CLK_FREQ I2S_LL_PLL_F160M_CLK_FREQ // The default PLL clock frequency while using I2S_CLK_SRC_DEFAULT
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#define I2S_LL_ETM_EVENT_TABLE(i2s_port, chan_dir, event) \
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(uint32_t[SOC_I2S_NUM][2][I2S_ETM_EVENT_MAX]){{ \
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[I2S_DIR_RX - 1] = { \
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[I2S_ETM_EVENT_DONE] = I2S0_EVT_RX_DONE, \
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[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_RECEIVED, \
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}, \
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[I2S_DIR_TX - 1] = { \
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[I2S_ETM_EVENT_DONE] = I2S0_EVT_TX_DONE, \
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[I2S_ETM_EVENT_REACH_THRESH] = I2S0_EVT_X_WORDS_SENT, \
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}}}[i2s_port][(chan_dir) - 1][event]
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#define I2S_LL_ETM_TASK_TABLE(i2s_port, chan_dir, task) \
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(uint32_t[SOC_I2S_NUM][2][I2S_ETM_TASK_MAX]){{ \
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[I2S_DIR_RX - 1] = { \
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[I2S_ETM_TASK_START] = I2S0_TASK_START_RX, \
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[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_RX, \
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}, \
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[I2S_DIR_TX - 1] = { \
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[I2S_ETM_TASK_START] = I2S0_TASK_START_TX, \
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[I2S_ETM_TASK_STOP] = I2S0_TASK_STOP_TX, \
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}}}[i2s_port][(chan_dir) - 1][task]
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#define I2S_LL_ETM_MAX_THRESH_NUM (0x3FFFUL)
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/**
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* @brief Enable the bus clock for I2S module
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*
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@@ -1191,6 +1218,104 @@ static inline uint32_t i2s_ll_tx_get_bclk_sync_count(i2s_dev_t *hw)
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return hw->bck_cnt.tx_bck_cnt;
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}
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/**
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* @brief Set the TX ETM threshold of REACH_THRESH event
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param thresh The threshold that send, in words (4 bytes)
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*/
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static inline void i2s_ll_tx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
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{
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hw->etm_conf.etm_tx_send_word_num = thresh;
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}
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/**
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* @brief Set the RX ETM threshold of REACH_THRESH event
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*
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* @param hw Peripheral I2S hardware instance address.
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* @param thresh The threshold that received, in words (4 bytes)
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*/
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static inline void i2s_ll_rx_set_etm_threshold(i2s_dev_t *hw, uint32_t thresh)
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{
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hw->etm_conf.etm_rx_receive_word_num = thresh;
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}
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/**
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* @brief Get I2S ETM TX done event status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @return
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* - true TX done event triggered
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* - false TX done event not triggered
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*/
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static inline bool i2s_ll_get_etm_tx_done_event_status(i2s_dev_t *hw)
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{
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uint32_t i2s_id = I2S_LL_GET_ID(hw);
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switch (i2s_id) {
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case 0:
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return SOC_ETM.evt_st3.i2s0_evt_tx_done_st;
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default:
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HAL_ASSERT(false);
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}
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}
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/**
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* @brief Get I2S ETM TX done event status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @return
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* - true TX done event triggered
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* - false TX done event not triggered
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*/
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static inline bool i2s_ll_get_etm_rx_done_event_status(i2s_dev_t *hw)
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{
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uint32_t i2s_id = I2S_LL_GET_ID(hw);
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switch (i2s_id) {
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case 0:
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return SOC_ETM.evt_st3.i2s0_evt_rx_done_st;
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default:
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HAL_ASSERT(false);
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}
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}
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/**
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* @brief Get I2S ETM TX done event status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @return
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* - true TX done event triggered
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* - false TX done event not triggered
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*/
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static inline bool i2s_ll_get_etm_tx_threshold_event_status(i2s_dev_t *hw)
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{
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uint32_t i2s_id = I2S_LL_GET_ID(hw);
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switch (i2s_id) {
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case 0:
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return SOC_ETM.evt_st3.i2s0_evt_x_words_sent_st;
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default:
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HAL_ASSERT(false);
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}
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}
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/**
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* @brief Get I2S ETM TX done event status
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*
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* @param hw Peripheral I2S hardware instance address.
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* @return
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* - true TX done event triggered
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* - false TX done event not triggered
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*/
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static inline bool i2s_ll_get_etm_rx_threshold_event_status(i2s_dev_t *hw)
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{
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uint32_t i2s_id = I2S_LL_GET_ID(hw);
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switch (i2s_id) {
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case 0:
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return SOC_ETM.evt_st3.i2s0_evt_x_words_received_st;
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default:
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HAL_ASSERT(false);
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}
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}
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#ifdef __cplusplus
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}
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#endif
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