From 86b331b40fa70f744e4641734e8e7be38956766c Mon Sep 17 00:00:00 2001 From: Armando Date: Tue, 22 Nov 2022 12:02:24 +0800 Subject: [PATCH] soc: update iram/dram addr range in ext_mem_defs.h IRAM0/DRAM0 addr range update, on s3, c3, c2, h4, c6: IRAM0_ADDRESS_LOW ~ IRAM0_ADDRESS_HIGH DRAM0_ADDRESS_LOW ~ DRAM0_ADDRESS_HIGH now are for the real IRAM0 and DRAM0 --- .../soc/esp32c2/include/soc/ext_mem_defs.h | 20 +++++++++---------- .../soc/esp32c3/include/soc/ext_mem_defs.h | 8 ++++---- .../soc/esp32h2/include/soc/ext_mem_defs.h | 10 +++++----- .../soc/esp32s3/include/soc/ext_mem_defs.h | 8 ++++---- 4 files changed, 23 insertions(+), 23 deletions(-) diff --git a/components/soc/esp32c2/include/soc/ext_mem_defs.h b/components/soc/esp32c2/include/soc/ext_mem_defs.h index 9698bb5f76..a51cafd69d 100644 --- a/components/soc/esp32c2/include/soc/ext_mem_defs.h +++ b/components/soc/esp32c2/include/soc/ext_mem_defs.h @@ -15,18 +15,18 @@ extern "C" { #include /*IRAM0 is connected with Cache IBUS0*/ -#define IRAM0_ADDRESS_LOW 0x40000000 -#define IRAM0_ADDRESS_HIGH(page_size) IRAM0_CACHE_ADDRESS_HIGH(page_size) -#define IRAM0_CACHE_ADDRESS_LOW 0x42000000 -#define IRAM0_CACHE_ADDRESS_HIGH(page_size) (IRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) // MMU has 64 pages +#define IRAM0_ADDRESS_LOW 0x4037C000 +#define IRAM0_ADDRESS_HIGH 0x403C0000 +#define IRAM0_CACHE_ADDRESS_LOW 0x42000000 +#define IRAM0_CACHE_ADDRESS_HIGH(page_size) (IRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) // MMU has 64 pages /*DRAM0 is connected with Cache DBUS0*/ -#define DRAM0_ADDRESS_LOW 0x3C000000 -#define DRAM0_ADDRESS_HIGH 0x40000000 -#define DRAM0_CACHE_ADDRESS_LOW 0x3C000000 -#define DRAM0_CACHE_ADDRESS_HIGH(page_size) (DRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) -#define DRAM0_CACHE_OPERATION_HIGH(page_size) DRAM0_CACHE_ADDRESS_HIGH(page_size) -#define ESP_CACHE_TEMP_ADDR 0x3C000000 +#define DRAM0_ADDRESS_LOW 0x3FCA0000 +#define DRAM0_ADDRESS_HIGH 0x3FCE0000 +#define DRAM0_CACHE_ADDRESS_LOW 0x3C000000 +#define DRAM0_CACHE_ADDRESS_HIGH(page_size) (DRAM0_CACHE_ADDRESS_LOW + ((page_size) * 64)) // MMU has 64 pages +#define DRAM0_CACHE_OPERATION_HIGH(page_size) DRAM0_CACHE_ADDRESS_HIGH(page_size) +#define ESP_CACHE_TEMP_ADDR 0x3C000000 #define BUS_SIZE(bus_name, page_size) (bus_name##_ADDRESS_HIGH(page_size) - bus_name##_ADDRESS_LOW) #define ADDRESS_IN_BUS(bus_name, vaddr, page_size) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH(page_size)) diff --git a/components/soc/esp32c3/include/soc/ext_mem_defs.h b/components/soc/esp32c3/include/soc/ext_mem_defs.h index f37567bffd..9def31c594 100644 --- a/components/soc/esp32c3/include/soc/ext_mem_defs.h +++ b/components/soc/esp32c3/include/soc/ext_mem_defs.h @@ -13,14 +13,14 @@ extern "C" { #endif /*IRAM0 is connected with Cache IBUS0*/ -#define IRAM0_ADDRESS_LOW 0x40000000 -#define IRAM0_ADDRESS_HIGH 0x44000000 +#define IRAM0_ADDRESS_LOW 0x4037C000 +#define IRAM0_ADDRESS_HIGH 0x403E0000 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 #define IRAM0_CACHE_ADDRESS_HIGH 0x42800000 /*DRAM0 is connected with Cache DBUS0*/ -#define DRAM0_ADDRESS_LOW 0x3C000000 -#define DRAM0_ADDRESS_HIGH 0x40000000 +#define DRAM0_ADDRESS_LOW 0x3FC80000 +#define DRAM0_ADDRESS_HIGH 0x3FCE0000 #define DRAM0_CACHE_ADDRESS_LOW 0x3C000000 #define DRAM0_CACHE_ADDRESS_HIGH 0x3C800000 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH diff --git a/components/soc/esp32h2/include/soc/ext_mem_defs.h b/components/soc/esp32h2/include/soc/ext_mem_defs.h index 7189108f9b..42c3c02afb 100644 --- a/components/soc/esp32h2/include/soc/ext_mem_defs.h +++ b/components/soc/esp32h2/include/soc/ext_mem_defs.h @@ -13,14 +13,14 @@ extern "C" { #endif /*IRAM0 is connected with Cache IBUS0*/ -#define IRAM0_ADDRESS_LOW 0x40000000 -#define IRAM0_ADDRESS_HIGH 0x44000000 -#define IRAM0_CACHE_ADDRESS_LOW 0x42000000 +#define IRAM0_ADDRESS_LOW 0x4037C000 +#define IRAM0_ADDRESS_HIGH 0x403E0000 +#define IRAM0_CACHE_ADDRESS_LOW 0x42000000 #define IRAM0_CACHE_ADDRESS_HIGH 0x42800000 /*DRAM0 is connected with Cache DBUS0*/ -#define DRAM0_ADDRESS_LOW 0x3C000000 -#define DRAM0_ADDRESS_HIGH 0x40000000 +#define DRAM0_ADDRESS_LOW 0x3FC80000 +#define DRAM0_ADDRESS_HIGH 0x3FCE0000 #define DRAM0_CACHE_ADDRESS_LOW 0x3C000000 #define DRAM0_CACHE_ADDRESS_HIGH 0x3C800000 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH diff --git a/components/soc/esp32s3/include/soc/ext_mem_defs.h b/components/soc/esp32s3/include/soc/ext_mem_defs.h index 9bb1d2d312..3d13a97a00 100644 --- a/components/soc/esp32s3/include/soc/ext_mem_defs.h +++ b/components/soc/esp32s3/include/soc/ext_mem_defs.h @@ -12,14 +12,14 @@ extern "C" { #endif /*IRAM0 is connected with Cache IBUS0*/ -#define IRAM0_ADDRESS_LOW 0x40000000 -#define IRAM0_ADDRESS_HIGH 0x44000000 +#define IRAM0_ADDRESS_LOW 0x40370000 +#define IRAM0_ADDRESS_HIGH 0x403E0000 #define IRAM0_CACHE_ADDRESS_LOW 0x42000000 #define IRAM0_CACHE_ADDRESS_HIGH 0x44000000 /*DRAM0 is connected with Cache DBUS0*/ -#define DRAM0_ADDRESS_LOW 0x3C000000 -#define DRAM0_ADDRESS_HIGH 0x40000000 +#define DRAM0_ADDRESS_LOW 0x3FC88000 +#define DRAM0_ADDRESS_HIGH 0x3FD00000 #define DRAM0_CACHE_ADDRESS_LOW 0x3C000000 #define DRAM0_CACHE_ADDRESS_HIGH 0x3E000000 #define DRAM0_CACHE_OPERATION_HIGH DRAM0_CACHE_ADDRESS_HIGH