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esp32h4: checked all the corner stuffs of the removal

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This commit is contained in:
laokaiyao
2023-04-13 17:06:40 +08:00
parent 954a6a2cff
commit 87328d594f
21 changed files with 41 additions and 38 deletions
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2
components/app_update/include/esp_ota_ops.h
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@@ -334,7 +334,7 @@ typedef enum {
/**
* @brief Revokes the old signature digest. To be called in the application after the rollback logic.
*
* Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
* Relevant for Secure boot v2 on ESP32-S2, ESP32-S3, ESP32-C3, ESP32-C6, ESP32-H2 where upto 3 key digests can be stored (Key \#N-1, Key \#N, Key \#N+1).
* When key \#N-1 used to sign an app is invalidated, an OTA update is to be sent with an app signed with key \#N-1 & Key \#N.
* After successfully booting the OTA app should call this function to revoke Key \#N-1.
*

1
components/bootloader_support/include/esp_app_format.h
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@@ -17,6 +17,7 @@ typedef enum {
ESP_CHIP_ID_ESP32S2 = 0x0002, /*!< chip ID: ESP32-S2 */
ESP_CHIP_ID_ESP32C3 = 0x0005, /*!< chip ID: ESP32-C3 */
ESP_CHIP_ID_ESP32S3 = 0x0009, /*!< chip ID: ESP32-S3 */
ESP_CHIP_ID_ESP32C2 = 0x000C, /*!< chip ID: ESP32-C2 */
ESP_CHIP_ID_ESP32C6 = 0x000D, /*!< chip ID: ESP32-C6 */
ESP_CHIP_ID_INVALID = 0xFFFF /*!< Invalid chip ID (we defined it to make sure the esp_chip_id_t is 2 bytes size) */
} __attribute__((packed)) esp_chip_id_t;

1
components/driver/test_apps/spi/master/main/test_spi_bus_lock.c
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@@ -33,7 +33,6 @@
#endif
// H2 and C2 will not support external flash.
#define TEST_FLASH_FREQ_MHZ 5
typedef struct {

2
components/esp_system/Kconfig
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@@ -279,7 +279,7 @@ menu "ESP System Settings"
config ESP_CONSOLE_MULTIPLE_UART
bool
default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2
default y if !IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32H2 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6
choice ESP_CONSOLE_UART_NUM
prompt "UART peripheral to use for console output (0-1)"

8
components/esp_system/crosscore_int.c
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@@ -29,7 +29,7 @@
#define REASON_FREQ_SWITCH BIT(1)
#define REASON_GDB_CALL BIT(3)
#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6
#if CONFIG_IDF_TARGET_ARCH_XTENSA
#define REASON_PRINT_BACKTRACE BIT(2)
#define REASON_TWDT_ABORT BIT(4)
#endif
@@ -66,7 +66,7 @@ static void IRAM_ATTR esp_crosscore_isr(void *arg) {
} else {
WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, 0);
}
#elif CONFIG_IDF_TARGET_ESP32C3|| CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
#elif CONFIG_IDF_TARGET_ARCH_RISCV
WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0);
#endif
@@ -147,7 +147,7 @@ static void IRAM_ATTR esp_crosscore_int_send(int core_id, uint32_t reason_mask)
} else {
WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_1_REG, SYSTEM_CPU_INTR_FROM_CPU_1);
}
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
#elif CONFIG_IDF_TARGET_ARCH_RISCV
WRITE_PERI_REG(SYSTEM_CPU_INTR_FROM_CPU_0_REG, SYSTEM_CPU_INTR_FROM_CPU_0);
#endif
}
@@ -167,7 +167,7 @@ void IRAM_ATTR esp_crosscore_int_send_gdb_call(int core_id)
esp_crosscore_int_send(core_id, REASON_GDB_CALL);
}
#if !CONFIG_IDF_TARGET_ESP32C3 && !IDF_TARGET_ESP32C2 && !IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2
#if CONFIG_IDF_TARGET_ARCH_XTENSA
void IRAM_ATTR esp_crosscore_int_send_print_backtrace(int core_id)
{
esp_crosscore_int_send(core_id, REASON_PRINT_BACKTRACE);

2
components/esp_system/test_apps/esp_system_unity_tests/main/test_reset_reason.c
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@@ -43,7 +43,7 @@
#define BROWNOUT "BROWN_OUT_RST"
#define STORE_ERROR "StoreProhibited"
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
#define DEEPSLEEP "DSLEEP"
#define LOAD_STORE_ERROR "Store access fault"
#define RESET "RTC_SW_CPU_RST"

2
components/esp_wifi/Kconfig
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@@ -1,5 +1,7 @@
menu "Wi-Fi"
# TODO: Disable WIFI support on ESP32-H2 (WIFI-5796)
# visible if SOC_WIFI_SUPPORTED
config ESP_WIFI_ENABLED
bool

2
components/freertos/Kconfig
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@@ -366,7 +366,7 @@ menu "FreeRTOS"
config FREERTOS_TICK_SUPPORT_SYSTIMER
bool
default y if !FREERTOS_TICK_SUPPORT_CORETIMER
# ESP32-S3 and ESP32-C3 can use Systimer for FreeRTOS SysTick
# All targets except ESP32 and ESP32S2 can use Systimer for FreeRTOS SysTick
# ESP32S2 also has SYSTIMER but it can not be used for the FreeRTOS SysTick because:
# - It has only one counter, which already in use esp_timer.
# A counter for SysTick should be stall in debug mode but work esp_timer.

13
components/ieee802154/CMakeLists.txt
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@@ -13,18 +13,7 @@ if(CONFIG_IEEE802154_ENABLED)
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${ieee802154_lib}>
$<TARGET_FILE:${esp_phy_lib}> libphy.a libbtbb.a $<TARGET_FILE:${esp_phy_lib}>)
else()
if(IDF_TARGET STREQUAL "esp32h4")
if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_1)
target_link_libraries(${COMPONENT_LIB} INTERFACE
"-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev1")
endif()
if(CONFIG_IDF_TARGET_ESP32H4_BETA_VERSION_2)
target_link_libraries(${COMPONENT_LIB} INTERFACE
"-L ${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}/rev2")
endif()
else()
target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}")
endif()
target_link_directories(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_SOURCE_DIR}/lib/${idf_target}")
target_link_libraries(${COMPONENT_LIB} INTERFACE $<TARGET_FILE:${esp_phy_lib}> lib802154.a libphy.a libbtbb.a
$<TARGET_FILE:${esp_phy_lib}> $<TARGET_FILE:${esp_system_lib}>)
endif()