From 8749c462848855afdbd469ce4619516c51d3719f Mon Sep 17 00:00:00 2001 From: Ivan Grokhotkov Date: Wed, 22 Jul 2020 21:57:58 +0200 Subject: [PATCH] esp_common: allow placing panic handler into IRAM on ESP32-S2 --- components/esp_common/Kconfig | 1 - docs/en/api-guides/fatal-errors.rst | 4 +--- .../system/build_test/sdkconfig.ci.panic_handler_iram | 1 + 3 files changed, 2 insertions(+), 4 deletions(-) create mode 100644 tools/test_apps/system/build_test/sdkconfig.ci.panic_handler_iram diff --git a/components/esp_common/Kconfig b/components/esp_common/Kconfig index 919a95d6d6..135063b44a 100644 --- a/components/esp_common/Kconfig +++ b/components/esp_common/Kconfig @@ -195,7 +195,6 @@ menu "Common ESP-related" config ESP_PANIC_HANDLER_IRAM bool "Place panic handler code in IRAM" default n - depends on IDF_TARGET_ESP32 # pending ESP32-S2 support help If this option is disabled (default), the panic handler code is placed in flash not IRAM. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will diff --git a/docs/en/api-guides/fatal-errors.rst b/docs/en/api-guides/fatal-errors.rst index 579cc947ff..7aeee2a649 100644 --- a/docs/en/api-guides/fatal-errors.rst +++ b/docs/en/api-guides/fatal-errors.rst @@ -62,9 +62,7 @@ Behavior of panic handler is affected by two other configuration options. - If :doc:`Core Dump ` feature is enabled, then system state (task stacks and registers) will be dumped either to Flash or UART, for later analysis. -.. only:: esp32 - - - If :ref:`CONFIG_ESP_PANIC_HANDLER_IRAM` is disabled (disabled by default), the panic handler code is placed in flash memory not IRAM. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor risk, if the flash cache status is also corrupted during the crash. +- If :ref:`CONFIG_ESP_PANIC_HANDLER_IRAM` is disabled (disabled by default), the panic handler code is placed in flash memory not IRAM. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor risk, if the flash cache status is also corrupted during the crash. If this option is enabled, the panic handler code is placed in IRAM. This allows the panic handler to run without needing to re-enable cache first. This may be necessary to debug some complex issues with crashes while flash cache is disabled (for example, when writing to SPI flash). diff --git a/tools/test_apps/system/build_test/sdkconfig.ci.panic_handler_iram b/tools/test_apps/system/build_test/sdkconfig.ci.panic_handler_iram new file mode 100644 index 0000000000..cc53b500f9 --- /dev/null +++ b/tools/test_apps/system/build_test/sdkconfig.ci.panic_handler_iram @@ -0,0 +1 @@ +CONFIG_ESP_PANIC_HANDLER_IRAM=y