diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h
index f1f4b61349..20e65ce4fc 100644
--- a/components/hal/esp32c3/include/hal/gpio_ll.h
+++ b/components/hal/esp32c3/include/hal/gpio_ll.h
@@ -355,7 +355,7 @@ static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
   */
 static inline void gpio_ll_deep_sleep_hold_dis(gpio_dev_t *hw)
 {
-    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
 }
 
 /**
diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h
index f4c9c81620..29fbfb2d4e 100644
--- a/components/hal/esp32s2/include/hal/gpio_ll.h
+++ b/components/hal/esp32s2/include/hal/gpio_ll.h
@@ -363,7 +363,7 @@ static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
   */
 static inline void gpio_ll_deep_sleep_hold_dis(gpio_dev_t *hw)
 {
-    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
 }
 
 /**
diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h
index a4a2bd265b..87f746c868 100644
--- a/components/hal/esp32s3/include/hal/gpio_ll.h
+++ b/components/hal/esp32s3/include/hal/gpio_ll.h
@@ -379,7 +379,7 @@ static inline void gpio_ll_deep_sleep_hold_en(gpio_dev_t *hw)
   */
 static inline void gpio_ll_deep_sleep_hold_dis(gpio_dev_t *hw)
 {
-    SET_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_CLR_DG_PAD_AUTOHOLD);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_DG_PAD_AUTOHOLD_EN_M);
 }
 
 /**