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https://github.com/espressif/esp-idf.git
synced 2026-05-04 03:52:01 +02:00
Add documentation to panic handler functions, move watchpoint stuff from tasks.c to port.c, account for non-32-bytes-aligned stacks when setting watchpoint, add debug reason explanation to panic handler
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@@ -164,8 +164,37 @@ void panicHandler(XtExcFrame *frame)
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panicPutStr("Guru Meditation Error: Core ");
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panicPutDec(xPortGetCoreID());
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panicPutStr(" panic'ed (");
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panicPutStr(reason);
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panicPutStr(")\r\n");
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if (!abort_called) {
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panicPutStr(reason);
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panicPutStr(")\r\n");
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if (regs[20]==PANIC_RSN_DEBUGEXCEPTION) {
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int debugRsn;
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asm("rsr.debugcause %0":"=r"(debugRsn));
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panicPutStr("Debug exception reason: ");
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if (debugRsn&XCHAL_DEBUGCAUSE_ICOUNT_MASK) panicPutStr("SingleStep ");
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if (debugRsn&XCHAL_DEBUGCAUSE_IBREAK_MASK) panicPutStr("HwBreakpoint ");
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if (debugRsn&XCHAL_DEBUGCAUSE_DBREAK_MASK) {
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//Unlike what the ISA manual says, this core seemingly distinguishes from a DBREAK
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//reason caused by watchdog 0 and one caused by watchdog 1 by setting bit 8 of the
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//debugcause if the cause is watchdog 1 and clearing it if it's watchdog 0.
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if (debugRsn&(1<<8)) {
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#if CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK
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panicPutStr("Stack canary watchpoint triggered ");
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#else
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panicPutStr("Watchpoint 1 triggered ");
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#endif
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} else {
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panicPutStr("Watchpoint 0 triggered ");
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}
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}
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if (debugRsn&XCHAL_DEBUGCAUSE_BREAK_MASK) panicPutStr("BREAK instr ");
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if (debugRsn&XCHAL_DEBUGCAUSE_BREAKN_MASK) panicPutStr("BREAKN instr ");
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if (debugRsn&XCHAL_DEBUGCAUSE_DEBUGINT_MASK) panicPutStr("DebugIntr ");
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panicPutStr("\r\n");
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}
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} else {
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panicPutStr("abort)\r\n");
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}
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if (esp_cpu_in_ocd_debug_mode()) {
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asm("break.n 1");
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@@ -363,11 +392,11 @@ esp_err_t esp_set_watchpoint(int no, void *adr, int size, int flags)
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if (flags&(~0xC0000000)) return ESP_ERR_INVALID_ARG;
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int dbreakc=0x3F;
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//We support watching 2^n byte values, from 1 to 64. Calculate the mask for that.
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for (x=0; x<6; x++) {
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for (x=0; x<7; x++) {
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if (size==(1<<x)) break;
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dbreakc<<=1;
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}
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if (x==6) return ESP_ERR_INVALID_ARG;
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if (x==7) return ESP_ERR_INVALID_ARG;
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//Mask mask and add in flags.
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dbreakc=(dbreakc&0x3f)|flags;
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