From 881a90b8ab5ba481b3410be6b886c16d1866b123 Mon Sep 17 00:00:00 2001
From: Jeroen Domburg <jeroen@espressif.com>
Date: Mon, 24 Apr 2017 16:13:22 +0800
Subject: [PATCH] SPI: SPI master clock calculation: n has a minimum of 2 to
 allow for both a low and a high cycle. Fixes
 https://github.com/espressif/esp-idf/issues/491

---
 components/driver/spi_master.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/components/driver/spi_master.c b/components/driver/spi_master.c
index 28e964787e..5b6b0b477f 100644
--- a/components/driver/spi_master.c
+++ b/components/driver/spi_master.c
@@ -300,7 +300,7 @@ static int spi_set_clock(spi_dev_t *hw, int fapb, int hz, int duty_cycle) {
         int bestpre=-1;
         int besterr=0;
         int errval;
-        for (n=1; n<=64; n++) {
+        for (n=2; n<=64; n++) { //Start at 2: we need to be able to set h/l so we have at least one high and one low pulse.
             //Effectively, this does pre=round((fapb/n)/hz).
             pre=((fapb/n)+(hz/2))/hz;
             if (pre<=0) pre=1;