mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-02 20:24:32 +02:00
Merge branch 'change/ble_update_lib_20250709_v5.1' into 'release/v5.1'
change(ble): [AUTO_MR] 20250709 - Update ESP BLE Controller Lib (v5.1) See merge request espressif/esp-idf!40467
This commit is contained in:
@@ -281,6 +281,7 @@ config BT_LE_CONTROLLER_TASK_STACK_SIZE
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help
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help
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This configures stack size of NimBLE controller task
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This configures stack size of NimBLE controller task
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menu "Controller debug features"
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menuconfig BT_LE_CONTROLLER_LOG_ENABLED
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menuconfig BT_LE_CONTROLLER_LOG_ENABLED
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bool "Controller log enable"
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bool "Controller log enable"
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default n
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default n
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@@ -369,6 +370,14 @@ config BT_LE_CONTROLLER_LOG_TASK_WDT_USER_HANDLER_ENABLE
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default n
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default n
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help
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help
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Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
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Implement esp_task_wdt_isr_user_handler to get controller logs when task wdt issue is triggered.
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config BT_LE_MEM_CHECK_ENABLED
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bool "Enable memory allocation check"
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default n
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help
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Used in internal tests only. Enable the memory allocation check.
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endmenu
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config BT_LE_LL_RESOLV_LIST_SIZE
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config BT_LE_LL_RESOLV_LIST_SIZE
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int "BLE LL Resolving list size"
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int "BLE LL Resolving list size"
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range 1 5
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range 1 5
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@@ -1571,3 +1571,10 @@ int ble_sm_alg_gen_key_pair(uint8_t *pub, uint8_t *priv)
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#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
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#endif // CONFIG_BT_LE_SM_LEGACY || CONFIG_BT_LE_SM_SC
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#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
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#endif // (!CONFIG_BT_NIMBLE_ENABLED) && (CONFIG_BT_CONTROLLER_ENABLED)
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#if CONFIG_BT_LE_MEM_CHECK_ENABLED
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void ble_memory_count_limit_set(uint16_t count_limit)
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{
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bt_osi_mem_count_limit_set(count_limit);
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}
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#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
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@@ -447,6 +447,12 @@ menu "Controller debug features"
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config BT_LE_PTR_CHECK_ENABLED
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config BT_LE_PTR_CHECK_ENABLED
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bool "Enable boundary check for internal memory"
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bool "Enable boundary check for internal memory"
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default n
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default n
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config BT_LE_MEM_CHECK_ENABLED
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bool "Enable memory allocation check"
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default n
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help
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Used in internal tests only. Enable the memory allocation check.
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endmenu
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endmenu
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config BT_LE_LL_RESOLV_LIST_SIZE
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config BT_LE_LL_RESOLV_LIST_SIZE
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@@ -22,6 +22,21 @@ void conn_stack_deinitEnv(void);
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int conn_stack_enable(void);
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int conn_stack_enable(void);
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void conn_stack_disable(void);
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void conn_stack_disable(void);
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int adv_stack_initEnv(void);
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void adv_stack_deinitEnv(void);
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int adv_stack_enable(void);
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void adv_stack_disable(void);
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int extAdv_stack_initEnv(void);
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void extAdv_stack_deinitEnv(void);
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int extAdv_stack_enable(void);
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void extAdv_stack_disable(void);
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int sync_stack_initEnv(void);
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void sync_stack_deinitEnv(void);
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int sync_stack_enable(void);
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void sync_stack_disable(void);
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#if CONFIG_BT_LE_ERROR_SIM_ENABLED
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#if CONFIG_BT_LE_ERROR_SIM_ENABLED
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int conn_errorSim_initEnv(void);
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int conn_errorSim_initEnv(void);
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void conn_errorSim_deinitEnv(void);
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void conn_errorSim_deinitEnv(void);
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@@ -104,6 +119,21 @@ int ble_stack_initEnv(void)
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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rc = adv_stack_initEnv();
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if (rc) {
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return rc;
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}
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rc = extAdv_stack_initEnv();
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if (rc) {
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return rc;
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}
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rc = sync_stack_initEnv();
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if (rc) {
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return rc;
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}
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return 0;
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return 0;
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}
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}
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@@ -116,6 +146,10 @@ void ble_stack_deinitEnv(void)
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conn_stack_deinitEnv();
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conn_stack_deinitEnv();
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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sync_stack_deinitEnv();
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extAdv_stack_deinitEnv();
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adv_stack_deinitEnv();
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base_stack_deinitEnv();
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base_stack_deinitEnv();
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}
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}
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@@ -128,6 +162,21 @@ int ble_stack_enable(void)
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return rc;
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return rc;
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}
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}
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rc = adv_stack_enable();
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if (rc) {
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return rc;
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}
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rc = extAdv_stack_enable();
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if (rc) {
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return rc;
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}
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rc = sync_stack_enable();
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if (rc) {
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return rc;
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}
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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rc = conn_stack_enable();
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rc = conn_stack_enable();
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if (rc) {
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if (rc) {
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@@ -166,6 +215,8 @@ void ble_stack_disable(void)
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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conn_stack_disable();
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conn_stack_disable();
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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sync_stack_disable();
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extAdv_stack_disable();
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adv_stack_disable();
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base_stack_disable();
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base_stack_disable();
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}
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}
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@@ -1768,3 +1768,10 @@ ble_capture_info_user_handler(uint8_t type, uint32_t reason, uint32_t param1, ui
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}
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}
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return 0;
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return 0;
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}
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}
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#if CONFIG_BT_LE_MEM_CHECK_ENABLED
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void ble_memory_count_limit_set(uint16_t count_limit)
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{
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bt_osi_mem_count_limit_set(count_limit);
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}
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#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
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@@ -441,6 +441,12 @@ menu "Controller debug features"
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config BT_LE_PTR_CHECK_ENABLED
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config BT_LE_PTR_CHECK_ENABLED
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bool "Enable boundary check for internal memory"
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bool "Enable boundary check for internal memory"
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default n
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default n
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config BT_LE_MEM_CHECK_ENABLED
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bool "Enable memory allocation check"
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default n
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help
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Used in internal tests only. Enable the memory allocation check.
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endmenu
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endmenu
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config BT_LE_LL_RESOLV_LIST_SIZE
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config BT_LE_LL_RESOLV_LIST_SIZE
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@@ -22,6 +22,21 @@ void conn_stack_deinitEnv(void);
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int conn_stack_enable(void);
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int conn_stack_enable(void);
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void conn_stack_disable(void);
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void conn_stack_disable(void);
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int adv_stack_initEnv(void);
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void adv_stack_deinitEnv(void);
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int adv_stack_enable(void);
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void adv_stack_disable(void);
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int extAdv_stack_initEnv(void);
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void extAdv_stack_deinitEnv(void);
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int extAdv_stack_enable(void);
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void extAdv_stack_disable(void);
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int sync_stack_initEnv(void);
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void sync_stack_deinitEnv(void);
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int sync_stack_enable(void);
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void sync_stack_disable(void);
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#if CONFIG_BT_LE_ERROR_SIM_ENABLED
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#if CONFIG_BT_LE_ERROR_SIM_ENABLED
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int conn_errorSim_initEnv(void);
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int conn_errorSim_initEnv(void);
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void conn_errorSim_deinitEnv(void);
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void conn_errorSim_deinitEnv(void);
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@@ -85,6 +100,22 @@ int ble_stack_initEnv(void)
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return rc;
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return rc;
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}
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}
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rc = adv_stack_initEnv();
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if (rc) {
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return rc;
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}
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rc = extAdv_stack_initEnv();
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if (rc) {
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return rc;
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}
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rc = sync_stack_initEnv();
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if (rc) {
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return rc;
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}
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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rc = conn_stack_initEnv();
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rc = conn_stack_initEnv();
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if (rc) {
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if (rc) {
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@@ -109,7 +140,9 @@ void ble_stack_deinitEnv(void)
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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conn_stack_deinitEnv();
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conn_stack_deinitEnv();
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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sync_stack_deinitEnv();
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extAdv_stack_deinitEnv();
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adv_stack_deinitEnv();
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base_stack_deinitEnv();
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base_stack_deinitEnv();
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}
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}
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@@ -122,6 +155,21 @@ int ble_stack_enable(void)
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return rc;
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return rc;
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}
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}
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rc = adv_stack_enable();
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if (rc) {
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return rc;
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}
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rc = extAdv_stack_enable();
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if (rc) {
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return rc;
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}
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rc = sync_stack_enable();
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if (rc) {
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return rc;
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}
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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#if DEFAULT_BT_LE_MAX_CONNECTIONS
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rc = conn_stack_enable();
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rc = conn_stack_enable();
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if (rc) {
|
if (rc) {
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@@ -160,6 +208,8 @@ void ble_stack_disable(void)
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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#endif // CONFIG_BT_LE_ERROR_SIM_ENABLED
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conn_stack_disable();
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conn_stack_disable();
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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#endif // DEFAULT_BT_LE_MAX_CONNECTIONS
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|
sync_stack_disable();
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|
extAdv_stack_disable();
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|
adv_stack_disable();
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base_stack_disable();
|
base_stack_disable();
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}
|
}
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|
@@ -1693,3 +1693,10 @@ ble_capture_info_user_handler(uint8_t type, uint32_t reason, uint32_t param1, ui
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}
|
}
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return 0;
|
return 0;
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}
|
}
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|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
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|
void ble_memory_count_limit_set(uint16_t count_limit)
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|
{
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|
bt_osi_mem_count_limit_set(count_limit);
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|
}
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|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
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|
Submodule components/bt/controller/lib_esp32c2/esp32c2-bt-lib updated: 7be8be96db...68d2b55c99
Submodule components/bt/controller/lib_esp32c6/esp32c6-bt-lib updated: 80f6b7e6e4...f68cbf2768
Submodule components/bt/controller/lib_esp32h2/esp32h2-bt-lib updated: 513c3fb61e...b83a28f797
@@ -446,6 +446,10 @@ uint32_t esp_bt_get_lpclk_freq(void);
|
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|
|
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void esp_bt_set_lpclk_freq(uint32_t clk_freq);
|
void esp_bt_set_lpclk_freq(uint32_t clk_freq);
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|
|
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|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
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|
void ble_memory_count_limit_set(uint16_t count_limit);
|
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|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
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|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
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}
|
}
|
||||||
#endif
|
#endif
|
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|
@@ -521,6 +521,10 @@ uint32_t esp_bt_get_lpclk_freq(void);
|
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|
|
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void esp_bt_set_lpclk_freq(uint32_t clk_freq);
|
void esp_bt_set_lpclk_freq(uint32_t clk_freq);
|
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|
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
void ble_memory_count_limit_set(uint16_t count_limit);
|
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|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@@ -462,6 +462,10 @@ uint32_t esp_bt_get_lpclk_freq(void);
|
|||||||
|
|
||||||
void esp_bt_set_lpclk_freq(uint32_t clk_freq);
|
void esp_bt_set_lpclk_freq(uint32_t clk_freq);
|
||||||
|
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
void ble_memory_count_limit_set(uint16_t count_limit);
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
@@ -19,3 +19,7 @@ void *bt_osi_mem_malloc_internal(size_t size);
|
|||||||
void *bt_osi_mem_calloc_internal(size_t n, size_t size);
|
void *bt_osi_mem_calloc_internal(size_t n, size_t size);
|
||||||
|
|
||||||
void bt_osi_mem_free(void *ptr);
|
void bt_osi_mem_free(void *ptr);
|
||||||
|
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
void bt_osi_mem_count_limit_set(uint16_t count_limit);
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
|
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
|
||||||
*
|
*
|
||||||
* SPDX-License-Identifier: Apache-2.0
|
* SPDX-License-Identifier: Apache-2.0
|
||||||
*/
|
*/
|
||||||
@@ -11,6 +11,10 @@
|
|||||||
#include <assert.h>
|
#include <assert.h>
|
||||||
|
|
||||||
static uint8_t log_count;
|
static uint8_t log_count;
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
static uint16_t mem_count_limit = 0;
|
||||||
|
static uint16_t curr_mem_count;
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
IRAM_ATTR void *bt_osi_mem_malloc(size_t size)
|
IRAM_ATTR void *bt_osi_mem_malloc(size_t size)
|
||||||
{
|
{
|
||||||
void *mem = NULL;
|
void *mem = NULL;
|
||||||
@@ -49,11 +53,27 @@ IRAM_ATTR void *bt_osi_mem_calloc(size_t n, size_t size)
|
|||||||
|
|
||||||
IRAM_ATTR void *bt_osi_mem_malloc_internal(size_t size)
|
IRAM_ATTR void *bt_osi_mem_malloc_internal(size_t size)
|
||||||
{
|
{
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
if (mem_count_limit) {
|
||||||
|
if (curr_mem_count > mem_count_limit) {
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
curr_mem_count ++;
|
||||||
|
}
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
return heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
|
return heap_caps_malloc(size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
|
||||||
}
|
}
|
||||||
|
|
||||||
IRAM_ATTR void *bt_osi_mem_calloc_internal(size_t n, size_t size)
|
IRAM_ATTR void *bt_osi_mem_calloc_internal(size_t n, size_t size)
|
||||||
{
|
{
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
if (mem_count_limit) {
|
||||||
|
if (curr_mem_count > mem_count_limit) {
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
curr_mem_count ++;
|
||||||
|
}
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
return heap_caps_calloc(n, size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
|
return heap_caps_calloc(n, size, MALLOC_CAP_INTERNAL|MALLOC_CAP_8BIT|MALLOC_CAP_DMA);
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -61,3 +81,11 @@ IRAM_ATTR void bt_osi_mem_free(void *ptr)
|
|||||||
{
|
{
|
||||||
heap_caps_free(ptr);
|
heap_caps_free(ptr);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#if CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
void bt_osi_mem_count_limit_set(uint16_t count_limit)
|
||||||
|
{
|
||||||
|
mem_count_limit = count_limit;
|
||||||
|
curr_mem_count = 0;
|
||||||
|
}
|
||||||
|
#endif // CONFIG_BT_LE_MEM_CHECK_ENABLED
|
||||||
|
@@ -41,7 +41,7 @@ r_ble_hci_trans_cfg_hs = 0x40000aec;
|
|||||||
r_ble_hci_trans_cfg_ll = 0x40000af0;
|
r_ble_hci_trans_cfg_ll = 0x40000af0;
|
||||||
r_ble_hci_trans_deinit = 0x40000af4;
|
r_ble_hci_trans_deinit = 0x40000af4;
|
||||||
//r_ble_hci_trans_env_init = 0x40000af8;
|
//r_ble_hci_trans_env_init = 0x40000af8;
|
||||||
r_ble_hci_trans_init = 0x40000afc;
|
//r_ble_hci_trans_init = 0x40000afc;
|
||||||
r_ble_hci_uart_acl_tx = 0x40000b00;
|
r_ble_hci_uart_acl_tx = 0x40000b00;
|
||||||
r_ble_hci_uart_cmdevt_tx = 0x40000b04;
|
r_ble_hci_uart_cmdevt_tx = 0x40000b04;
|
||||||
r_ble_hci_uart_config = 0x40000b08;
|
r_ble_hci_uart_config = 0x40000b08;
|
||||||
@@ -767,7 +767,7 @@ r_ble_lll_rfmgmt_deinit = 0x4000164c;
|
|||||||
//r_ble_lll_rfmgmt_enable = 0x40001654;
|
//r_ble_lll_rfmgmt_enable = 0x40001654;
|
||||||
//r_ble_lll_rfmgmt_enable_now = 0x40001658;
|
//r_ble_lll_rfmgmt_enable_now = 0x40001658;
|
||||||
r_ble_lll_rfmgmt_init = 0x4000165c;
|
r_ble_lll_rfmgmt_init = 0x4000165c;
|
||||||
r_ble_lll_rfmgmt_is_enabled = 0x40001660;
|
//r_ble_lll_rfmgmt_is_enabled = 0x40001660;
|
||||||
r_ble_lll_rfmgmt_release = 0x40001664;
|
r_ble_lll_rfmgmt_release = 0x40001664;
|
||||||
r_ble_lll_rfmgmt_release_ev = 0x40001668;
|
r_ble_lll_rfmgmt_release_ev = 0x40001668;
|
||||||
r_ble_lll_rfmgmt_reset = 0x4000166c;
|
r_ble_lll_rfmgmt_reset = 0x4000166c;
|
||||||
@@ -785,7 +785,7 @@ r_ble_lll_scan_aux_data_free = 0x40001698;
|
|||||||
r_ble_lll_scan_chk_resume = 0x4000169c;
|
r_ble_lll_scan_chk_resume = 0x4000169c;
|
||||||
r_ble_lll_scan_clean_cur_aux_data = 0x400016a0;
|
r_ble_lll_scan_clean_cur_aux_data = 0x400016a0;
|
||||||
//r_ble_lll_scan_coex_event_cb = 0x400016a4;
|
//r_ble_lll_scan_coex_event_cb = 0x400016a4;
|
||||||
r_ble_lll_scan_common_init = 0x400016a8;
|
//r_ble_lll_scan_common_init = 0x400016a8;
|
||||||
r_ble_lll_scan_deinit = 0x400016ac;
|
r_ble_lll_scan_deinit = 0x400016ac;
|
||||||
r_ble_lll_scan_duration_period_timers_restart = 0x400016b0;
|
r_ble_lll_scan_duration_period_timers_restart = 0x400016b0;
|
||||||
r_ble_lll_scan_duration_period_timers_stop = 0x400016b4;
|
r_ble_lll_scan_duration_period_timers_stop = 0x400016b4;
|
||||||
@@ -1184,7 +1184,7 @@ r_ble_ll_conn_is_lru_compare_with_sync = 0x40002f88;
|
|||||||
r_ble_ll_conn_rollback_last_unmapped_chan = 0x40002f8c;
|
r_ble_ll_conn_rollback_last_unmapped_chan = 0x40002f8c;
|
||||||
//r_ble_ll_hci_vs_csa_set = 0x40002f90;
|
//r_ble_ll_hci_vs_csa_set = 0x40002f90;
|
||||||
r_ble_ll_hci_reset = 0x40002f94;
|
r_ble_ll_hci_reset = 0x40002f94;
|
||||||
r_ble_ll_adv_status_check = 0x40002f98;
|
//r_ble_ll_adv_status_check = 0x40002f98;
|
||||||
r_ble_ll_conn_status_check = 0x40002f9c;
|
r_ble_ll_conn_status_check = 0x40002f9c;
|
||||||
r_ble_ll_scan_status_check = 0x40002fa0;
|
r_ble_ll_scan_status_check = 0x40002fa0;
|
||||||
r_ble_ll_sync_status_check = 0x40002fa4;
|
r_ble_ll_sync_status_check = 0x40002fa4;
|
||||||
|
@@ -34,7 +34,7 @@ r_ble_hci_trans_buf_alloc = 0x40000ae4;
|
|||||||
r_ble_hci_trans_buf_free = 0x40000ae8;
|
r_ble_hci_trans_buf_free = 0x40000ae8;
|
||||||
r_ble_hci_trans_cfg_hs = 0x40000aec;
|
r_ble_hci_trans_cfg_hs = 0x40000aec;
|
||||||
r_ble_hci_trans_cfg_ll = 0x40000af0;
|
r_ble_hci_trans_cfg_ll = 0x40000af0;
|
||||||
r_ble_hci_trans_init = 0x40000afc;
|
//r_ble_hci_trans_init = 0x40000afc;
|
||||||
r_ble_hci_uart_acl_tx = 0x40000b00;
|
r_ble_hci_uart_acl_tx = 0x40000b00;
|
||||||
r_ble_hci_uart_cmdevt_tx = 0x40000b04;
|
r_ble_hci_uart_cmdevt_tx = 0x40000b04;
|
||||||
r_ble_hci_uart_config = 0x40000b08;
|
r_ble_hci_uart_config = 0x40000b08;
|
||||||
@@ -362,7 +362,7 @@ r_ble_ll_resolv_get_list = 0x40001160;
|
|||||||
r_ble_ll_resolv_get_priv_addr = 0x40001164;
|
r_ble_ll_resolv_get_priv_addr = 0x40001164;
|
||||||
r_ble_ll_resolv_get_rpa_tmo = 0x40001168;
|
r_ble_ll_resolv_get_rpa_tmo = 0x40001168;
|
||||||
r_ble_ll_resolv_irk_nonzero = 0x40001170;
|
r_ble_ll_resolv_irk_nonzero = 0x40001170;
|
||||||
r_ble_ll_resolv_list_add = 0x40001174;
|
//r_ble_ll_resolv_list_add = 0x40001174;
|
||||||
r_ble_ll_resolv_list_chg_allowed = 0x40001178;
|
r_ble_ll_resolv_list_chg_allowed = 0x40001178;
|
||||||
r_ble_ll_resolv_list_clr = 0x4000117c;
|
r_ble_ll_resolv_list_clr = 0x4000117c;
|
||||||
r_ble_ll_resolv_list_find = 0x40001180;
|
r_ble_ll_resolv_list_find = 0x40001180;
|
||||||
@@ -510,7 +510,7 @@ r_ble_lll_adv_make_done = 0x40001438;
|
|||||||
r_ble_lll_adv_periodic_done = 0x4000143c;
|
r_ble_lll_adv_periodic_done = 0x4000143c;
|
||||||
r_ble_lll_adv_periodic_event_done = 0x40001440;
|
r_ble_lll_adv_periodic_event_done = 0x40001440;
|
||||||
r_ble_lll_adv_periodic_rmvd_from_sched = 0x40001444;
|
r_ble_lll_adv_periodic_rmvd_from_sched = 0x40001444;
|
||||||
r_ble_lll_adv_periodic_schedule_first = 0x40001448;
|
//r_ble_lll_adv_periodic_schedule_first = 0x40001448;
|
||||||
r_ble_lll_adv_pri_schedule_tx_pdu = 0x40001458;
|
r_ble_lll_adv_pri_schedule_tx_pdu = 0x40001458;
|
||||||
r_ble_lll_adv_reschedule_event = 0x4000145c;
|
r_ble_lll_adv_reschedule_event = 0x4000145c;
|
||||||
r_ble_lll_adv_reschedule_periodic_event = 0x40001460;
|
r_ble_lll_adv_reschedule_periodic_event = 0x40001460;
|
||||||
@@ -521,7 +521,7 @@ r_ble_lll_adv_sm_deinit = 0x40001478;
|
|||||||
r_ble_lll_adv_sm_event_init = 0x4000147c;
|
r_ble_lll_adv_sm_event_init = 0x4000147c;
|
||||||
r_ble_lll_adv_sm_event_restore = 0x40001480;
|
r_ble_lll_adv_sm_event_restore = 0x40001480;
|
||||||
r_ble_lll_adv_sm_event_store = 0x40001484;
|
r_ble_lll_adv_sm_event_store = 0x40001484;
|
||||||
r_ble_lll_adv_sm_init = 0x40001488;
|
//r_ble_lll_adv_sm_init = 0x40001488;
|
||||||
r_ble_lll_adv_sm_reset = 0x4000148c;
|
r_ble_lll_adv_sm_reset = 0x4000148c;
|
||||||
r_ble_lll_adv_start = 0x40001490;
|
r_ble_lll_adv_start = 0x40001490;
|
||||||
r_ble_lll_adv_stop = 0x40001494;
|
r_ble_lll_adv_stop = 0x40001494;
|
||||||
@@ -609,7 +609,7 @@ r_ble_lll_per_adv_coex_dpc_update = 0x40001634;
|
|||||||
r_ble_lll_per_adv_coex_dpc_update_on_data_updated = 0x40001638;
|
r_ble_lll_per_adv_coex_dpc_update_on_data_updated = 0x40001638;
|
||||||
r_ble_lll_per_adv_coex_dpc_update_on_scheduled = 0x4000163c;
|
r_ble_lll_per_adv_coex_dpc_update_on_scheduled = 0x4000163c;
|
||||||
r_ble_lll_per_adv_coex_dpc_update_on_start = 0x40001640;
|
r_ble_lll_per_adv_coex_dpc_update_on_start = 0x40001640;
|
||||||
r_ble_lll_rfmgmt_is_enabled = 0x40001660;
|
//r_ble_lll_rfmgmt_is_enabled = 0x40001660;
|
||||||
//r_ble_lll_rfmgmt_release = 0x40001664;
|
//r_ble_lll_rfmgmt_release = 0x40001664;
|
||||||
r_ble_lll_rfmgmt_scan_changed = 0x40001670;
|
r_ble_lll_rfmgmt_scan_changed = 0x40001670;
|
||||||
r_ble_lll_rfmgmt_sched_changed = 0x40001674;
|
r_ble_lll_rfmgmt_sched_changed = 0x40001674;
|
||||||
@@ -622,7 +622,7 @@ r_ble_lll_scan_abort_aux_sched = 0x40001694;
|
|||||||
r_ble_lll_scan_chk_resume = 0x4000169c;
|
r_ble_lll_scan_chk_resume = 0x4000169c;
|
||||||
r_ble_lll_scan_clean_cur_aux_data = 0x400016a0;
|
r_ble_lll_scan_clean_cur_aux_data = 0x400016a0;
|
||||||
//r_ble_lll_scan_coex_event_cb = 0x400016a4;
|
//r_ble_lll_scan_coex_event_cb = 0x400016a4;
|
||||||
r_ble_lll_scan_common_init = 0x400016a8;
|
//r_ble_lll_scan_common_init = 0x400016a8;
|
||||||
r_ble_lll_scan_deinit = 0x400016ac;
|
r_ble_lll_scan_deinit = 0x400016ac;
|
||||||
r_ble_lll_scan_duration_period_timers_restart = 0x400016b0;
|
r_ble_lll_scan_duration_period_timers_restart = 0x400016b0;
|
||||||
r_ble_lll_scan_duration_period_timers_stop = 0x400016b4;
|
r_ble_lll_scan_duration_period_timers_stop = 0x400016b4;
|
||||||
|
Reference in New Issue
Block a user