From 8994f8fe7040b370a26debe8f10a39aa749003b5 Mon Sep 17 00:00:00 2001 From: wanckl Date: Tue, 18 Mar 2025 17:15:42 +0800 Subject: [PATCH] feat(spi_flash): add support gpspi ext_flash --- .../hal/esp32c2/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32c3/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32c5/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32c6/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32c61/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32h2/include/hal/gpspi_flash_ll.h | 7 +- .../hal/esp32h21/include/hal/gpspi_flash_ll.h | 431 ++++++++++++++++++ .../hal/esp32h21/include/hal/spi_flash_ll.h | 20 +- .../esp32h21/include/hal/spimem_flash_ll.h | 11 +- .../hal/esp32h4/include/hal/gpspi_flash_ll.h | 5 +- .../hal/esp32p4/include/hal/gpspi_flash_ll.h | 17 +- .../hal/esp32s2/include/hal/gpspi_flash_ll.h | 4 +- .../hal/esp32s3/include/hal/gpspi_flash_ll.h | 4 +- components/hal/spi_flash_hal.c | 14 +- .../esp_flash/main/test_esp_flash_def.h | 2 +- 15 files changed, 476 insertions(+), 74 deletions(-) create mode 100644 components/hal/esp32h21/include/hal/gpspi_flash_ll.h diff --git a/components/hal/esp32c2/include/hal/gpspi_flash_ll.h b/components/hal/esp32c2/include/hal/gpspi_flash_ll.h index 1364850175..0053f81319 100644 --- a/components/hal/esp32c2/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c2/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -26,7 +24,6 @@ extern "C" { #endif -//NOTE: These macros are changed on ESP32-C2 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h index 26338ba04a..aa8f923d42 100644 --- a/components/hal/esp32c3/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c3/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,7 +26,6 @@ extern "C" { #endif -//NOTE: These macros are changed on c3 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32c5/include/hal/gpspi_flash_ll.h b/components/hal/esp32c5/include/hal/gpspi_flash_ll.h index 3622702db2..c2d72ce158 100644 --- a/components/hal/esp32c5/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c5/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,7 +26,6 @@ extern "C" { #endif -//NOTE: These macros are changed on c3 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32c6/include/hal/gpspi_flash_ll.h b/components/hal/esp32c6/include/hal/gpspi_flash_ll.h index 3622702db2..c2d72ce158 100644 --- a/components/hal/esp32c6/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c6/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,7 +26,6 @@ extern "C" { #endif -//NOTE: These macros are changed on c3 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32c61/include/hal/gpspi_flash_ll.h b/components/hal/esp32c61/include/hal/gpspi_flash_ll.h index 654d8e5f20..40c4c247cc 100644 --- a/components/hal/esp32c61/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32c61/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,7 +26,6 @@ extern "C" { #endif -//NOTE: These macros are changed on c3 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32h2/include/hal/gpspi_flash_ll.h b/components/hal/esp32h2/include/hal/gpspi_flash_ll.h index 682a0cacb3..c493614c01 100644 --- a/components/hal/esp32h2/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32h2/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,7 +26,6 @@ extern "C" { #endif -//NOTE: These macros are changed on h2 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32h21/include/hal/gpspi_flash_ll.h b/components/hal/esp32h21/include/hal/gpspi_flash_ll.h new file mode 100644 index 0000000000..81b28fddfe --- /dev/null +++ b/components/hal/esp32h21/include/hal/gpspi_flash_ll.h @@ -0,0 +1,431 @@ +/* + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/******************************************************************************* + * NOTICE + * The Lowlevel layer for SPI Flash + * The ll is not public api, don't use in application code. + ******************************************************************************/ + +#pragma once + +#include +#include "soc/spi_periph.h" +#include "soc/spi_struct.h" +#include "hal/spi_types.h" +#include "hal/spi_flash_types.h" +#include // For MIN/MAX +#include +#include +#include "hal/misc.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) +#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) + +typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t; +#define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (32) // (register default)0: XTAL_CLK + +/*------------------------------------------------------------------------------ + * Control + *----------------------------------------------------------------------------*/ +/** + * Reset peripheral registers before configuration and starting control + * + * @param dev Beginning address of the peripheral registers. + */ +static inline void gpspi_flash_ll_reset(spi_dev_t *dev) +{ + dev->user.val = 0; + dev->ctrl.val = 0; + + dev->clk_gate.clk_en = 1; + dev->clk_gate.mst_clk_active = 1; + dev->clk_gate.mst_clk_sel = 1; + + dev->dma_conf.val = 0; + dev->dma_conf.slv_tx_seg_trans_clr_en = 1; + dev->dma_conf.slv_rx_seg_trans_clr_en = 1; + dev->dma_conf.dma_slv_seg_trans_en = 0; +} + +/** + * Check whether the previous operation is done. + * + * @param dev Beginning address of the peripheral registers. + * + * @return true if last command is done, otherwise false. + */ +static inline bool gpspi_flash_ll_cmd_is_done(const spi_dev_t *dev) +{ + return (dev->cmd.usr == 0); +} + +/** + * Get the read data from the buffer after ``gpspi_flash_ll_read`` is done. + * + * @param dev Beginning address of the peripheral registers. + * @param buffer Buffer to hold the output data + * @param read_len Length to get out of the buffer + */ +static inline void gpspi_flash_ll_get_buffer_data(spi_dev_t *dev, void *buffer, uint32_t read_len) +{ + if (((intptr_t)buffer % 4 == 0) && (read_len % 4 == 0)) { + // If everything is word-aligned, do a faster memcpy + memcpy(buffer, (void *)dev->data_buf, read_len); + } else { + // Otherwise, slow(er) path copies word by word + int copy_len = read_len; + for (int i = 0; i < (read_len + 3) / 4; i++) { + int word_len = MIN(sizeof(uint32_t), copy_len); + uint32_t word = dev->data_buf[i].buf; + memcpy(buffer, &word, word_len); + buffer = (void *)((intptr_t)buffer + word_len); + copy_len -= word_len; + } + } +} + +/** + * Write a word to the data buffer. + * + * @param dev Beginning address of the peripheral registers. + * @param word Data to write at address 0. + */ +static inline void gpspi_flash_ll_write_word(spi_dev_t *dev, uint32_t word) +{ + dev->data_buf[0].buf = word; +} + +/** + * Set the data to be written in the data buffer. + * + * @param dev Beginning address of the peripheral registers. + * @param buffer Buffer holding the data + * @param length Length of data in bytes. + */ +static inline void gpspi_flash_ll_set_buffer_data(spi_dev_t *dev, const void *buffer, uint32_t length) +{ + // Load data registers, word at a time + int num_words = (length + 3) / 4; + for (int i = 0; i < num_words; i++) { + uint32_t word = 0; + uint32_t word_len = MIN(length, sizeof(word)); + memcpy(&word, buffer, word_len); + dev->data_buf[i].buf = word; + length -= word_len; + buffer = (void *)((intptr_t)buffer + word_len); + } +} + +/** + * Trigger a user defined transaction. All phases, including command, address, dummy, and the data phases, + * should be configured before this is called. + * + * @param dev Beginning address of the peripheral registers. + * @param pe_ops Is page program/erase operation or not. (not used in gpspi) + */ +static inline void gpspi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops) +{ + dev->cmd.update = 1; + while (dev->cmd.update); + dev->cmd.usr = 1; +} + +/** + * In user mode, it is set to indicate that program/erase operation will be triggered. + * + * @param dev Beginning address of the peripheral registers. + */ +static inline void gpspi_flash_ll_set_pe_bit(spi_dev_t *dev) +{ + // Not supported on GPSPI +} + +/** + * Set HD pin high when flash work at spi mode. + * + * @param dev Beginning address of the peripheral registers. + */ +static inline void gpspi_flash_ll_set_hold_pol(spi_dev_t *dev, uint32_t pol_val) +{ + dev->ctrl.hold_pol = pol_val; +} + +/** + * Check whether the host is idle to perform new commands. + * + * @param dev Beginning address of the peripheral registers. + * + * @return true if the host is idle, otherwise false + */ +static inline bool gpspi_flash_ll_host_idle(const spi_dev_t *dev) +{ + return dev->cmd.usr == 0; +} + +/** + * Set phases for user-defined transaction to read + * + * @param dev Beginning address of the peripheral registers. + */ +static inline void gpspi_flash_ll_read_phase(spi_dev_t *dev) +{ + typeof(dev->user) user = { + .usr_mosi = 0, + .usr_miso = 1, + .usr_addr = 1, + .usr_command = 1, + }; + dev->user.val = user.val; +} +/*------------------------------------------------------------------------------ + * Configs + *----------------------------------------------------------------------------*/ +/** + * Select which pin to use for the flash + * + * @param dev Beginning address of the peripheral registers. + * @param pin Pin ID to use, 0-2. Set to other values to disable all the CS pins. + */ +static inline void gpspi_flash_ll_set_cs_pin(spi_dev_t *dev, int pin) +{ + dev->misc.cs0_dis = (pin == 0) ? 0 : 1; + dev->misc.cs1_dis = (pin == 1) ? 0 : 1; +} + +/** + * Set the read io mode. + * + * @param dev Beginning address of the peripheral registers. + * @param read_mode I/O mode to use in the following transactions. + */ +static inline void gpspi_flash_ll_set_read_mode(spi_dev_t *dev, esp_flash_io_mode_t read_mode) +{ + typeof(dev->ctrl) ctrl; + ctrl.val = dev->ctrl.val; + typeof(dev->user) user; + user.val = dev->user.val; + + ctrl.val &= ~(SPI_FCMD_QUAD_M | SPI_FADDR_QUAD_M | SPI_FREAD_QUAD_M | SPI_FCMD_DUAL_M | SPI_FADDR_DUAL_M | SPI_FREAD_DUAL_M); + user.val &= ~(SPI_FWRITE_QUAD_M | SPI_FWRITE_DUAL_M); + + switch (read_mode) { + case SPI_FLASH_FASTRD: + //the default option + case SPI_FLASH_SLOWRD: + break; + case SPI_FLASH_QIO: + ctrl.fread_quad = 1; + ctrl.faddr_quad = 1; + user.fwrite_quad = 1; + break; + case SPI_FLASH_QOUT: + ctrl.fread_quad = 1; + user.fwrite_quad = 1; + break; + case SPI_FLASH_DIO: + ctrl.fread_dual = 1; + ctrl.faddr_dual = 1; + user.fwrite_dual = 1; + break; + case SPI_FLASH_DOUT: + ctrl.fread_dual = 1; + user.fwrite_dual = 1; + break; + default: + abort(); + } + + dev->ctrl.val = ctrl.val; + dev->user.val = user.val; +} + +/** + * Set clock frequency to work at. + * + * @param dev Beginning address of the peripheral registers. + * @param clock_val pointer to the clock value to set + */ +static inline void gpspi_flash_ll_set_clock(spi_dev_t *dev, gpspi_flash_ll_clock_reg_t *clock_val) +{ + dev->clock.val = *clock_val; +} + +/** + * Set the input length, in bits. + * + * @param dev Beginning address of the peripheral registers. + * @param bitlen Length of input, in bits. + */ +static inline void gpspi_flash_ll_set_miso_bitlen(spi_dev_t *dev, uint32_t bitlen) +{ + dev->user.usr_miso = bitlen > 0; + if (bitlen) { + dev->ms_dlen.ms_data_bitlen = bitlen - 1; + } +} + +/** + * Set the output length, in bits (not including command, address and dummy + * phases) + * + * @param dev Beginning address of the peripheral registers. + * @param bitlen Length of output, in bits. + */ +static inline void gpspi_flash_ll_set_mosi_bitlen(spi_dev_t *dev, uint32_t bitlen) +{ + dev->user.usr_mosi = bitlen > 0; + if (bitlen) { + dev->ms_dlen.ms_data_bitlen = bitlen - 1; + } +} + +/** + * Set the command. + * + * @param dev Beginning address of the peripheral registers. + * @param command Command to send + * @param bitlen Length of the command + */ +static inline void gpspi_flash_ll_set_command(spi_dev_t *dev, uint8_t command, uint32_t bitlen) +{ + dev->user.usr_command = 1; + typeof(dev->user2) user2 = { + .usr_command_value = command, + .usr_command_bitlen = (bitlen - 1), + }; + dev->user2.val = user2.val; +} + +/** + * Get the address length that is set in register, in bits. + * + * @param dev Beginning address of the peripheral registers. + * + */ +static inline int gpspi_flash_ll_get_addr_bitlen(spi_dev_t *dev) +{ + return dev->user.usr_addr ? dev->user1.usr_addr_bitlen + 1 : 0; +} + +/** + * Set the address length to send, in bits. Should be called before commands that requires the address e.g. erase sector, read, write... + * + * @param dev Beginning address of the peripheral registers. + * @param bitlen Length of the address, in bits + */ +static inline void gpspi_flash_ll_set_addr_bitlen(spi_dev_t *dev, uint32_t bitlen) +{ + dev->user1.usr_addr_bitlen = (bitlen - 1); + dev->user.usr_addr = bitlen ? 1 : 0; +} + +/** + * Set the address to send in user mode. Should be called before commands that requires the address e.g. erase sector, read, write... + * + * @param dev Beginning address of the peripheral registers. + * @param addr Address to send + */ +static inline void gpspi_flash_ll_set_usr_address(spi_dev_t *dev, uint32_t addr, uint32_t bitlen) +{ + // The blank region should be all ones + uint32_t padding_ones = (bitlen == 32 ? 0 : UINT32_MAX >> bitlen); + dev->addr.val = (addr << (32 - bitlen)) | padding_ones; +} + +/** + * Set the address to send. Should be called before commands that requires the address e.g. erase sector, read, write... + * + * @param dev Beginning address of the peripheral registers. + * @param addr Address to send + */ +static inline void gpspi_flash_ll_set_address(spi_dev_t *dev, uint32_t addr) +{ + dev->addr.val = addr; +} + +/** + * Set the length of dummy cycles. + * + * @param dev Beginning address of the peripheral registers. + * @param dummy_n Cycles of dummy phases + */ +static inline void gpspi_flash_ll_set_dummy(spi_dev_t *dev, uint32_t dummy_n) +{ + dev->user.usr_dummy = dummy_n ? 1 : 0; + if (dummy_n > 0) { + HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user1, usr_dummy_cyclelen, dummy_n - 1); + } +} + +/** + * Set D/Q output level during dummy phase + * + * @param dev Beginning address of the peripheral registers. + * @param out_en whether to enable IO output for dummy phase + * @param out_level dummy output level + */ +static inline void gpspi_flash_ll_set_dummy_out(spi_dev_t *dev, uint32_t out_en, uint32_t out_lev) +{ + dev->ctrl.dummy_out = out_en; + dev->ctrl.q_pol = out_lev; + dev->ctrl.d_pol = out_lev; +} + +/** + * Set extra hold time of CS after the clocks. + * + * @param dev Beginning address of the peripheral registers. + * @param hold_n Cycles of clocks before CS is inactive + */ +static inline void gpspi_flash_ll_set_hold(spi_dev_t *dev, uint32_t hold_n) +{ + dev->user.cs_hold = (hold_n > 0 ? 1 : 0); + if (hold_n > 0) { + dev->user1.cs_hold_time = hold_n - 1; + } +} + +/** + * Set the delay of SPI clocks before the first SPI clock after the CS active edge. + * + * @param dev Beginning address of the peripheral registers. + * @param cs_setup_time Delay of SPI clocks after the CS active edge, 0 to disable the setup phase. + */ +static inline void gpspi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_time) +{ + dev->user.cs_setup = (cs_setup_time > 0 ? 1 : 0); + if (cs_setup_time > 0) { + dev->user1.cs_setup_time = cs_setup_time - 1; + } +} + +/** + * Calculate spi_flash clock frequency division parameters for register. + * + * @param clkdiv frequency division factor + * + * @return Register setting for the given clock division factor. + */ +static inline uint32_t gpspi_flash_ll_calculate_clock_reg(uint8_t clkdiv) +{ + uint32_t div_parameter; + // See comments of `clock` in `spi_struct.h` + if (clkdiv == 1) { + div_parameter = (1 << 31); + } else { + div_parameter = ((clkdiv - 1) | (((clkdiv / 2 - 1) & 0xff) << 6) | (((clkdiv - 1) & 0xff) << 12)); + } + return div_parameter; +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/esp32h21/include/hal/spi_flash_ll.h b/components/hal/esp32h21/include/hal/spi_flash_ll.h index ed51652434..24d7d469da 100644 --- a/components/hal/esp32h21/include/hal/spi_flash_ll.h +++ b/components/hal/esp32h21/include/hal/spi_flash_ll.h @@ -1,42 +1,38 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ - -// The Lowlevel layer for SPI Flash - #pragma once #include "spimem_flash_ll.h" - -//TODO: [ESP32H21] IDF-11609, inherit from h2, need to add gpspi functions +#include "gpspi_flash_ll.h" #ifdef __cplusplus extern "C" { #endif #define spi_flash_ll_calculate_clock_reg(host_id, clock_div) (((host_id)<=SPI1_HOST) ? spimem_flash_ll_calculate_clock_reg(clock_div) \ - : 0) + : gpspi_flash_ll_calculate_clock_reg(clock_div)) -#define spi_flash_ll_get_source_clock_freq_mhz(host_id) (((host_id)<=SPI1_HOST) ? spimem_flash_ll_get_source_freq_mhz() : 0) +#define spi_flash_ll_get_source_clock_freq_mhz(host_id) (((host_id)<=SPI1_HOST) ? spimem_flash_ll_get_source_freq_mhz() : GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ) #define spi_flash_ll_get_hw(host_id) (((host_id)<=SPI1_HOST ? (spi_dev_t*) spimem_flash_ll_get_hw(host_id) \ - : 0)) + : gpspi_flash_ll_get_hw(host_id))) #define spi_flash_ll_hw_get_id(dev) ({int dev_id = spimem_flash_ll_hw_get_id(dev); \ if (dev_id < 0) {\ - dev_id = 0;\ + dev_id = gpspi_flash_ll_hw_get_id(dev);\ }\ dev_id; \ }) -// Since ESP32-H2, WB_mode is available, we extend 8 bits to occupy `Continuous Read Mode` bits. +// WB_mode is available, we extend 8 bits to occupy `Continuous Read Mode` bits. #define SPI_FLASH_LL_CONTINUOUS_MODE_BIT_NUMS (8) typedef union { diff --git a/components/hal/esp32h21/include/hal/spimem_flash_ll.h b/components/hal/esp32h21/include/hal/spimem_flash_ll.h index 875f784ff5..272d6c2aab 100644 --- a/components/hal/esp32h21/include/hal/spimem_flash_ll.h +++ b/components/hal/esp32h21/include/hal/spimem_flash_ll.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -521,11 +521,8 @@ static inline void spimem_flash_ll_set_mosi_bitlen(spi_mem_dev_t *dev, uint32_t static inline void spimem_flash_ll_set_command(spi_mem_dev_t *dev, uint32_t command, uint32_t bitlen) { dev->user.usr_command = 1; - typeof(dev->user2) user2 = { - .usr_command_value = command, - .usr_command_bitlen = (bitlen - 1), - }; - dev->user2.val = user2.val; + HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_value, command); + HAL_FORCE_MODIFY_U32_REG_FIELD(dev->user2, usr_command_bitlen, (bitlen - 1)); } /** @@ -560,7 +557,7 @@ static inline void spimem_flash_ll_set_addr_bitlen(spi_mem_dev_t *dev, uint32_t static inline void spimem_flash_ll_set_extra_address(spi_mem_dev_t *dev, uint32_t extra_addr) { dev->cache_fctrl.usr_addr_4byte = 0; - dev->rd_status.wb_mode = extra_addr; + HAL_FORCE_MODIFY_U32_REG_FIELD(dev->rd_status, wb_mode, extra_addr); } /** diff --git a/components/hal/esp32h4/include/hal/gpspi_flash_ll.h b/components/hal/esp32h4/include/hal/gpspi_flash_ll.h index e53a9aaaf4..728491716c 100644 --- a/components/hal/esp32h4/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32h4/include/hal/gpspi_flash_ll.h @@ -6,12 +6,10 @@ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -30,7 +28,6 @@ extern "C" { #endif -//NOTE: These macros are changed on h4 for build. MODIFY these when bringup flash. #define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) #define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) diff --git a/components/hal/esp32p4/include/hal/gpspi_flash_ll.h b/components/hal/esp32p4/include/hal/gpspi_flash_ll.h index 3622702db2..13f9b37ea2 100644 --- a/components/hal/esp32p4/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32p4/include/hal/gpspi_flash_ll.h @@ -1,17 +1,15 @@ /* - * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in soc/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include @@ -28,9 +26,14 @@ extern "C" { #endif -//NOTE: These macros are changed on c3 for build. MODIFY these when bringup flash. -#define gpspi_flash_ll_get_hw(host_id) ( ((host_id)==SPI2_HOST) ? &GPSPI2 : ({abort();(spi_dev_t*)0;}) ) -#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : -1 ) +#define gpspi_flash_ll_get_hw(host_id) (((host_id)==SPI2_HOST ? &GPSPI2 \ + : ((host_id)==SPI3_HOST ? &GPSPI3 \ + : ({abort();(spi_dev_t*)0;})))) + +#define gpspi_flash_ll_hw_get_id(dev) ( ((dev) == (void*)&GPSPI2) ? SPI2_HOST : (\ + ((dev) == (void*)&GPSPI3) ? SPI3_HOST : (\ + -1 \ + )) ) typedef typeof(GPSPI2.clock.val) gpspi_flash_ll_clock_reg_t; #define GPSPI_FLASH_LL_PERIPHERAL_FREQUENCY_MHZ (80) diff --git a/components/hal/esp32s2/include/hal/gpspi_flash_ll.h b/components/hal/esp32s2/include/hal/gpspi_flash_ll.h index b016334ee0..4581e82175 100644 --- a/components/hal/esp32s2/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32s2/include/hal/gpspi_flash_ll.h @@ -6,12 +6,10 @@ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in hal/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include diff --git a/components/hal/esp32s3/include/hal/gpspi_flash_ll.h b/components/hal/esp32s3/include/hal/gpspi_flash_ll.h index d80622f0b0..357a2d2e19 100644 --- a/components/hal/esp32s3/include/hal/gpspi_flash_ll.h +++ b/components/hal/esp32s3/include/hal/gpspi_flash_ll.h @@ -6,12 +6,10 @@ /******************************************************************************* * NOTICE + * The Lowlevel layer for SPI Flash * The ll is not public api, don't use in application code. - * See readme.md in hal/include/hal/readme.md ******************************************************************************/ -// The Lowlevel layer for SPI Flash - #pragma once #include diff --git a/components/hal/spi_flash_hal.c b/components/hal/spi_flash_hal.c index 66e1ffcdec..46a63c773f 100644 --- a/components/hal/spi_flash_hal.c +++ b/components/hal/spi_flash_hal.c @@ -23,29 +23,29 @@ static const char *TAG = "flash_hal"; static uint32_t get_flash_clock_divider(const spi_flash_hal_config_t *cfg) { - const int clk_source = cfg->clock_src_freq; - const int clk_freq_mhz = cfg->freq_mhz; + const int src_freq_mhz = cfg->clock_src_freq; + const int cfg_freq_mhz = cfg->freq_mhz; // On ESP32, ESP32-S2, ESP32-C3, we allow specific frequency 26.666MHz // If user passes freq_mhz like 26 or 27, it's allowed to use integer divider 3. // However on other chips or on other frequency, we only allow user pass frequency which // can be integer divided. If no, the following strategy is round up the division and // round down flash frequency to keep it safe. int best_div = 0; - if (clk_source < clk_freq_mhz) { - HAL_LOGE(TAG, "Target frequency %dMHz higher than supported.", clk_freq_mhz); + if (src_freq_mhz < cfg_freq_mhz) { + HAL_LOGE(TAG, "Target frequency %dMHz higher than src %dMHz.", cfg_freq_mhz, src_freq_mhz); abort(); } #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C3 - if (clk_freq_mhz == 26 || clk_freq_mhz == 27) { + if (cfg_freq_mhz == 26 || cfg_freq_mhz == 27) { best_div = 3; } else #endif { /* Do not use float/double as the FPU may not have been initialized yet on startup. * The values are in MHz, so for sure we won't have an overflow by adding them. */ - best_div = (clk_source + clk_freq_mhz - 1) / clk_freq_mhz; + best_div = (src_freq_mhz + cfg_freq_mhz - 1) / cfg_freq_mhz; /* Perform a division that returns both quotient and remainder */ - const div_t res = div(clk_source, clk_freq_mhz); + const div_t res = div(src_freq_mhz, cfg_freq_mhz); if (res.rem != 0) { HAL_LOGW(TAG, "Flash clock frequency round down to %d", res.quot); } diff --git a/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h b/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h index 77fb6678f6..b1f5390dab 100644 --- a/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h +++ b/components/spi_flash/test_apps/esp_flash/main/test_esp_flash_def.h @@ -88,7 +88,7 @@ #define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP #define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS -#elif CONFIG_IDF_TARGET_ESP32H2 +#elif CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32H21 #define FSPI_PIN_NUM_MOSI 5 #define FSPI_PIN_NUM_MISO 0