Merge branch 'feature/esp32c6_rom_support_more_components' into 'master'

esp_rom: update esp32c6 rom caps

Closes IDF-5632

See merge request espressif/esp-idf!20899

components/esp_rom/CMakeLists.txt

@@ -70,15 +70,6 @@ else()
     target_linker_script(${COMPONENT_LIB} INTERFACE "${target}/${ld_folder}/${target}.rom.ld")
     rom_linker_script("api")
 
-    # esp32c6.rom.api.ld has been split to several lds by components
-    if(target STREQUAL "esp32c6")
-        rom_linker_script("phy")
-        rom_linker_script("coexist")
-        rom_linker_script("net80211")
-        rom_linker_script("pp")
-        # rom_linker_script("spiflash") # TODO: IDF-5632 (Supports more rom components)
-    endif()
-
     if(CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB)
         rom_linker_script("libgcc")
     else()
@@ -117,6 +108,8 @@ if(BOOTLOADER_BUILD)
 
     elseif(target STREQUAL "esp32c6")
         rom_linker_script("newlib")
+        # The linking of the bootloader needs to use the rom_i2c_writeReg_Mask in esp32c6.rom.phy.ld
+        rom_linker_script("phy")
     endif()
 
 else() # Regular app build
@@ -233,6 +226,29 @@ else() # Regular app build
     elseif(target STREQUAL "esp32c6")
         rom_linker_script("newlib")
         rom_linker_script("version")
+
+        # esp32c6.rom.api.ld has been split to several lds by components.
+        rom_linker_script("phy")
+        rom_linker_script("coexist")
+        rom_linker_script("net80211")
+        rom_linker_script("pp")
+
+        if(CONFIG_SPI_FLASH_ROM_IMPL)
+            rom_linker_script("spiflash")
+        endif()
+
+        if(time_t_size EQUAL 8)
+            # The ROM functions listed in this linker script depend on sizeof(time_t).
+            # ESP32-C6 ROM was compiled for 64-bit time_t, only link these functions
+            # if the toolchain is also using 64-bit time_t.
+            rom_linker_script("newlib-time")
+
+            if(NOT CONFIG_NEWLIB_NANO_FORMAT)
+                # Normal(Non-nano) formatting functions in ROM are also built for 64-bit time_t.
+                rom_linker_script("newlib-normal")
+            endif()
+       endif()
+
     endif()
 
     if(CONFIG_HEAP_TLSF_USE_ROM_IMPL)

components/esp_rom/esp32c6/Kconfig.soc_caps.in

@@ -31,6 +31,18 @@ config ESP_ROM_GET_CLK_FREQ
     bool
     default y
 
+config ESP_ROM_HAS_RVFPLIB
+    bool
+    default y
+
+config ESP_ROM_HAS_HAL_WDT
+    bool
+    default y
+
+config ESP_ROM_HAS_HAL_SYSTIMER
+    bool
+    default y
+
 config ESP_ROM_HAS_HEAP_TLSF
     bool
     default y
@@ -39,10 +51,6 @@ config ESP_ROM_HAS_LAYOUT_TABLE
     bool
     default y
 
-config ESP_ROM_HAS_RVFPLIB
-    bool
-    default y
-
 config ESP_ROM_HAS_SPI_FLASH
     bool
     default y

components/esp_rom/esp32c6/esp_rom_caps.h

@@ -13,7 +13,9 @@
 #define ESP_ROM_USB_SERIAL_DEVICE_NUM       (3) // UART uses USB_SERIAL_JTAG port in ROM.
 #define ESP_ROM_HAS_RETARGETABLE_LOCKING    (1) // ROM was built with retargetable locking
 #define ESP_ROM_GET_CLK_FREQ                (1) // Get clk frequency with rom function `ets_get_cpu_frequency`
+#define ESP_ROM_HAS_RVFPLIB                 (1) // ROM has the rvfplib
+#define ESP_ROM_HAS_HAL_WDT                 (1) // ROM has the implementation of Watchdog HAL driver
+#define ESP_ROM_HAS_HAL_SYSTIMER            (1) // ROM has the implementation of Systimer HAL driver
 #define ESP_ROM_HAS_HEAP_TLSF               (1) // ROM has the implementation of the tlsf and multi-heap library
 #define ESP_ROM_HAS_LAYOUT_TABLE            (1) // ROM has the layout table
-#define ESP_ROM_HAS_RVFPLIB                 (1) // ROM has the rvfplib
 #define ESP_ROM_HAS_SPI_FLASH               (1) // ROM has the implementation of SPI Flash driver

components/esp_rom/esp32c6/ld/esp32c6.rom.ld

@@ -166,6 +166,8 @@ rom_spiflash_legacy_funcs = 0x4087fff0;
 rom_spiflash_legacy_data = 0x4087ffec;
 g_flash_guard_ops = 0x4087fff4;
 
+/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
+esp_rom_spiflash_write_disable = 0x40000278;
 
 /***************************************
  Group hal_wdt

components/esp_rom/esp32c6/ld/esp32c6.rom.newlib-nano.ld

@@ -1,32 +0,0 @@
-/*
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
- *
- * SPDX-License-Identifier: Apache-2.0
- */
-/* ROM function interface esp32c6.rom.newlib-nano.ld for esp32c6
- *
- *
- * Generated from ./target/esp32c6/interface-esp32c6.yml md5sum ff3b116f1987b5a5433645b8f7947f32
- *
- * Compatible with ROM where ECO version equal or greater to 0.
- *
- * THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
- */
-
-/***************************************
- Group newlib_nano_format
- ***************************************/
-
-/* Functions */
-__sprint_r = 0x400005c8;
-_fiprintf_r = 0x400005cc;
-_fprintf_r = 0x400005d0;
-_printf_common = 0x400005d4;
-_printf_i = 0x400005d8;
-_vfiprintf_r = 0x400005dc;
-_vfprintf_r = 0x400005e0;
-fiprintf = 0x400005e4;
-fprintf = 0x400005e8;
-printf = 0x400005ec;
-vfiprintf = 0x400005f0;
-vfprintf = 0x400005f4;

components/esp_rom/esp32c6/ld/esp32c6.rom.spiflash.ld

@@ -66,7 +66,7 @@ esp_flash_set_io_mode = 0x40000268;
 spi_flash_boot_attach = 0x4000026c;
 esp_flash_read_chip_id = 0x40000270;
 detect_spi_flash_chip = 0x40000274;
-esp_rom_spiflash_write_disable = 0x40000278;
+/* esp_rom_spiflash_write_disable = 0x40000278; */
 esp_flash_suspend_cmd_init = 0x4000027c;
 /* Data (.data, .bss, .rodata) */
 esp_flash_default_chip = 0x4087ffe8;