From 8aaa256aa9290582304ec7d569245eb9fb6013a7 Mon Sep 17 00:00:00 2001 From: Lou Tianhao Date: Mon, 29 May 2023 10:59:24 +0800 Subject: [PATCH] Power Management: support RC32K or Crystal32K powered down --- components/esp_system/port/soc/esp32h2/clk.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/components/esp_system/port/soc/esp32h2/clk.c b/components/esp_system/port/soc/esp32h2/clk.c index 4486b893b1..7b3e363685 100644 --- a/components/esp_system/port/soc/esp32h2/clk.c +++ b/components/esp_system/port/soc/esp32h2/clk.c @@ -26,6 +26,7 @@ #include "esp_private/esp_pmu.h" #include "esp_rom_uart.h" #include "esp_rom_sys.h" +#include "esp_sleep.h" /* Number of cycles to wait from the 32k XTAL oscillator to consider it running. * Larger values increase startup delay. Smaller values may cause false positive @@ -179,6 +180,13 @@ void rtc_clk_select_rtc_slow_clk(void) */ __attribute__((weak)) void esp_perip_clk_init(void) { + soc_rtc_slow_clk_src_t rtc_slow_clk_src = rtc_clk_slow_src_get(); + esp_sleep_pd_domain_t pu_domain = (esp_sleep_pd_domain_t) (\ + (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_XTAL32K) ? ESP_PD_DOMAIN_XTAL32K \ + : (rtc_slow_clk_src == SOC_RTC_SLOW_CLK_SRC_RC32K) ? ESP_PD_DOMAIN_RC32K \ + : ESP_PD_DOMAIN_MAX); + esp_sleep_pd_config(pu_domain, ESP_PD_OPTION_ON); + ESP_EARLY_LOGW(TAG, "esp_perip_clk_init() has not been implemented yet"); // ESP32H2-TODO: IDF-5658 #if 0