Merge branch 'fix/drop_pm_code_if_not_need' into 'master'

fix(drivers): only call esp_pm APIs when CONFIG_PM_ENABLE is enabled

Closes IDFGH-15263

See merge request espressif/esp-idf!39045

components/driver/twai/twai.c

@@ -100,8 +100,10 @@ typedef struct twai_obj_t {
     SemaphoreHandle_t alert_semphr;
     uint32_t alerts_enabled;
     uint32_t alerts_triggered;
+#ifdef CONFIG_PM_ENABLE
     //Power Management Lock
     esp_pm_lock_handle_t pm_lock;
+#endif
     portMUX_TYPE spinlock;
 } twai_obj_t;
 

components/esp_adc/adc_continuous.c

@@ -264,9 +264,11 @@ esp_err_t adc_continuous_start(adc_continuous_handle_t handle)
         adc_ll_reset_register();
     }
 
+#if CONFIG_PM_ENABLE
     if (handle->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(handle->pm_lock), ADC_TAG, "acquire pm_lock failed");
     }
+#endif
 
     handle->fsm = ADC_FSM_STARTED;
     sar_periph_ctrl_adc_continuous_power_acquire();
@@ -369,10 +371,12 @@ esp_err_t adc_continuous_stop(adc_continuous_handle_t handle)
     }
     sar_periph_ctrl_adc_continuous_power_release();
 
+#if CONFIG_PM_ENABLE
     //release power manager lock
     if (handle->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(handle->pm_lock), ADC_TAG, "release pm_lock failed");
     }
+#endif
 
     ANALOG_CLOCK_DISABLE();
 
@@ -422,9 +426,11 @@ esp_err_t adc_continuous_deinit(adc_continuous_handle_t handle)
         free(handle->ringbuf_struct);
     }
 
+#if CONFIG_PM_ENABLE
     if (handle->pm_lock) {
         esp_pm_lock_delete(handle->pm_lock);
     }
+#endif
 
     free(handle->rx_dma_buf);
     free(handle->hal.rx_desc);

components/esp_adc/adc_continuous_internal.h

@@ -89,7 +89,9 @@ struct adc_continuous_ctx_t {
     adc_hal_digi_ctrlr_cfg_t        hal_digi_ctrlr_cfg;         //Hal digital controller configuration
     adc_continuous_evt_cbs_t        cbs;                        //Callbacks
     void                            *user_data;                 //User context
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t            pm_lock;                    //For power management
+#endif
     struct {
         uint32_t flush_pool: 1;     //Flush the internal pool when the pool is full. With this flag, the `on_pool_ovf` event will not happen.
     } flags;

components/esp_driver_ana_cmpr/ana_cmpr.c

@@ -27,7 +27,9 @@ struct ana_cmpr_t {
     uint32_t                    intr_mask;          /*!< Interrupt mask */
     int                         intr_priority;      /*!< Interrupt priority */
     uint32_t                    src_clk_freq_hz;    /*!< Source clock frequency of the Analog Comparator unit */
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t        pm_lock;            /*!< The Power Management lock that used to avoid unexpected power down of the clock domain */
+#endif
 };
 
 /* Helper macros */
@@ -80,9 +82,11 @@ static esp_err_t s_ana_cmpr_init_gpio(ana_cmpr_handle_t cmpr, bool is_external_r
 
 static void ana_cmpr_destroy_unit(ana_cmpr_handle_t cmpr)
 {
+#if CONFIG_PM_ENABLE
     if (cmpr->pm_lock) {
         esp_pm_lock_delete(cmpr->pm_lock);
     }
+#endif
     if (cmpr->intr_handle) {
         esp_intr_free(cmpr->intr_handle);
     }
@@ -274,9 +278,11 @@ esp_err_t ana_cmpr_enable(ana_cmpr_handle_t cmpr)
     ANA_CMPR_NULL_POINTER_CHECK(cmpr);
     ana_cmpr_fsm_t expected_fsm = ANA_CMPR_FSM_INIT;
     if (atomic_compare_exchange_strong(&cmpr->fsm, &expected_fsm, ANA_CMPR_FSM_WAIT)) {
+#if CONFIG_PM_ENABLE
         if (cmpr->pm_lock) {
             esp_pm_lock_acquire(cmpr->pm_lock);
         }
+#endif
 
         // the underlying register may be accessed by different threads at the same time, so use spin lock to protect it
         portENTER_CRITICAL(&s_spinlock);
@@ -305,9 +311,11 @@ esp_err_t ana_cmpr_disable(ana_cmpr_handle_t cmpr)
         analog_cmpr_ll_enable(cmpr->dev, false);
         portEXIT_CRITICAL(&s_spinlock);
 
+#if CONFIG_PM_ENABLE
         if (cmpr->pm_lock) {
             esp_pm_lock_release(cmpr->pm_lock);
         }
+#endif
 
         // switch the state machine to init state
         atomic_store(&cmpr->fsm, ANA_CMPR_FSM_INIT);

components/esp_driver_gpio/src/gpio_flex_glitch_filter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -28,8 +28,8 @@ struct gpio_flex_glitch_filter_t {
     gpio_glitch_filter_t base;
     gpio_flex_glitch_filter_group_t *group;
     uint32_t filter_id;
-    esp_pm_lock_handle_t pm_lock;
 #if CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;
     char pm_lock_name[GLITCH_FILTER_PM_LOCK_NAME_LEN_MAX]; // pm lock name
 #endif
 };
@@ -72,9 +72,11 @@ static esp_err_t gpio_filter_destroy(gpio_flex_glitch_filter_t *filter)
         portEXIT_CRITICAL(&group->spinlock);
     }
 
+#if CONFIG_PM_ENABLE
     if (filter->pm_lock) {
         esp_pm_lock_delete(filter->pm_lock);
     }
+#endif
 
     free(filter);
     return ESP_OK;
@@ -92,10 +94,12 @@ static esp_err_t gpio_flex_glitch_filter_enable(gpio_glitch_filter_t *filter)
     ESP_RETURN_ON_FALSE(filter->fsm == GLITCH_FILTER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "filter not in init state");
     gpio_flex_glitch_filter_t *flex_filter = __containerof(filter, gpio_flex_glitch_filter_t, base);
 
+#if CONFIG_PM_ENABLE
     // acquire pm lock
     if (flex_filter->pm_lock) {
         esp_pm_lock_acquire(flex_filter->pm_lock);
     }
+#endif
 
     int filter_id = flex_filter->filter_id;
     gpio_ll_glitch_filter_enable(s_gpio_glitch_filter_group.hw, filter_id, true);
@@ -111,10 +115,12 @@ static esp_err_t gpio_flex_glitch_filter_disable(gpio_glitch_filter_t *filter)
     int filter_id = flex_filter->filter_id;
     gpio_ll_glitch_filter_enable(s_gpio_glitch_filter_group.hw, filter_id, false);
 
+#if CONFIG_PM_ENABLE
     // release pm lock
     if (flex_filter->pm_lock) {
         esp_pm_lock_release(flex_filter->pm_lock);
     }
+#endif
 
     filter->fsm = GLITCH_FILTER_FSM_INIT;
     return ESP_OK;

components/esp_driver_gpio/src/gpio_pin_glitch_filter.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -20,17 +20,19 @@ static const char *TAG = "gpio-filter";
  */
 typedef struct gpio_pin_glitch_filter_t {
     gpio_glitch_filter_t base;
-    esp_pm_lock_handle_t pm_lock;
 #if CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;
     char pm_lock_name[GLITCH_FILTER_PM_LOCK_NAME_LEN_MAX]; // pm lock name
 #endif
 } gpio_pin_glitch_filter_t;
 
 static esp_err_t gpio_filter_destroy(gpio_pin_glitch_filter_t *filter)
 {
+#if CONFIG_PM_ENABLE
     if (filter->pm_lock) {
         esp_pm_lock_delete(filter->pm_lock);
     }
+#endif
 
     free(filter);
     return ESP_OK;
@@ -46,12 +48,14 @@ static esp_err_t gpio_pin_glitch_filter_del(gpio_glitch_filter_t *filter)
 static esp_err_t gpio_pin_glitch_filter_enable(gpio_glitch_filter_t *filter)
 {
     ESP_RETURN_ON_FALSE(filter->fsm == GLITCH_FILTER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "filter not in init state");
-    gpio_pin_glitch_filter_t *pin_filter = __containerof(filter, gpio_pin_glitch_filter_t, base);
+    [[maybe_unused]] gpio_pin_glitch_filter_t *pin_filter = __containerof(filter, gpio_pin_glitch_filter_t, base);
 
+#if CONFIG_PM_ENABLE
     // acquire pm lock
     if (pin_filter->pm_lock) {
         esp_pm_lock_acquire(pin_filter->pm_lock);
     }
+#endif
 
     gpio_ll_pin_filter_enable(NULL, filter->gpio_num);
     filter->fsm = GLITCH_FILTER_FSM_ENABLE;
@@ -61,14 +65,16 @@ static esp_err_t gpio_pin_glitch_filter_enable(gpio_glitch_filter_t *filter)
 static esp_err_t gpio_pin_glitch_filter_disable(gpio_glitch_filter_t *filter)
 {
     ESP_RETURN_ON_FALSE(filter->fsm == GLITCH_FILTER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "filter not in enable state");
-    gpio_pin_glitch_filter_t *pin_filter = __containerof(filter, gpio_pin_glitch_filter_t, base);
+    [[maybe_unused]] gpio_pin_glitch_filter_t *pin_filter = __containerof(filter, gpio_pin_glitch_filter_t, base);
 
     gpio_ll_pin_filter_disable(NULL, filter->gpio_num);
 
+#if CONFIG_PM_ENABLE
     // release pm lock
     if (pin_filter->pm_lock) {
         esp_pm_lock_release(pin_filter->pm_lock);
     }
+#endif
 
     filter->fsm = GLITCH_FILTER_FSM_INIT;
     return ESP_OK;

components/esp_driver_gptimer/src/gptimer.c

@@ -108,9 +108,11 @@ static void gptimer_unregister_from_group(gptimer_t *timer)
 
 static esp_err_t gptimer_destroy(gptimer_t *timer)
 {
+#if CONFIG_PM_ENABLE
     if (timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(timer->pm_lock), TAG, "delete pm_lock failed");
     }
+#endif
     if (timer->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_free(timer->intr), TAG, "delete interrupt service failed");
     }
@@ -347,10 +349,12 @@ esp_err_t gptimer_enable(gptimer_handle_t timer)
     ESP_RETURN_ON_FALSE(atomic_compare_exchange_strong(&timer->fsm, &expected_fsm, GPTIMER_FSM_ENABLE),
                         ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(timer->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
 
     // enable interrupt service
     if (timer->intr) {
@@ -373,10 +377,12 @@ esp_err_t gptimer_disable(gptimer_handle_t timer)
         ESP_RETURN_ON_ERROR(esp_intr_disable(timer->intr), TAG, "disable interrupt service failed");
     }
 
+#if CONFIG_PM_ENABLE
     // release power manager lock
     if (timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(timer->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
 
     return ESP_OK;
 }

components/esp_driver_gptimer/src/gptimer_common.c

@@ -134,8 +134,7 @@ esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t s
 #endif // CONFIG_IDF_TARGET_ESP32C2
 
     if (need_pm_lock) {
-        sprintf(timer->pm_lock_name, "gptimer_%d_%d", group_id, timer_id); // e.g. gptimer_0_0
+        ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer_group_periph_signals.groups[group_id].module_name[timer_id], &timer->pm_lock),
-        ESP_RETURN_ON_ERROR(esp_pm_lock_create(pm_lock_type, 0, timer->pm_lock_name, &timer->pm_lock),
                             TAG, "create pm lock failed");
     }
 #endif // CONFIG_PM_ENABLE
@@ -165,12 +164,14 @@ esp_err_t gptimer_get_intr_handle(gptimer_handle_t timer, intr_handle_t *ret_int
     return ESP_OK;
 }
 
+#if CONFIG_PM_ENABLE
 esp_err_t gptimer_get_pm_lock(gptimer_handle_t timer, esp_pm_lock_handle_t *ret_pm_lock)
 {
     ESP_RETURN_ON_FALSE(timer && ret_pm_lock, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     *ret_pm_lock = timer->pm_lock;
     return ESP_OK;
 }
+#endif // CONFIG_PM_ENABLE
 
 int gptimer_get_group_id(gptimer_handle_t timer, int *group_id)
 {

components/esp_driver_gptimer/src/gptimer_priv.h

@@ -51,8 +51,6 @@ extern "C" {
 
 #define GPTIMER_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED
 
-#define GPTIMER_PM_LOCK_NAME_LEN_MAX 16
-
 #define GPTIMER_USE_RETENTION_LINK  (SOC_TIMER_SUPPORT_SLEEP_RETENTION && CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP)
 
 #if SOC_PERIPH_CLK_CTRL_SHARED
@@ -95,9 +93,8 @@ struct gptimer_t {
     gptimer_alarm_cb_t on_alarm;
     void *user_ctx;
     gptimer_clock_source_t clk_src;
-    esp_pm_lock_handle_t pm_lock; // power management lock
 #if CONFIG_PM_ENABLE
-    char pm_lock_name[GPTIMER_PM_LOCK_NAME_LEN_MAX]; // pm lock name
+    esp_pm_lock_handle_t pm_lock; // power management lock
 #endif
     struct {
         uint32_t intr_shared: 1;

components/esp_driver_i2c/i2c_common.c

@@ -211,9 +211,11 @@ esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus)
             if (i2c_bus->intr_handle) {
                 ESP_RETURN_ON_ERROR(esp_intr_free(i2c_bus->intr_handle), TAG, "delete interrupt service failed");
             }
+#if CONFIG_PM_ENABLE
             if (i2c_bus->pm_lock) {
                 ESP_RETURN_ON_ERROR(esp_pm_lock_delete(i2c_bus->pm_lock), TAG, "delete pm_lock failed");
             }
+#endif
             // Disable I2C module
             if (!i2c_bus->is_lp_i2c) {
                 I2C_RCC_ATOMIC() {
@@ -306,8 +308,7 @@ esp_err_t i2c_select_periph_clock(i2c_bus_handle_t handle, soc_module_clk_t clk_
     }
 
     if (need_pm_lock) {
-        sprintf(handle->pm_lock_name, "I2C_%d", handle->port_num); // e.g. PORT_0
+        ret  = esp_pm_lock_create(pm_lock_type, 0, i2c_periph_signal[handle->port_num].module_name, &handle->pm_lock);
-        ret  = esp_pm_lock_create(pm_lock_type, 0, handle->pm_lock_name, &handle->pm_lock);
         ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed");
     }
 #endif // CONFIG_PM_ENABLE

components/esp_driver_i2c/i2c_master.c

@@ -617,9 +617,11 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
         ESP_RETURN_ON_ERROR(s_i2c_hw_fsm_reset(i2c_master, true), TAG, "reset hardware failed");
     }
 
+#if CONFIG_PM_ENABLE
     if (i2c_master->base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(i2c_master->base->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
 
     portENTER_CRITICAL(&i2c_master->base->spinlock);
     atomic_init(&i2c_master->trans_idx, 0);
@@ -655,9 +657,11 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf
         i2c_ll_disable_intr_mask(hal->dev, I2C_LL_MASTER_EVENT_INTR);
     }
 
+#if CONFIG_PM_ENABLE
     if (i2c_master->base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(i2c_master->base->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
 
     return ret;
 }

components/esp_driver_i2c/i2c_private.h

@@ -66,7 +66,6 @@ extern "C" {
 
 #define I2C_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED
 
-#define I2C_PM_LOCK_NAME_LEN_MAX 16
 #define I2C_STATIC_OPERATION_ARRAY_MAX SOC_I2C_CMD_REG_NUM
 
 #define I2C_TRANS_READ_COMMAND(ack_value)    {.ack_val = (ack_value), .op_code = I2C_LL_CMD_READ}
@@ -116,9 +115,8 @@ struct i2c_bus_t {
     int scl_num; // SCL pin number
     bool pull_up_enable; // Enable pull-ups
     intr_handle_t intr_handle; // I2C interrupt handle
-    esp_pm_lock_handle_t pm_lock; // power manage lock
 #if CONFIG_PM_ENABLE
-    char pm_lock_name[I2C_PM_LOCK_NAME_LEN_MAX]; // pm lock name
+    esp_pm_lock_handle_t pm_lock; // power manage lock
 #endif
     i2c_bus_mode_t bus_mode; // I2C bus mode
 #if SOC_I2C_SUPPORT_SLEEP_RETENTION

components/esp_driver_jpeg/jpeg_common.c

@@ -95,9 +95,11 @@ esp_err_t jpeg_release_codec_handle(jpeg_codec_handle_t jpeg_codec)
                 vSemaphoreDeleteWithCaps(jpeg_codec->codec_mutex);
                 jpeg_codec->codec_mutex = NULL;
             }
+#if CONFIG_PM_ENABLE
             if (jpeg_codec->pm_lock) {
                 esp_pm_lock_delete(jpeg_codec->pm_lock);
             }
+#endif
             PERIPH_RCC_ATOMIC() {
                 jpeg_ll_enable_bus_clock(false);
             }

components/esp_driver_jpeg/jpeg_decode.c

@@ -212,9 +212,11 @@ esp_err_t jpeg_decoder_process(jpeg_decoder_handle_t decoder_engine, const jpeg_
 
     esp_err_t ret = ESP_OK;
 
+#if CONFIG_PM_ENABLE
     if (decoder_engine->codec_base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(decoder_engine->codec_base->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
 
     xSemaphoreTake(decoder_engine->codec_base->codec_mutex, portMAX_DELAY);
     /* Reset queue */
@@ -269,18 +271,22 @@ esp_err_t jpeg_decoder_process(jpeg_decoder_handle_t decoder_engine, const jpeg_
     }
 
     xSemaphoreGive(decoder_engine->codec_base->codec_mutex);
+#if CONFIG_PM_ENABLE
     if (decoder_engine->codec_base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(decoder_engine->codec_base->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
     return ESP_OK;
 
 err1:
     dma2d_force_end(decoder_engine->trans_desc, &need_yield);
 err2:
     xSemaphoreGive(decoder_engine->codec_base->codec_mutex);
+#if CONFIG_PM_ENABLE
     if (decoder_engine->codec_base->pm_lock) {
         esp_pm_lock_release(decoder_engine->codec_base->pm_lock);
     }
+#endif
     return ret;
 }
 

components/esp_driver_jpeg/jpeg_encode.c

@@ -148,9 +148,11 @@ esp_err_t jpeg_encoder_process(jpeg_encoder_handle_t encoder_engine, const jpeg_
 
     esp_err_t ret = ESP_OK;
 
+#if CONFIG_PM_ENABLE
     if (encoder_engine->codec_base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(encoder_engine->codec_base->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
     jpeg_hal_context_t *hal = &encoder_engine->codec_base->hal;
     uint8_t *raw_buffer = (uint8_t*)encode_inbuf;
     uint32_t compressed_size;
@@ -280,18 +282,22 @@ esp_err_t jpeg_encoder_process(jpeg_encoder_handle_t encoder_engine, const jpeg_
     *out_size = compressed_size;
 
     xSemaphoreGive(encoder_engine->codec_base->codec_mutex);
+#if CONFIG_PM_ENABLE
     if (encoder_engine->codec_base->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(encoder_engine->codec_base->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
     return ESP_OK;
 
 err1:
     dma2d_force_end(encoder_engine->trans_desc, &need_yield);
 err2:
     xSemaphoreGive(encoder_engine->codec_base->codec_mutex);
+#if CONFIG_PM_ENABLE
     if (encoder_engine->codec_base->pm_lock) {
         esp_pm_lock_release(encoder_engine->codec_base->pm_lock);
     }
+#endif
     return ret;
 }
 

components/esp_driver_jpeg/jpeg_private.h

@@ -52,7 +52,9 @@ struct jpeg_codec_t {
     intr_handle_t intr_handle;        // jpeg codec interrupt handler
     int intr_priority;                // jpeg codec interrupt priority
     SLIST_HEAD(jpeg_isr_handler_list_, jpeg_isr_handler_) jpeg_isr_handler_list; // List for jpeg interrupt.
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // power manage lock
+#endif
 };
 
 typedef enum {

components/esp_driver_mcpwm/src/mcpwm_cap.c

@@ -52,7 +52,7 @@ static void mcpwm_cap_timer_unregister_from_group(mcpwm_cap_timer_t *cap_timer)
 
 static esp_err_t mcpwm_cap_timer_destroy(mcpwm_cap_timer_t *cap_timer)
 {
-#if !SOC_MCPWM_CAPTURE_CLK_FROM_GROUP
+#if !SOC_MCPWM_CAPTURE_CLK_FROM_GROUP && CONFIG_PM_ENABLE
     if (cap_timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(cap_timer->pm_lock), TAG, "delete pm_lock failed");
     }
@@ -87,7 +87,9 @@ esp_err_t mcpwm_new_capture_timer(const mcpwm_capture_timer_config_t *config, mc
 #if SOC_MCPWM_CAPTURE_CLK_FROM_GROUP
     // capture timer clock source is same as the MCPWM group
     ESP_GOTO_ON_ERROR(mcpwm_select_periph_clock(group, (soc_module_clk_t)clk_src), err, TAG, "set group clock failed");
+#if CONFIG_PM_ENABLE
     cap_timer->pm_lock = group->pm_lock;
+#endif
     uint32_t periph_src_clk_hz = 0;
     ESP_GOTO_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)clk_src, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &periph_src_clk_hz), err, TAG, "get clock source freq failed");
     ESP_LOGD(TAG, "periph_src_clk_hz %"PRIu32"", periph_src_clk_hz);
@@ -157,9 +159,11 @@ esp_err_t mcpwm_capture_timer_enable(mcpwm_cap_timer_handle_t cap_timer)
 {
     ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
+#if CONFIG_PM_ENABLE
     if (cap_timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(cap_timer->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
     cap_timer->fsm = MCPWM_CAP_TIMER_FSM_ENABLE;
     return ESP_OK;
 }
@@ -168,9 +172,11 @@ esp_err_t mcpwm_capture_timer_disable(mcpwm_cap_timer_handle_t cap_timer)
 {
     ESP_RETURN_ON_FALSE(cap_timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(cap_timer->fsm == MCPWM_CAP_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
+#if CONFIG_PM_ENABLE
     if (cap_timer->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(cap_timer->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
     cap_timer->fsm = MCPWM_CAP_TIMER_FSM_INIT;
     return ESP_OK;
 }

components/esp_driver_mcpwm/src/mcpwm_com.c

@@ -120,9 +120,11 @@ void mcpwm_release_group_handle(mcpwm_group_t *group)
         MCPWM_RCC_ATOMIC() {
             mcpwm_ll_enable_bus_clock(group_id, false);
         }
+#if CONFIG_PM_ENABLE
         if (group->pm_lock) {
             esp_pm_lock_delete(group->pm_lock);
         }
+#endif
 #if MCPWM_USE_RETENTION_LINK
         const periph_retention_module_t module_id = mcpwm_reg_retention_info[group_id].retention_module;
         if (sleep_retention_is_module_created(module_id)) {

components/esp_driver_mcpwm/src/mcpwm_private.h

@@ -83,7 +83,9 @@ struct mcpwm_group_t {
     portMUX_TYPE spinlock;   // group level spinlock
     uint32_t prescale;       // group prescale
     uint32_t resolution_hz;  // MCPWM group clock resolution: clock_src_hz / clock_prescale = resolution_hz
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // power management lock
+#endif
     soc_module_clk_t clk_src; // peripheral source clock
     mcpwm_cap_timer_t *cap_timer; // mcpwm capture timers
     mcpwm_timer_t *timers[SOC_MCPWM_TIMERS_PER_GROUP]; // mcpwm timer array
@@ -254,7 +256,9 @@ struct mcpwm_cap_timer_t {
     portMUX_TYPE spinlock;  // spin lock, to prevent concurrently accessing capture timer level resources, including registers
     uint32_t resolution_hz; // resolution of capture timer
     mcpwm_cap_timer_fsm_t fsm;    // driver FSM
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // power management lock
+#endif
     mcpwm_cap_channel_t *cap_channels[SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER]; // capture channel array
 };
 

components/esp_driver_mcpwm/src/mcpwm_timer.c

@@ -247,13 +247,15 @@ esp_err_t mcpwm_timer_enable(mcpwm_timer_handle_t timer)
 {
     ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
-    mcpwm_group_t *group = timer->group;
+    [[maybe_unused]] mcpwm_group_t *group = timer->group;
     if (timer->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_enable(timer->intr), TAG, "enable interrupt failed");
     }
+#if CONFIG_PM_ENABLE
     if (group->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(group->pm_lock), TAG, "acquire pm lock failed");
     }
+#endif
     timer->fsm = MCPWM_TIMER_FSM_ENABLE;
     return ESP_OK;
 }
@@ -262,13 +264,15 @@ esp_err_t mcpwm_timer_disable(mcpwm_timer_handle_t timer)
 {
     ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(timer->fsm == MCPWM_TIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
-    mcpwm_group_t *group = timer->group;
+    [[maybe_unused]] mcpwm_group_t *group = timer->group;
     if (timer->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_disable(timer->intr), TAG, "disable interrupt failed");
     }
+#if CONFIG_PM_ENABLE
     if (group->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(group->pm_lock), TAG, "acquire pm lock failed");
     }
+#endif
     timer->fsm = MCPWM_TIMER_FSM_INIT;
     return ESP_OK;
 }

components/esp_driver_parlio/src/parlio_priv.h

@@ -101,8 +101,6 @@
 #define PARLIO_RCC_ATOMIC()
 #endif  // SOC_RCC_IS_INDEPENDENT
 
-#define PARLIO_PM_LOCK_NAME_LEN_MAX 16
-
 ///!< Logging settings
 #define TAG "parlio"
 
@@ -169,13 +167,12 @@ typedef struct parlio_tx_unit_t {
     struct parlio_unit_t base; // base unit
     size_t data_width;     // data width
     intr_handle_t intr;    // allocated interrupt handle
-    esp_pm_lock_handle_t pm_lock;   // power management lock
     gdma_channel_handle_t dma_chan; // DMA channel
     gdma_link_list_handle_t dma_link[PARLIO_DMA_LINK_NUM]; // DMA link list handle
     size_t int_mem_align; // Alignment for internal memory
     size_t ext_mem_align; // Alignment for external memory
 #if CONFIG_PM_ENABLE
-    char pm_lock_name[PARLIO_PM_LOCK_NAME_LEN_MAX]; // pm lock name
+    esp_pm_lock_handle_t pm_lock;   // power management lock
 #endif
     portMUX_TYPE spinlock;     // prevent resource accessing by user and interrupt concurrently
     uint32_t out_clk_freq_hz;  // output clock frequency

components/esp_driver_parlio/src/parlio_rx.c

@@ -55,10 +55,9 @@ typedef struct parlio_rx_unit_t {
     SemaphoreHandle_t               mutex;                  /*!< Mutex lock for concurrence safety,
                                                              *   which should be acquired and released in a same function */
 
+#if CONFIG_PM_ENABLE
     /* Power Management */
     esp_pm_lock_handle_t            pm_lock;                /*!< power management lock */
-#if CONFIG_PM_ENABLE
-    char                            pm_lock_name[PARLIO_PM_LOCK_NAME_LEN_MAX]; /*!< pm lock name */
 #endif
 
     /* Transaction Resources */
@@ -526,12 +525,11 @@ static esp_err_t parlio_select_periph_clock(parlio_rx_unit_handle_t rx_unit, con
     if (clk_src != PARLIO_CLK_SRC_EXTERNAL) {
         // XTAL and PLL clock source will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient
         esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP;
-        sprintf(rx_unit->pm_lock_name, "parlio_rx_%d_%d", rx_unit->base.group->group_id, rx_unit->base.unit_id); // e.g. parlio_rx_0_0
 #if CONFIG_IDF_TARGET_ESP32P4
         // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS
         lock_type = ESP_PM_CPU_FREQ_MAX;
 #endif
-        esp_err_t ret  = esp_pm_lock_create(lock_type, 0, rx_unit->pm_lock_name, &rx_unit->pm_lock);
+        esp_err_t ret  = esp_pm_lock_create(lock_type, 0, parlio_periph_signals.groups[rx_unit->base.group->group_id].module_name, &rx_unit->pm_lock);
         ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed");
     }
 #endif
@@ -567,10 +565,12 @@ static esp_err_t parlio_destroy_rx_unit(parlio_rx_unit_handle_t rx_unit)
     if (rx_unit->trans_sem) {
         vSemaphoreDeleteWithCaps(rx_unit->trans_sem);
     }
+#if CONFIG_PM_ENABLE
     /* Free the power management lock */
     if (rx_unit->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(rx_unit->pm_lock), TAG, "delete pm lock failed");
     }
+#endif
     /* Delete the GDMA channel */
     if (rx_unit->dma_chan) {
         ESP_RETURN_ON_ERROR(gdma_disconnect(rx_unit->dma_chan), TAG, "disconnect dma channel failed");
@@ -713,10 +713,12 @@ esp_err_t parlio_rx_unit_enable(parlio_rx_unit_handle_t rx_unit, bool reset_queu
     ESP_GOTO_ON_FALSE(!rx_unit->is_enabled, ESP_ERR_INVALID_STATE, err, TAG, "the unit has enabled or running");
     rx_unit->is_enabled = true;
 
+#if CONFIG_PM_ENABLE
     /* Acquire the power management lock in case */
     if (rx_unit->pm_lock) {
         esp_pm_lock_acquire(rx_unit->pm_lock);
     }
+#endif
 
     /* For non-free running clock, the unit can't stop once enabled, otherwise the data alignment will go wrong */
     if (!rx_unit->cfg.flags.free_clk) {
@@ -785,10 +787,12 @@ esp_err_t parlio_rx_unit_disable(parlio_rx_unit_handle_t rx_unit)
         free(rx_unit->dma_buf);
         rx_unit->dma_buf = NULL;
     }
+#if CONFIG_PM_ENABLE
     /* release power management lock */
     if (rx_unit->pm_lock) {
         esp_pm_lock_release(rx_unit->pm_lock);
     }
+#endif
     /* Erase the current transaction */
     memset(&rx_unit->curr_trans, 0, sizeof(parlio_rx_transaction_t));
 err:

components/esp_driver_parlio/src/parlio_tx.c

@@ -51,9 +51,11 @@ static esp_err_t parlio_destroy_tx_unit(parlio_tx_unit_t *tx_unit)
     if (tx_unit->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_free(tx_unit->intr), TAG, "delete interrupt service failed");
     }
+#if CONFIG_PM_ENABLE
     if (tx_unit->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(tx_unit->pm_lock), TAG, "delete pm lock failed");
     }
+#endif
     if (tx_unit->dma_chan) {
         ESP_RETURN_ON_ERROR(gdma_disconnect(tx_unit->dma_chan), TAG, "disconnect dma channel failed");
         ESP_RETURN_ON_ERROR(gdma_del_channel(tx_unit->dma_chan), TAG, "delete dma channel failed");
@@ -221,12 +223,11 @@ static esp_err_t parlio_select_periph_clock(parlio_tx_unit_t *tx_unit, const par
     if (clk_src != PARLIO_CLK_SRC_EXTERNAL) {
         // XTAL and PLL clock source will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient
         esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP;
-        sprintf(tx_unit->pm_lock_name, "parlio_tx_%d_%d", tx_unit->base.group->group_id, tx_unit->base.unit_id); // e.g. parlio_tx_0_0
 #if CONFIG_IDF_TARGET_ESP32P4
         // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS
         lock_type = ESP_PM_CPU_FREQ_MAX;
 #endif
-        esp_err_t ret  = esp_pm_lock_create(lock_type, 0, tx_unit->pm_lock_name, &tx_unit->pm_lock);
+        esp_err_t ret  = esp_pm_lock_create(lock_type, 0, parlio_periph_signals.groups[tx_unit->base.group->group_id].module_name, &tx_unit->pm_lock);
         ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed");
     }
 #endif
@@ -513,10 +514,12 @@ esp_err_t parlio_tx_unit_enable(parlio_tx_unit_handle_t tx_unit)
     ESP_RETURN_ON_FALSE(tx_unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     parlio_tx_fsm_t expected_fsm = PARLIO_TX_FSM_INIT;
     if (atomic_compare_exchange_strong(&tx_unit->fsm, &expected_fsm, PARLIO_TX_FSM_WAIT)) {
+#if CONFIG_PM_ENABLE
         // acquire power management lock
         if (tx_unit->pm_lock) {
             esp_pm_lock_acquire(tx_unit->pm_lock);
         }
+#endif
         parlio_ll_enable_interrupt(hal->regs, PARLIO_LL_EVENT_TX_MASK, true);
         atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_ENABLE);
     } else {
@@ -587,10 +590,12 @@ esp_err_t parlio_tx_unit_disable(parlio_tx_unit_handle_t tx_unit)
     // change the EOF condition to be the data length, so the EOF will be triggered normally
     parlio_ll_tx_set_eof_condition(hal->regs, PARLIO_LL_TX_EOF_COND_DATA_LEN);
 
+#if CONFIG_PM_ENABLE
     // release power management lock
     if (tx_unit->pm_lock) {
         esp_pm_lock_release(tx_unit->pm_lock);
     }
+#endif
 
     // finally we switch to the INIT state
     atomic_store(&tx_unit->fsm, PARLIO_TX_FSM_INIT);

components/esp_driver_pcnt/src/pulse_cnt.c

@@ -51,8 +51,6 @@
 
 #define PCNT_ALLOW_INTR_PRIORITY_MASK ESP_INTR_FLAG_LOWMED
 
-#define PCNT_PM_LOCK_NAME_LEN_MAX 16
-
 #if !SOC_RCC_IS_INDEPENDENT
 #define PCNT_RCC_ATOMIC() PERIPH_RCC_ATOMIC()
 #else
@@ -85,6 +83,9 @@ struct pcnt_group_t {
     portMUX_TYPE spinlock; // to protect per-group register level concurrent access
     pcnt_hal_context_t hal;
     pcnt_unit_t *units[SOC_PCNT_UNITS_PER_GROUP]; // array of PCNT units
+#if CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;  // power management lock
+#endif
 };
 
 typedef struct {
@@ -119,10 +120,6 @@ struct pcnt_unit_t {
     pcnt_chan_t *channels[SOC_PCNT_CHANNELS_PER_UNIT];    // array of PCNT channels
     pcnt_watch_point_t watchers[PCNT_LL_WATCH_EVENT_MAX]; // array of PCNT watchers
     intr_handle_t intr;                                   // interrupt handle
-    esp_pm_lock_handle_t pm_lock;                         // PM lock, for glitch filter, as that module can only be functional under APB
-#if CONFIG_PM_ENABLE
-    char pm_lock_name[PCNT_PM_LOCK_NAME_LEN_MAX]; // pm lock name
-#endif
     pcnt_unit_fsm_t fsm;      // record PCNT unit's driver state
     pcnt_watch_cb_t on_reach; // user registered callback function
     void *user_data;          // user data registered by user, which would be passed to the right callback function
@@ -191,9 +188,6 @@ static void pcnt_unregister_from_group(pcnt_unit_t *unit)
 
 static esp_err_t pcnt_destroy(pcnt_unit_t *unit)
 {
-    if (unit->pm_lock) {
-        ESP_RETURN_ON_ERROR(esp_pm_lock_delete(unit->pm_lock), TAG, "delete pm lock failed");
-    }
     if (unit->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_free(unit->intr), TAG, "delete interrupt service failed");
     }
@@ -206,9 +200,6 @@ static esp_err_t pcnt_destroy(pcnt_unit_t *unit)
 
 esp_err_t pcnt_new_unit(const pcnt_unit_config_t *config, pcnt_unit_handle_t *ret_unit)
 {
-#if CONFIG_PCNT_ENABLE_DEBUG_LOG
-    esp_log_level_set(TAG, ESP_LOG_DEBUG);
-#endif
     esp_err_t ret = ESP_OK;
     pcnt_unit_t *unit = NULL;
     ESP_GOTO_ON_FALSE(config && ret_unit, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
@@ -263,14 +254,6 @@ esp_err_t pcnt_new_unit(const pcnt_unit_config_t *config, pcnt_unit_handle_t *re
                           TAG, "install interrupt service failed");
     }
 
-    // PCNT uses the APB as its function clock,
-    // and its filter module is sensitive to the clock frequency
-#if CONFIG_PM_ENABLE
-    sprintf(unit->pm_lock_name, "pcnt_%d_%d", group_id, unit_id); // e.g. pcnt_0_0
-    ESP_GOTO_ON_ERROR(esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, unit->pm_lock_name, &unit->pm_lock), err, TAG, "install pm lock failed");
-    ESP_LOGD(TAG, "install APB_FREQ_MAX lock for unit (%d,%d)", group_id, unit_id);
-#endif
-
     // some events are enabled by default, disable them all
     pcnt_ll_disable_all_events(group->hal.dev, unit_id);
     // disable filter by default
@@ -423,10 +406,12 @@ esp_err_t pcnt_unit_enable(pcnt_unit_handle_t unit)
     ESP_RETURN_ON_FALSE(unit, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(unit->fsm == PCNT_UNIT_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "unit not in init state");
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
-    if (unit->pm_lock) {
+    if (unit->group->pm_lock) {
-        ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(unit->pm_lock), TAG, "acquire pm_lock failed");
+        ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(unit->group->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
     // enable interrupt service
     if (unit->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_enable(unit->intr), TAG, "enable interrupt service failed");
@@ -445,10 +430,12 @@ esp_err_t pcnt_unit_disable(pcnt_unit_handle_t unit)
     if (unit->intr) {
         ESP_RETURN_ON_ERROR(esp_intr_disable(unit->intr), TAG, "disable interrupt service failed");
     }
+#if CONFIG_PM_ENABLE
     // release power manager lock
-    if (unit->pm_lock) {
+    if (unit->group->pm_lock) {
-        ESP_RETURN_ON_ERROR(esp_pm_lock_release(unit->pm_lock), TAG, "release APB_FREQ_MAX lock failed");
+        ESP_RETURN_ON_ERROR(esp_pm_lock_release(unit->group->pm_lock), TAG, "release APB_FREQ_MAX lock failed");
     }
+#endif
 
     unit->fsm = PCNT_UNIT_FSM_INIT;
     return ESP_OK;
@@ -966,6 +953,14 @@ static pcnt_group_t *pcnt_acquire_group_handle(int group_id)
     _lock_release(&s_platform.mutex);
 
     if (new_group) {
+#if CONFIG_PM_ENABLE
+        // PCNT uses the APB as its function clock,
+        // and its filter module is sensitive to the clock frequency
+        // thus we choose the APM_MAX lock to prevent the function clock from being changed
+        if (esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, pcnt_periph_signals.groups[group_id].module_name, &group->pm_lock) != ESP_OK) {
+            ESP_LOGW(TAG, "create pm lock failed");
+        }
+#endif
         ESP_LOGD(TAG, "new group (%d) at %p", group_id, group);
     }
 
@@ -986,16 +981,21 @@ static void pcnt_release_group_handle(pcnt_group_t *group)
         PCNT_RCC_ATOMIC() {
             pcnt_ll_enable_bus_clock(group_id, false);
         }
-    }
-    _lock_release(&s_platform.mutex);
-
-    if (do_deinitialize) {
 #if PCNT_USE_RETENTION_LINK
         const periph_retention_module_t module_id = pcnt_reg_retention_info[group_id].retention_module;
         if (sleep_retention_is_module_inited(module_id)) {
             sleep_retention_module_deinit(module_id);
         }
 #endif // PCNT_USE_RETENTION_LINK
+    }
+    _lock_release(&s_platform.mutex);
+
+    if (do_deinitialize) {
+#if CONFIG_PM_ENABLE
+        if (group->pm_lock) {
+            esp_pm_lock_delete(group->pm_lock);
+        }
+#endif
         free(group);
         ESP_LOGD(TAG, "del group (%d)", group_id);
     }
@@ -1122,3 +1122,11 @@ static esp_err_t pcnt_create_sleep_retention_link_cb(void *arg)
     return ESP_OK;
 }
 #endif // PCNT_USE_RETENTION_LINK
+
+#if CONFIG_PCNT_ENABLE_DEBUG_LOG
+__attribute__((constructor))
+static void pcnt_override_default_log_level(void)
+{
+    esp_log_level_set(TAG, ESP_LOG_VERBOSE);
+}
+#endif

components/esp_driver_rmt/src/rmt_common.c

@@ -143,7 +143,7 @@ void rmt_release_group_handle(rmt_group_t *group)
 }
 
 #if !SOC_RMT_CHANNEL_CLK_INDEPENDENT
-static esp_err_t s_rmt_set_group_prescale(rmt_channel_t *chan, uint32_t expect_resolution_hz, uint32_t *ret_channel_prescale)
+static esp_err_t rmt_set_group_prescale(rmt_channel_t *chan, uint32_t expect_resolution_hz, uint32_t *ret_channel_prescale)
 {
     uint32_t periph_src_clk_hz = 0;
     rmt_group_t *group = chan->group;
@@ -256,7 +256,7 @@ esp_err_t rmt_select_periph_clock(rmt_channel_handle_t chan, rmt_clock_source_t
     real_div = (group->resolution_hz + expect_channel_resolution / 2) / expect_channel_resolution;
 #else
     // set division for group clock source, to achieve highest resolution while guaranteeing the channel resolution.
-    ESP_RETURN_ON_ERROR(s_rmt_set_group_prescale(chan, expect_channel_resolution, &real_div), TAG, "set rmt group prescale failed");
+    ESP_RETURN_ON_ERROR(rmt_set_group_prescale(chan, expect_channel_resolution, &real_div), TAG, "set rmt group prescale failed");
 #endif // SOC_RMT_CHANNEL_CLK_INDEPENDENT
 
     if (chan->direction == RMT_CHANNEL_DIRECTION_TX) {

components/esp_driver_rmt/src/rmt_private.h

@@ -159,8 +159,8 @@ struct rmt_channel_t {
     rmt_channel_direction_t direction; // channel direction
     rmt_symbol_word_t *hw_mem_base;    // base address of RMT channel hardware memory
     gdma_channel_handle_t dma_chan;    // DMA channel
-    esp_pm_lock_handle_t pm_lock;      // power management lock
 #if CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;      // power management lock
     char pm_lock_name[RMT_PM_LOCK_NAME_LEN_MAX]; // pm lock name
 #endif
     // RMT channel common interface

components/esp_driver_rmt/src/rmt_rx.c

@@ -148,9 +148,11 @@ static esp_err_t rmt_rx_destroy(rmt_rx_channel_t *rx_channel)
     if (rx_channel->base.intr) {
         ESP_RETURN_ON_ERROR(esp_intr_free(rx_channel->base.intr), TAG, "delete interrupt service failed");
     }
+#if CONFIG_PM_ENABLE
     if (rx_channel->base.pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(rx_channel->base.pm_lock), TAG, "delete pm_lock failed");
     }
+#endif
 #if SOC_RMT_SUPPORT_DMA
     if (rx_channel->base.dma_chan) {
         ESP_RETURN_ON_ERROR(gdma_del_channel(rx_channel->base.dma_chan), TAG, "delete dma channel failed");
@@ -499,10 +501,13 @@ static esp_err_t rmt_rx_enable(rmt_channel_handle_t channel)
     rmt_hal_context_t *hal = &group->hal;
     int channel_id = channel->channel_id;
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (channel->pm_lock) {
         esp_pm_lock_acquire(channel->pm_lock);
     }
+#endif
+
     if (channel->dma_chan) {
 #if SOC_RMT_SUPPORT_DMA
         // enable the DMA access mode
@@ -560,10 +565,12 @@ static esp_err_t rmt_rx_disable(rmt_channel_handle_t channel)
         portEXIT_CRITICAL(&group->spinlock);
     }
 
+#if CONFIG_PM_ENABLE
     // release power manager lock
     if (channel->pm_lock) {
         esp_pm_lock_release(channel->pm_lock);
     }
+#endif
 
     // now we can switch the state to init
     atomic_store(&channel->fsm, RMT_FSM_INIT);

components/esp_driver_rmt/src/rmt_tx.c

@@ -203,9 +203,11 @@ static esp_err_t rmt_tx_destroy(rmt_tx_channel_t *tx_channel)
     if (tx_channel->base.intr) {
         ESP_RETURN_ON_ERROR(esp_intr_free(tx_channel->base.intr), TAG, "delete interrupt service failed");
     }
+#if CONFIG_PM_ENABLE
     if (tx_channel->base.pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(tx_channel->base.pm_lock), TAG, "delete pm_lock failed");
     }
+#endif
 #if SOC_RMT_SUPPORT_DMA
     if (tx_channel->base.dma_chan) {
         ESP_RETURN_ON_ERROR(gdma_del_channel(tx_channel->base.dma_chan), TAG, "delete dma channel failed");
@@ -766,10 +768,12 @@ static esp_err_t rmt_tx_enable(rmt_channel_handle_t channel)
                         ESP_ERR_INVALID_STATE, TAG, "channel not in init state");
     rmt_tx_channel_t *tx_chan = __containerof(channel, rmt_tx_channel_t, base);
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (channel->pm_lock) {
         esp_pm_lock_acquire(channel->pm_lock);
     }
+#endif
 
 #if SOC_RMT_SUPPORT_DMA
     rmt_group_t *group = channel->group;
@@ -860,10 +864,12 @@ static esp_err_t rmt_tx_disable(rmt_channel_handle_t channel)
     }
     tx_chan->cur_trans = NULL;
 
+#if CONFIG_PM_ENABLE
     // release power manager lock
     if (channel->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(channel->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
 
     // finally we switch to the INIT state
     atomic_store(&channel->fsm, RMT_FSM_INIT);

components/esp_driver_sdm/src/sdm.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -70,9 +70,9 @@ struct sdm_channel_t {
     int gpio_num;                    // GPIO number
     uint32_t sample_rate_hz;         // Sample rate, in Hz
     portMUX_TYPE spinlock;           // to protect per-channels resources concurrently accessed by task and ISR handler
-    esp_pm_lock_handle_t pm_lock;    // PM lock, for glitch filter, as that module can only be functional under APB
     sdm_fsm_t fsm;              // FSM state
 #if CONFIG_PM_ENABLE
+    esp_pm_lock_handle_t pm_lock;    // PM lock, for glitch filter, as that module can only be functional under APB
     char pm_lock_name[SDM_PM_LOCK_NAME_LEN_MAX]; // pm lock name
 #endif
 };
@@ -181,9 +181,11 @@ static void sdm_unregister_from_group(sdm_channel_t *chan)
 
 static esp_err_t sdm_destroy(sdm_channel_t *chan)
 {
+#if CONFIG_PM_ENABLE
     if (chan->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(chan->pm_lock), TAG, "delete pm lock failed");
     }
+#endif
     if (chan->group) {
         sdm_unregister_from_group(chan);
     }
@@ -292,10 +294,12 @@ esp_err_t sdm_channel_enable(sdm_channel_handle_t chan)
     ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(chan->fsm == SDM_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "channel not in init state");
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (chan->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(chan->pm_lock), TAG, "acquire pm_lock failed");
     }
+#endif
     chan->fsm = SDM_FSM_ENABLE;
     return ESP_OK;
 }
@@ -305,10 +309,12 @@ esp_err_t sdm_channel_disable(sdm_channel_handle_t chan)
     ESP_RETURN_ON_FALSE(chan, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
     ESP_RETURN_ON_FALSE(chan->fsm == SDM_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "channel not in enable state");
 
+#if CONFIG_PM_ENABLE
     // release power manager lock
     if (chan->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(chan->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
     chan->fsm = SDM_FSM_INIT;
     return ESP_OK;
 }

components/esp_driver_sdmmc/src/sd_host_sdmmc.c

@@ -373,9 +373,11 @@ static esp_err_t sd_host_del_sdmmc_controller(sd_host_ctlr_handle_t ctlr)
     if (ctlr_ctx->io_intr_sem) {
         vSemaphoreDeleteWithCaps(ctlr_ctx->io_intr_sem);
     }
+#if CONFIG_PM_ENABLE
     if (ctlr_ctx->pm_lock) {
         esp_pm_lock_delete(ctlr_ctx->pm_lock);
     }
+#endif
 
     free(ctlr_ctx->dma_desc);
     ctlr_ctx->dma_desc = NULL;

components/esp_driver_sdmmc/src/sd_trans_sdmmc.c

@@ -482,9 +482,11 @@ esp_err_t sd_host_slot_sdmmc_do_transaction(sd_host_slot_handle_t slot, sdmmc_co
     sd_host_sdmmc_slot_t *slot_ctx = __containerof(slot, sd_host_sdmmc_slot_t, drv);
 
     xSemaphoreTake(slot_ctx->ctlr->mutex, portMAX_DELAY);
+#if CONFIG_PM_ENABLE
     if (slot_ctx->ctlr->pm_lock) {
         ESP_GOTO_ON_ERROR(esp_pm_lock_acquire(slot_ctx->ctlr->pm_lock), out, TAG, "acquire pm_lock failed");
     }
+#endif
     slot_ctx->ctlr->cur_slot_id = slot_ctx->slot_id;
 
     // By default, set probing frequency (400kHz) and 1-bit bus
@@ -579,9 +581,11 @@ esp_err_t sd_host_slot_sdmmc_do_transaction(sd_host_slot_handle_t slot, sdmmc_co
 #endif
 
 out:
+#if CONFIG_PM_ENABLE
     if (slot_ctx->ctlr->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_release(slot_ctx->ctlr->pm_lock), TAG, "release pm_lock failed");
     }
+#endif
     xSemaphoreGive(slot_ctx->ctlr->mutex);
 
     return ret;

components/esp_driver_twai/esp_twai_onchip.c

@@ -71,7 +71,9 @@ typedef struct {
     uint32_t valid_fd_timing;
     twai_event_callbacks_t cbs;
     void *user_data;
+#ifdef CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock;
+#endif
 
     _Atomic twai_error_state_t state;
     uint16_t tx_error_count;
@@ -285,9 +287,11 @@ static void _node_isr_main(void *arg)
 
 static void _node_destroy(twai_onchip_ctx_t *twai_ctx)
 {
+#ifdef CONFIG_PM_ENABLE
     if (twai_ctx->pm_lock) {
         esp_pm_lock_delete(twai_ctx->pm_lock);
     }
+#endif
     if (twai_ctx->intr_hdl) {
         esp_intr_free(twai_ctx->intr_hdl);
     }

components/esp_driver_uart/src/uhci.c

@@ -71,9 +71,11 @@ static bool uhci_gdma_tx_callback_eof(gdma_channel_handle_t dma_chan, gdma_event
         atomic_store(&uhci_ctrl->tx_dir.tx_fsm, UHCI_TX_FSM_ENABLE);
     }
 
+#if CONFIG_PM_ENABLE
     if (uhci_ctrl->pm_lock) {
         esp_pm_lock_release(uhci_ctrl->pm_lock);
     }
+#endif
 
     if (uhci_ctrl->tx_dir.on_tx_trans_done) {
         uhci_tx_done_event_data_t evt_data = {
@@ -143,10 +145,12 @@ static bool uhci_gdma_rx_callback_done(gdma_channel_handle_t dma_chan, gdma_even
         if (need_cache_sync) {
             esp_cache_msync(uhci_ctrl->rx_dir.buffer_pointers[uhci_ctrl->rx_dir.node_index], m2c_size, ESP_CACHE_MSYNC_FLAG_DIR_M2C);
         }
+#if CONFIG_PM_ENABLE
         // release power manager lock
         if (uhci_ctrl->pm_lock) {
             esp_pm_lock_release(uhci_ctrl->pm_lock);
         }
+#endif
         if (uhci_ctrl->rx_dir.on_rx_trans_event) {
             need_yield |= uhci_ctrl->rx_dir.on_rx_trans_event(uhci_ctrl, &evt_data, uhci_ctrl->user_data);
         }
@@ -273,10 +277,12 @@ static void uhci_do_transmit(uhci_controller_handle_t uhci_ctrl, uhci_transactio
         }
     };
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (uhci_ctrl->pm_lock) {
         esp_pm_lock_acquire(uhci_ctrl->pm_lock);
     }
+#endif
 
     gdma_link_mount_buffers(uhci_ctrl->tx_dir.dma_link, 0, &mount_config, 1, NULL);
     gdma_start(uhci_ctrl->tx_dir.dma_chan, gdma_link_get_head_addr(uhci_ctrl->tx_dir.dma_link));
@@ -339,10 +345,12 @@ esp_err_t uhci_receive(uhci_controller_handle_t uhci_ctrl, uint8_t *read_buffer,
         read_buffer += uhci_ctrl->rx_dir.buffer_size_per_desc_node[i];
     }
 
+#if CONFIG_PM_ENABLE
     // acquire power manager lock
     if (uhci_ctrl->pm_lock) {
         esp_pm_lock_acquire(uhci_ctrl->pm_lock);
     }
+#endif
 
     gdma_link_mount_buffers(uhci_ctrl->rx_dir.dma_link, 0, mount_configs, node_count, NULL);
 
@@ -434,9 +442,11 @@ esp_err_t uhci_del_controller(uhci_controller_handle_t uhci_ctrl)
         free(uhci_ctrl->rx_dir.buffer_pointers);
     }
 
+#if CONFIG_PM_ENABLE
     if (uhci_ctrl->pm_lock) {
         ESP_RETURN_ON_ERROR(esp_pm_lock_delete(uhci_ctrl->pm_lock), TAG, "delete rx pm_lock failed");
     }
+#endif
 
     ESP_RETURN_ON_ERROR(uhci_gdma_deinitialize(uhci_ctrl), TAG, "deinitialize uhci dam channel failed");
 

components/esp_driver_uart/src/uhci_private.h

@@ -105,8 +105,10 @@ struct uhci_controller_t {
     void *user_data;                                    // user data
     size_t int_mem_cache_line_size;                     // internal memory cache line size
     size_t ext_mem_cache_line_size;                     // external memory cache line size
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock;                       // power management lock
     char pm_lock_name[UHCI_PM_LOCK_NAME_LEN_MAX];       // pm lock name
+#endif
 };
 
 #ifdef __cplusplus

components/esp_lcd/dsi/esp_lcd_mipi_dsi_bus.c

@@ -143,10 +143,12 @@ esp_err_t esp_lcd_del_dsi_bus(esp_lcd_dsi_bus_handle_t bus)
     DSI_RCC_ATOMIC() {
         mipi_dsi_ll_enable_bus_clock(bus_id, false);
     }
+#if CONFIG_PM_ENABLE
     if (bus->pm_lock) {
         esp_pm_lock_release(bus->pm_lock);
         esp_pm_lock_delete(bus->pm_lock);
     }
+#endif
     free(bus);
     return ESP_OK;
 }

components/esp_lcd/dsi/esp_lcd_panel_dpi.c

@@ -47,7 +47,9 @@ struct esp_lcd_dpi_panel_t {
     dw_gdma_link_list_handle_t link_lists[DPI_PANEL_MAX_FB_NUM]; // DMA link list
     esp_async_fbcpy_handle_t fbcpy_handle; // Use DMA2D to do frame buffer copy
     SemaphoreHandle_t draw_sem;            // A semaphore used to synchronize the draw operations when DMA2D is used
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock;          // Power management lock
+#endif
     esp_lcd_dpi_panel_color_trans_done_cb_t on_color_trans_done; // Callback invoked when color data transfer has finished
     esp_lcd_dpi_panel_refresh_done_cb_t on_refresh_done; // Callback invoked when one refresh operation finished (kinda like a vsync end)
     void *user_ctx; // User context for the callback
@@ -375,10 +377,12 @@ static esp_err_t dpi_panel_del(esp_lcd_panel_t *panel)
     if (dpi_panel->draw_sem) {
         vSemaphoreDeleteWithCaps(dpi_panel->draw_sem);
     }
+#if CONFIG_PM_ENABLE
     if (dpi_panel->pm_lock) {
         esp_pm_lock_release(dpi_panel->pm_lock);
         esp_pm_lock_delete(dpi_panel->pm_lock);
     }
+#endif
     free(dpi_panel);
     return ESP_OK;
 }

components/esp_lcd/dsi/mipi_dsi_priv.h

@@ -39,7 +39,9 @@ extern "C" {
 typedef struct esp_lcd_dsi_bus_t {
     int bus_id;
     mipi_dsi_hal_context_t hal;
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock;
+#endif
 } esp_lcd_dsi_bus_t;
 
 #ifdef __cplusplus

components/esp_lcd/i80/esp_lcd_panel_io_i2s.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -71,7 +71,9 @@ struct esp_lcd_i80_bus_t {
     int dc_gpio_num;       // GPIO used for DC line
     int wr_gpio_num;       // GPIO used for WR line
     intr_handle_t intr;    // LCD peripheral interrupt handle
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // lock APB frequency when necessary
+#endif
     size_t max_transfer_bytes;    // Maximum number of bytes that can be transferred in one transaction
     gdma_link_list_handle_t dma_link; // DMA link list handle
     uint8_t *format_buffer;// The driver allocates an internal buffer for DMA to do data format transformer
@@ -235,9 +237,11 @@ err:
         if (bus->format_buffer) {
             free(bus->format_buffer);
         }
+#if CONFIG_PM_ENABLE
         if (bus->pm_lock) {
             esp_pm_lock_delete(bus->pm_lock);
         }
+#endif
         free(bus);
     }
     return ret;
@@ -251,9 +255,11 @@ esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus)
     int bus_id = bus->bus_id;
     i2s_platform_release_occupation(I2S_CTLR_HP, bus_id);
     esp_intr_free(bus->intr);
+#if CONFIG_PM_ENABLE
     if (bus->pm_lock) {
         esp_pm_lock_delete(bus->pm_lock);
     }
+#endif
     free(bus->format_buffer);
     gdma_del_link_list(bus->dma_link);
     free(bus);
@@ -550,10 +556,12 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, cons
     // delay a while, wait for DMA data being feed to I2S FIFO
     // in fact, this is only needed when LCD pixel clock is set too high
     esp_rom_delay_us(1);
+#if CONFIG_PM_ENABLE
     // increase the pm lock reference count before starting a new transaction
     if (bus->pm_lock) {
         esp_pm_lock_acquire(bus->pm_lock);
     }
+#endif
     i2s_ll_tx_start(bus->hal.dev);
     // polling the trans done event
     while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {}
@@ -574,10 +582,12 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, cons
         // polling the trans done event, but don't clear the event status
         while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {}
     }
+#if CONFIG_PM_ENABLE
     // decrease pm lock reference count
     if (bus->pm_lock) {
         esp_pm_lock_release(bus->pm_lock);
     }
+#endif
     bus->cur_trans = NULL;
     return ESP_OK;
 }
@@ -624,17 +634,21 @@ static esp_err_t panel_io_i80_tx_color(esp_lcd_panel_io_t *io, int lcd_cmd, cons
     i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first
     i2s_ll_start_out_link(bus->hal.dev);
     esp_rom_delay_us(1);
+#if CONFIG_PM_ENABLE
     // increase the pm lock reference count before starting a new transaction
     if (bus->pm_lock) {
         esp_pm_lock_acquire(bus->pm_lock);
     }
+#endif
     i2s_ll_tx_start(bus->hal.dev);
     // polling the trans done event
     while (!(i2s_ll_get_intr_status(bus->hal.dev) & I2S_LL_EVENT_TX_EOF)) {}
+#if CONFIG_PM_ENABLE
     // decrease pm lock reference count
     if (bus->pm_lock) {
         esp_pm_lock_release(bus->pm_lock);
     }
+#endif
     bus->cur_trans = NULL;
 
     // sending LCD color data to queue
@@ -770,10 +784,12 @@ static IRAM_ATTR void i2s_lcd_default_isr_handler(void *args)
         // process finished transaction
         if (trans_desc) {
             assert(trans_desc->i80_device == cur_device && "transaction device mismatch");
+#if CONFIG_PM_ENABLE
             // decrease pm lock reference count
             if (bus->pm_lock) {
                 esp_pm_lock_release(bus->pm_lock);
             }
+#endif
             // device callback
             if (trans_desc->trans_done_cb) {
                 if (trans_desc->trans_done_cb(&cur_device->base, NULL, trans_desc->user_ctx)) {
@@ -824,10 +840,12 @@ static IRAM_ATTR void i2s_lcd_default_isr_handler(void *args)
                 i2s_ll_tx_reset(bus->hal.dev); // reset TX engine first
                 i2s_ll_start_out_link(bus->hal.dev);
                 esp_rom_delay_us(1);
+#if CONFIG_PM_ENABLE
                 // increase the pm lock reference count before starting a new transaction
                 if (bus->pm_lock) {
                     esp_pm_lock_acquire(bus->pm_lock);
                 }
+#endif
                 i2s_ll_tx_start(bus->hal.dev);
                 break; // exit for-each loop
             }

components/esp_lcd/i80/esp_lcd_panel_io_i80.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -84,7 +84,9 @@ struct esp_lcd_i80_bus_t {
     lcd_hal_context_t hal; // Hal object
     size_t bus_width;      // Number of data lines
     intr_handle_t intr;    // LCD peripheral interrupt handle
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // Power management lock
+#endif
     uint8_t *format_buffer;  // The driver allocates an internal buffer for DMA to do data format transformer
     uint8_t *format_buffer_nc; // Non-cacheable version of format buffer
     size_t resolution_hz;    // LCD_CLK resolution, determined by selected clock source
@@ -251,9 +253,11 @@ err:
         if (bus->format_buffer) {
             free(bus->format_buffer);
         }
+#if CONFIG_PM_ENABLE
         if (bus->pm_lock) {
             esp_pm_lock_delete(bus->pm_lock);
         }
+#endif
         free(bus);
     }
     return ret;
@@ -275,9 +279,11 @@ esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus)
     gdma_del_channel(bus->dma_chan);
     esp_intr_free(bus->intr);
     free(bus->format_buffer);
+#if CONFIG_PM_ENABLE
     if (bus->pm_lock) {
         esp_pm_lock_delete(bus->pm_lock);
     }
+#endif
     gdma_del_link_list(bus->dma_link);
     free(bus);
     ESP_LOGD(TAG, "del i80 bus(%d)", bus_id);
@@ -497,17 +503,21 @@ static esp_err_t panel_io_i80_tx_param(esp_lcd_panel_io_t *io, int lcd_cmd, cons
         }
     };
     gdma_link_mount_buffers(bus->dma_link, 0, &mount_config, 1, NULL);
+#if CONFIG_PM_ENABLE
     // increase the pm lock reference count before starting a new transaction
     if (bus->pm_lock) {
         esp_pm_lock_acquire(bus->pm_lock);
     }
+#endif
     lcd_start_transaction(bus, trans_desc);
     // polling the trans done event, but don't clear the event status
     while (!(lcd_ll_get_interrupt_status(bus->hal.dev) & LCD_LL_EVENT_TRANS_DONE)) {}
+#if CONFIG_PM_ENABLE
     // decrease pm lock reference count
     if (bus->pm_lock) {
         esp_pm_lock_release(bus->pm_lock);
     }
+#endif
     return ESP_OK;
 }
 
@@ -752,10 +762,12 @@ IRAM_ATTR static void i80_lcd_default_isr_handler(void *args)
         // process finished transaction
         if (trans_desc) {
             assert(trans_desc->i80_device == cur_device && "transaction device mismatch");
+#if CONFIG_PM_ENABLE
             // decrease pm lock reference count
             if (bus->pm_lock) {
                 esp_pm_lock_release(bus->pm_lock);
             }
+#endif
             // device callback
             if (trans_desc->trans_done_cb) {
                 if (trans_desc->trans_done_cb(&cur_device->base, NULL, trans_desc->user_ctx)) {
@@ -802,10 +814,12 @@ IRAM_ATTR static void i80_lcd_default_isr_handler(void *args)
                 gdma_link_mount_buffers(bus->dma_link, 0, &mount_config, 1, NULL);
                 // enable interrupt again, because the new transaction can trigger new trans done event
                 esp_intr_enable(bus->intr);
+#if CONFIG_PM_ENABLE
                 // increase the pm lock reference count before starting a new transaction
                 if (bus->pm_lock) {
                     esp_pm_lock_acquire(bus->pm_lock);
                 }
+#endif
                 lcd_start_transaction(bus, trans_desc);
                 break; // exit for-each loop
             }

components/esp_lcd/rgb/esp_lcd_panel_rgb.c

@@ -104,7 +104,9 @@ struct esp_rgb_panel_t {
     size_t dma_burst_size;  // DMA transfer burst size
     int disp_gpio_num;     // Display control GPIO, which is used to perform action like "disp_off"
     intr_handle_t intr;    // LCD peripheral interrupt handle
+#if CONFIG_PM_ENABLE
     esp_pm_lock_handle_t pm_lock; // Power management lock
+#endif
     size_t num_dma_nodes;  // Number of DMA descriptors that used to carry the frame buffer
     gdma_channel_handle_t dma_chan; // DMA channel handle
     gdma_link_list_handle_t dma_fb_links[RGB_LCD_PANEL_MAX_FB_NUM]; // DMA link lists for multiple frame buffers
@@ -235,10 +237,12 @@ static esp_err_t lcd_rgb_panel_destroy(esp_rgb_panel_t *rgb_panel)
     if (rgb_panel->intr) {
         esp_intr_free(rgb_panel->intr);
     }
+#if CONFIG_PM_ENABLE
     if (rgb_panel->pm_lock) {
         esp_pm_lock_release(rgb_panel->pm_lock);
         esp_pm_lock_delete(rgb_panel->pm_lock);
     }
+#endif
     free(rgb_panel);
     return ESP_OK;
 }

components/soc/esp32/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -19,6 +20,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2CEXT1_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT1_SDA_IN_IDX,
         .scl_out_sig = I2CEXT1_SCL_OUT_IDX,

components/soc/esp32/pcnt_periph.c

@@ -12,6 +12,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -10,6 +10,10 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+                [1] = "TIMG0T1",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
@@ -17,6 +21,10 @@ const timer_group_signal_conn_t timer_group_periph_signals = {
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+                [1] = "TIMG1T1",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32c2/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,

components/soc/esp32c2/timer_periph.c

@@ -9,6 +9,9 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,

components/soc/esp32c3/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,

components/soc/esp32c3/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32c5/i2c_periph.c

@@ -14,6 +14,7 @@ static_assert(SOC_I2C_NUM == (SOC_HP_I2C_NUM + SOC_LP_I2C_NUM));
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     /* I2C_NUM_0*/
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -22,6 +23,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     },
     /* LP_I2C_NUM_0*/
     {
+        .module_name = "LP_I2C0",
         .sda_out_sig = 0,
         .sda_in_sig = 0,
         .scl_out_sig = 0,

components/soc/esp32c5/parlio_periph.c

@@ -10,6 +10,7 @@
 const parlio_signal_conn_t parlio_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = "PARLIO0",
             .module = PERIPH_PARLIO_MODULE,
             .tx_irq_id = ETS_PARL_IO_TX_INTR_SOURCE,
             .rx_irq_id = ETS_PARL_IO_RX_INTR_SOURCE,

components/soc/esp32c5/pcnt_periph.c

@@ -12,6 +12,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32c5/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32c6/i2c_periph.c

@@ -16,6 +16,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -23,6 +24,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "LP_I2C0",
         .sda_out_sig = 0,
         .sda_in_sig = 0,
         .scl_out_sig = 0,

components/soc/esp32c6/parlio_periph.c

@@ -10,6 +10,7 @@
 const parlio_signal_conn_t parlio_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = "PARLIO0",
             .module = PERIPH_PARLIO_MODULE,
             .tx_irq_id = ETS_PARL_IO_INTR_SOURCE,
             .rx_irq_id = ETS_PARL_IO_INTR_SOURCE,

components/soc/esp32c6/pcnt_periph.c

@@ -12,6 +12,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32c6/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32c61/i2c_periph.c

@@ -13,6 +13,7 @@
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     /* I2C_NUM_0*/
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,

components/soc/esp32c61/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_INTR_SOURCE,

components/soc/esp32h2/i2c_periph.c

@@ -14,6 +14,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -21,6 +22,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2CEXT1_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT1_SDA_IN_IDX,
         .scl_out_sig = I2CEXT1_SCL_OUT_IDX,

components/soc/esp32h2/parlio_periph.c

@@ -10,6 +10,7 @@
 const parlio_signal_conn_t parlio_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = "PARLIO0",
             .module = PERIPH_PARLIO_MODULE,
             .tx_irq_id = ETS_PARL_IO_TX_INTR_SOURCE,
             .rx_irq_id = ETS_PARL_IO_RX_INTR_SOURCE,

components/soc/esp32h2/pcnt_periph.c

@@ -12,6 +12,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32h2/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32h21/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -19,6 +20,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2CEXT1_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT1_SDA_IN_IDX,
         .scl_out_sig = I2CEXT1_SCL_OUT_IDX,

components/soc/esp32h21/timer_periph.c

@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_INTR_SOURCE,

components/soc/esp32h4/timer_periph.c

@@ -9,12 +9,18 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_INTR_SOURCE,
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_INTR_SOURCE,

components/soc/esp32p4/i2c_periph.c

@@ -13,6 +13,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2C0_SDA_PAD_OUT_IDX,
         .sda_in_sig = I2C0_SDA_PAD_IN_IDX,
         .scl_out_sig = I2C0_SCL_PAD_OUT_IDX,
@@ -20,6 +21,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2C1_SDA_PAD_OUT_IDX,
         .sda_in_sig = I2C1_SDA_PAD_IN_IDX,
         .scl_out_sig = I2C1_SCL_PAD_OUT_IDX,
@@ -27,6 +29,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C1_INTR_SOURCE,
     },
     {
+        .module_name = "LP_I2C0",
         .sda_out_sig = LP_I2C_SDA_PAD_OUT_IDX,
         .sda_in_sig = LP_I2C_SDA_PAD_IN_IDX,
         .scl_out_sig = LP_I2C_SCL_PAD_OUT_IDX,

components/soc/esp32p4/parlio_periph.c

@@ -10,6 +10,7 @@
 const parlio_signal_conn_t parlio_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = "PARLIO0",
             .module = PERIPH_PARLIO_MODULE,
             .tx_irq_id = ETS_HP_PARLIO_TX_INTR_SOURCE,
             .rx_irq_id = ETS_HP_PARLIO_RX_INTR_SOURCE,

components/soc/esp32p4/pcnt_periph.c

@@ -12,6 +12,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32p4/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,6 +9,10 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+                [1] = "TIMG0T1",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_INTR_SOURCE,
@@ -16,6 +20,10 @@ const timer_group_signal_conn_t timer_group_periph_signals = {
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+                [1] = "TIMG1T1",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_INTR_SOURCE,

components/soc/esp32s2/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -19,6 +20,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2CEXT1_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT1_SDA_IN_IDX,
         .scl_out_sig = I2CEXT1_SCL_OUT_IDX,

components/soc/esp32s2/pcnt_periph.c

@@ -11,6 +11,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32s2/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,6 +9,10 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+                [1] = "TIMG0T1",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
@@ -16,6 +20,10 @@ const timer_group_signal_conn_t timer_group_periph_signals = {
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+                [1] = "TIMG1T1",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/esp32s3/i2c_periph.c

@@ -12,6 +12,7 @@
 */
 const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
     {
+        .module_name = "I2C0",
         .sda_out_sig = I2CEXT0_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT0_SDA_IN_IDX,
         .scl_out_sig = I2CEXT0_SCL_OUT_IDX,
@@ -19,6 +20,7 @@ const i2c_signal_conn_t i2c_periph_signal[SOC_I2C_NUM] = {
         .irq = ETS_I2C_EXT0_INTR_SOURCE,
     },
     {
+        .module_name = "I2C1",
         .sda_out_sig = I2CEXT1_SDA_OUT_IDX,
         .sda_in_sig = I2CEXT1_SDA_IN_IDX,
         .scl_out_sig = I2CEXT1_SCL_OUT_IDX,

components/soc/esp32s3/pcnt_periph.c

@@ -11,6 +11,7 @@ const pcnt_signal_conn_t pcnt_periph_signals = {
     .groups = {
         [0] = {
             .irq = ETS_PCNT_INTR_SOURCE,
+            .module_name = "pcnt0",
             .units = {
                 [0] = {
                     .channels = {

components/soc/esp32s3/timer_periph.c

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -9,6 +9,10 @@
 const timer_group_signal_conn_t timer_group_periph_signals = {
     .groups = {
         [0] = {
+            .module_name = {
+                [0] = "TIMG0T0",
+                [1] = "TIMG0T1",
+            },
             .module = PERIPH_TIMG0_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG0_T0_LEVEL_INTR_SOURCE,
@@ -16,6 +20,10 @@ const timer_group_signal_conn_t timer_group_periph_signals = {
             }
         },
         [1] = {
+            .module_name = {
+                [0] = "TIMG1T0",
+                [1] = "TIMG1T1",
+            },
             .module = PERIPH_TIMG1_MODULE,
             .timer_irq_id = {
                 [0] = ETS_TG1_T0_LEVEL_INTR_SOURCE,

components/soc/include/soc/i2c_periph.h

@@ -20,6 +20,7 @@ extern "C" {
 #endif
 
 typedef struct {
+    const char *module_name;
     const uint8_t sda_out_sig;
     const uint8_t sda_in_sig;
     const uint8_t scl_out_sig;

components/soc/include/soc/parlio_periph.h

@@ -39,6 +39,7 @@ typedef struct {
         const int tx_irq_id;
         const int rx_irq_id;
         const periph_module_t module;
+        const char *module_name;
     } groups[SOC_PARLIO_GROUPS];
 } parlio_signal_conn_t;
 

components/soc/include/soc/pcnt_periph.h

@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2019-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2019-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -22,6 +22,7 @@ extern "C" {
 
 typedef struct {
     struct {
+        const char *module_name;
         struct {
             struct {
                 const uint32_t pulse_sig;

components/soc/include/soc/timer_periph.h

@@ -23,6 +23,7 @@ extern "C" {
 
 typedef struct {
     struct {
+        const char *module_name[SOC_TIMER_GROUP_TIMERS_PER_GROUP];
         const periph_module_t module; // Peripheral module
         const int timer_irq_id[SOC_TIMER_GROUP_TIMERS_PER_GROUP]; // interrupt source ID
     } groups[SOC_TIMER_GROUPS];