diff --git a/components/bt/controller/esp32c3/bt.c b/components/bt/controller/esp32c3/bt.c index 564c90d493..352f0fca35 100644 --- a/components/bt/controller/esp32c3/bt.c +++ b/components/bt/controller/esp32c3/bt.c @@ -241,7 +241,6 @@ extern bool btdm_deep_sleep_mem_init(void); extern void btdm_deep_sleep_mem_deinit(void); extern void btdm_ble_power_down_dma_copy(bool copy); extern uint8_t btdm_sleep_clock_sync(void); -extern void sdk_config_extend_set_pll_track(bool enable); #if CONFIG_MAC_BB_PD extern void esp_mac_bb_power_down(void); @@ -1091,8 +1090,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) // overwrite some parameters cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL; - sdk_config_extend_set_pll_track(false); - #if CONFIG_MAC_BB_PD esp_mac_bb_pd_mem_init(); #endif diff --git a/components/bt/controller/esp32s3/bt.c b/components/bt/controller/esp32s3/bt.c index 8295b98aef..91cc8c8c26 100644 --- a/components/bt/controller/esp32s3/bt.c +++ b/components/bt/controller/esp32s3/bt.c @@ -246,7 +246,6 @@ extern bool btdm_deep_sleep_mem_init(void); extern void btdm_deep_sleep_mem_deinit(void); extern void btdm_ble_power_down_dma_copy(bool copy); extern uint8_t btdm_sleep_clock_sync(void); -extern void sdk_config_extend_set_pll_track(bool enable); #if CONFIG_MAC_BB_PD extern void esp_mac_bb_power_down(void); @@ -1137,8 +1136,6 @@ esp_err_t esp_bt_controller_init(esp_bt_controller_config_t *cfg) // overwrite some parameters cfg->magic = ESP_BT_CTRL_CONFIG_MAGIC_VAL; - sdk_config_extend_set_pll_track(false); - #if CONFIG_MAC_BB_PD esp_mac_bb_pd_mem_init(); #endif diff --git a/components/esp_phy/lib b/components/esp_phy/lib index ff0d771b8e..9a94277c0d 160000 --- a/components/esp_phy/lib +++ b/components/esp_phy/lib @@ -1 +1 @@ -Subproject commit ff0d771b8e33e320e11634567ee53b9cd78e6be1 +Subproject commit 9a94277c0d8dc1174fc3dd2dcb48dea49e61931d diff --git a/components/esp_phy/test/test_phy_rtc.c b/components/esp_phy/test/test_phy_rtc.c index e7a4ee0844..5846ce8a4f 100644 --- a/components/esp_phy/test/test_phy_rtc.c +++ b/components/esp_phy/test/test_phy_rtc.c @@ -77,12 +77,15 @@ static IRAM_ATTR void test_phy_rtc_cache_task(void *arg) #if SOC_BT_SUPPORTED +#if CONFIG_IDF_TARGET_ESP32 + /* Only esp32 will call bt_track_pll_cap() in the interrupt + handler, other chips will call this function in the task + */ ESP_LOGI(TAG, "Test bt_track_pll_cap()..."); spi_flash_disable_interrupts_caches_and_other_cpu(); bt_track_pll_cap(); spi_flash_enable_interrupts_caches_and_other_cpu(); -#if CONFIG_IDF_TARGET_ESP32 extern void bt_bb_init_cmplx_reg(void); ESP_LOGI(TAG, "Test bt_bb_init_cmplx_reg()..."); spi_flash_disable_interrupts_caches_and_other_cpu();