diff --git a/components/esp_driver_gpio/src/gpio.c b/components/esp_driver_gpio/src/gpio.c
index be6a1ecc35..5b17568bce 100644
--- a/components/esp_driver_gpio/src/gpio.c
+++ b/components/esp_driver_gpio/src/gpio.c
@@ -207,7 +207,7 @@ esp_err_t gpio_output_disable(gpio_num_t gpio_num)
 {
     GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
     gpio_hal_output_disable(gpio_context.gpio_hal, gpio_num);
-    gpio_hal_matrix_out_default(gpio_context.gpio_hal, gpio_num); // Ensure no other output signal is routed via GPIO matrix to this pin
+    gpio_hal_set_output_enable_ctrl(gpio_context.gpio_hal, gpio_num, false, false); // so that output disable could take effect
     return ESP_OK;
 }
 
@@ -800,7 +800,8 @@ void gpio_iomux_in(uint32_t gpio, uint32_t signal_idx)
 
 void gpio_iomux_out(uint8_t gpio_num, int func, bool out_en_inv)
 {
-    gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func, (uint32_t)out_en_inv);
+    (void)out_en_inv; // out_en_inv only takes effect when signal goes through gpio matrix to the IO
+    gpio_hal_iomux_out(gpio_context.gpio_hal, gpio_num, func);
 }
 
 static esp_err_t gpio_sleep_pullup_en(gpio_num_t gpio_num)
@@ -1031,12 +1032,14 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
         bool pd = 0;
         bool ie = 0;
         bool oe = 0;
+        bool oe_ctrl_by_periph = 0;
+        bool oe_inv = 0;
         bool od = 0;
         bool slp_sel = 0;
         uint32_t drv = 0;
         uint32_t fun_sel = 0;
         uint32_t sig_out = 0;
-        gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &od, &drv, &fun_sel, &sig_out, &slp_sel);
+        gpio_hal_get_io_config(gpio_context.gpio_hal, gpio_num, &pu, &pd, &ie, &oe, &oe_ctrl_by_periph, &oe_inv, &od, &drv, &fun_sel, &sig_out, &slp_sel);
 #if !SOC_GPIO_SUPPORT_RTC_INDEPENDENT && SOC_RTCIO_PIN_COUNT > 0
         if (rtc_gpio_is_valid_gpio(gpio_num)) {
             int rtcio_num = rtc_io_number_get(gpio_num);
@@ -1046,11 +1049,18 @@ esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)
         }
 #endif
 
+        // When the IO is used as a simple GPIO output, oe signal can only be controlled by the oe register
+        // When the IO is not used as a simple GPIO output, oe signal could be controlled by the peripheral
+        const char *oe_str = oe ? "1" : "0";
+        if (sig_out != SIG_GPIO_OUT_IDX && oe_ctrl_by_periph) {
+            oe_str = "[periph_sig_ctrl]";
+        }
+
         fprintf(out_stream, "IO[%"PRIu32"]%s -\n", gpio_num, esp_gpio_is_reserved(BIT64(gpio_num)) ? " **RESERVED**" : "");
         fprintf(out_stream, "  Pullup: %d, Pulldown: %d, DriveCap: %"PRIu32"\n", pu, pd, drv);
-        fprintf(out_stream, "  InputEn: %d, OutputEn: %d, OpenDrain: %d\n", ie, oe, od);
+        fprintf(out_stream, "  InputEn: %d, OutputEn: %s%s, OpenDrain: %d\n", ie, oe_str, ((fun_sel == PIN_FUNC_GPIO) && (oe_inv)) ? " (inversed)" : "", od);
         fprintf(out_stream, "  FuncSel: %"PRIu32" (%s)\n", fun_sel, (fun_sel == PIN_FUNC_GPIO) ? "GPIO" : "IOMUX");
-        if (oe && fun_sel == PIN_FUNC_GPIO) {
+        if (fun_sel == PIN_FUNC_GPIO) {
             fprintf(out_stream, "  GPIO Matrix SigOut ID: %"PRIu32"%s\n", sig_out, (sig_out == SIG_GPIO_OUT_IDX) ? " (simple GPIO output)" : "");
         }
         if (ie && fun_sel == PIN_FUNC_GPIO) {
diff --git a/components/hal/esp32/include/hal/gpio_ll.h b/components/hal/esp32/include/hal/gpio_ll.h
index 128334c51e..d86949819d 100644
--- a/components/hal/esp32/include/hal/gpio_ll.h
+++ b/components/hal/esp32/include/hal/gpio_ll.h
@@ -51,6 +51,8 @@ extern const uint8_t GPIO_PIN_MUX_REG_OFFSET[SOC_GPIO_PIN_COUNT];
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -58,7 +60,7 @@ extern const uint8_t GPIO_PIN_MUX_REG_OFFSET[SOC_GPIO_PIN_COUNT];
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
@@ -68,6 +70,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
@@ -706,6 +710,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -726,12 +744,10 @@ static inline void gpio_ll_set_pin_ctrl(uint32_t val, uint32_t bmap, uint32_t sh
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32c2/include/hal/gpio_ll.h b/components/hal/esp32c2/include/hal/gpio_ll.h
index 182d9e71ec..2412a39c00 100644
--- a/components/hal/esp32c2/include/hal/gpio_ll.h
+++ b/components/hal/esp32c2/include/hal/gpio_ll.h
@@ -42,6 +42,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -49,7 +51,7 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_mask = 1 << gpio_num;
@@ -58,6 +60,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (hw->enable.val & bit_mask) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
@@ -508,6 +512,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -528,12 +546,10 @@ static inline void gpio_ll_set_pin_ctrl(uint32_t val, uint32_t bmap, uint32_t sh
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h
index 690830a7e3..dde10281de 100644
--- a/components/hal/esp32c3/include/hal/gpio_ll.h
+++ b/components/hal/esp32c3/include/hal/gpio_ll.h
@@ -502,6 +502,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -522,12 +536,10 @@ static inline void gpio_ll_set_pin_ctrl(uint32_t val, uint32_t bmap, uint32_t sh
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
@@ -748,6 +760,8 @@ static inline bool gpio_ll_deepsleep_wakeup_is_enabled(gpio_dev_t *hw, uint32_t
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -755,7 +769,7 @@ static inline bool gpio_ll_deepsleep_wakeup_is_enabled(gpio_dev_t *hw, uint32_t
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_mask = 1 << gpio_num;
@@ -764,6 +778,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (hw->enable.val & bit_mask) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
diff --git a/components/hal/esp32c5/include/hal/gpio_ll.h b/components/hal/esp32c5/include/hal/gpio_ll.h
index 99060c83c2..80f92f4d97 100644
--- a/components/hal/esp32c5/include/hal/gpio_ll.h
+++ b/components/hal/esp32c5/include/hal/gpio_ll.h
@@ -46,6 +46,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -53,13 +55,15 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     *pu = IO_MUX.gpio[gpio_num].fun_wpu;
     *pd = IO_MUX.gpio[gpio_num].fun_wpd;
     *ie = IO_MUX.gpio[gpio_num].fun_ie;
     *oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = IO_MUX.gpio[gpio_num].fun_drv;
     *fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
@@ -484,6 +488,20 @@ static inline void gpio_ll_iomux_in(gpio_dev_t *hw, uint32_t gpio, uint32_t sign
     IO_MUX.gpio[gpio].fun_ie = 1;
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Select a function for the pin in the IOMUX
  *
@@ -523,12 +541,10 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32c6/include/hal/gpio_ll.h b/components/hal/esp32c6/include/hal/gpio_ll.h
index 3355909d69..d19bbd566b 100644
--- a/components/hal/esp32c6/include/hal/gpio_ll.h
+++ b/components/hal/esp32c6/include/hal/gpio_ll.h
@@ -47,6 +47,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -54,7 +56,7 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_mask = 1 << gpio_num;
@@ -63,6 +65,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (hw->enable.val & bit_mask) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
@@ -470,6 +474,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -507,12 +525,10 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32c61/include/hal/gpio_ll.h b/components/hal/esp32c61/include/hal/gpio_ll.h
index eddc93672f..ab73eebd96 100644
--- a/components/hal/esp32c61/include/hal/gpio_ll.h
+++ b/components/hal/esp32c61/include/hal/gpio_ll.h
@@ -47,6 +47,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -54,13 +56,15 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     *pu = IO_MUX.gpion[gpio_num].gpion_fun_wpu;
     *pd = IO_MUX.gpion[gpio_num].gpion_fun_wpd;
     *ie = IO_MUX.gpion[gpio_num].gpion_fun_ie;
     *oe = (hw->enable.val & (1 << gpio_num)) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->funcn_out_sel_cfg[gpio_num].funcn_oe_sel);
+    *oe_inv = hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel;
     *od = hw->pinn[gpio_num].pinn_pad_driver;
     *drv = IO_MUX.gpion[gpio_num].gpion_fun_drv;
     *fun_sel = IO_MUX.gpion[gpio_num].gpion_mcu_sel;
@@ -516,6 +520,20 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
     IO_MUX.gpion[gpio_num].gpion_mcu_sel = func;
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->funcn_out_sel_cfg[gpio_num].funcn_oe_sel = !ctrl_by_periph;
+}
+
 /**
   * @brief Set peripheral output to an GPIO pad through the IO_MUX.
   *
@@ -523,12 +541,10 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->funcn_out_sel_cfg[gpio_num].funcn_oe_sel = 0;
-    hw->funcn_out_sel_cfg[gpio_num].funcn_oe_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32h2/include/hal/gpio_ll.h b/components/hal/esp32h2/include/hal/gpio_ll.h
index 7d1bc5daad..5ac5faa53e 100644
--- a/components/hal/esp32h2/include/hal/gpio_ll.h
+++ b/components/hal/esp32h2/include/hal/gpio_ll.h
@@ -47,6 +47,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -54,7 +56,7 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_mask = 1 << gpio_num;
@@ -63,6 +65,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (hw->enable.val & bit_mask) >> gpio_num;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
@@ -533,6 +537,20 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
     PIN_FUNC_SELECT(IO_MUX_GPIO0_REG + (gpio_num * 4), func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
   * @brief Set peripheral output to an GPIO pad through the IOMUX.
   *
@@ -540,12 +558,10 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h
index be812c27b3..cc3a44cf35 100644
--- a/components/hal/esp32p4/include/hal/gpio_ll.h
+++ b/components/hal/esp32p4/include/hal/gpio_ll.h
@@ -53,6 +53,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -60,7 +62,7 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
@@ -69,6 +71,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = IO_MUX.gpio[gpio_num].fun_wpd;
     *ie = IO_MUX.gpio[gpio_num].fun_ie;
     *oe = (((gpio_num < 32) ? hw->enable.val : hw->enable1.val) & bit_mask) >> bit_shift;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = IO_MUX.gpio[gpio_num].fun_drv;
     *fun_sel = IO_MUX.gpio[gpio_num].mcu_sel;
@@ -627,6 +631,20 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
     IO_MUX.gpio[gpio_num].mcu_sel = func;
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
   * @brief Set peripheral output to an GPIO pad through the IO_MUX.
   *
@@ -634,12 +652,10 @@ static inline void gpio_ll_func_sel(gpio_dev_t *hw, uint8_t gpio_num, uint32_t f
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h
index 65c451e499..e2251f9c48 100644
--- a/components/hal/esp32s2/include/hal/gpio_ll.h
+++ b/components/hal/esp32s2/include/hal/gpio_ll.h
@@ -41,6 +41,8 @@ extern "C" {
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -48,7 +50,7 @@ extern "C" {
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
@@ -58,6 +60,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
@@ -520,6 +524,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -539,12 +557,10 @@ static inline void gpio_ll_set_pin_ctrl(uint32_t val, uint32_t bmap, uint32_t sh
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h
index a0365773bb..e53df0e3f8 100644
--- a/components/hal/esp32s3/include/hal/gpio_ll.h
+++ b/components/hal/esp32s3/include/hal/gpio_ll.h
@@ -516,6 +516,20 @@ static inline void gpio_ll_iomux_func_sel(uint32_t pin_name, uint32_t func)
     PIN_FUNC_SELECT(pin_name, func);
 }
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hw Peripheral GPIO hardware instance address.
+  * @param gpio_num GPIO number of the pad.
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
+  */
+static inline void gpio_ll_set_output_enable_ctrl(gpio_dev_t *hw, uint8_t gpio_num, bool ctrl_by_periph, bool oen_inv)
+{
+    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;       // control valid only when using gpio matrix to route signal to the IO
+    hw->func_out_sel_cfg[gpio_num].oen_sel = !ctrl_by_periph;
+}
+
 /**
  * @brief  Control the pin in the IOMUX
  *
@@ -536,12 +550,10 @@ static inline void gpio_ll_set_pin_ctrl(uint32_t val, uint32_t bmap, uint32_t sh
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func, uint32_t oen_inv)
+static inline void gpio_ll_iomux_out(gpio_dev_t *hw, uint8_t gpio_num, int func)
 {
-    hw->func_out_sel_cfg[gpio_num].oen_sel = 0;
-    hw->func_out_sel_cfg[gpio_num].oen_inv_sel = oen_inv;
+    gpio_ll_set_output_enable_ctrl(hw, gpio_num, true, false);
     gpio_ll_func_sel(hw, gpio_num, func);
 }
 
@@ -712,6 +724,8 @@ static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num
  * @param pd Pull-down enabled or not
  * @param ie Input enabled or not
  * @param oe Output enabled or not
+ * @param oe_ctrl_by_periph Output enable signal from peripheral or not
+ * @param oe_inv Output enable signal is inversed or not
  * @param od Open-drain enabled or not
  * @param drv Drive strength value
  * @param fun_sel IOMUX function selection value
@@ -719,7 +733,7 @@ static inline void gpio_ll_sleep_output_enable(gpio_dev_t *hw, uint32_t gpio_num
  * @param slp_sel Pin sleep mode enabled or not
  */
 static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
-                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *od, uint32_t *drv,
+                                         bool *pu, bool *pd, bool *ie, bool *oe, bool *oe_ctrl_by_periph, bool *oe_inv, bool *od, uint32_t *drv,
                                          uint32_t *fun_sel, uint32_t *sig_out, bool *slp_sel)
 {
     uint32_t bit_shift = (gpio_num < 32) ? gpio_num : (gpio_num - 32);
@@ -729,6 +743,8 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *pd = (iomux_reg_val & FUN_PD_M) >> FUN_PD_S;
     *ie = (iomux_reg_val & FUN_IE_M) >> FUN_IE_S;
     *oe = (((gpio_num < 32) ? hw->enable : hw->enable1.val) & bit_mask) >> bit_shift;
+    *oe_ctrl_by_periph = !(hw->func_out_sel_cfg[gpio_num].oen_sel);
+    *oe_inv = hw->func_out_sel_cfg[gpio_num].oen_inv_sel;
     *od = hw->pin[gpio_num].pad_driver;
     gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
diff --git a/components/hal/include/hal/gpio_hal.h b/components/hal/include/hal/gpio_hal.h
index 269456b217..aaaac253c4 100644
--- a/components/hal/include/hal/gpio_hal.h
+++ b/components/hal/include/hal/gpio_hal.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -43,14 +43,16 @@ typedef struct {
  * @param pd Pointer to accept the status of pull-down enabled or not
  * @param ie Pointer to accept the status of input enabled or not
  * @param oe Pointer to accept the status of output enabled or not
+ * @param oe_ctrl_by_periph Pointer to accept the status of output enable signal control
+ * @param oe_inv Pointer to accept the status of output enable signal inversed or not
  * @param od Pointer to accept the status of open-drain enabled or not
  * @param drv Pointer to accept the value of drive strength
  * @param fun_sel Pointer to accept the value of IOMUX function selection
  * @param sig_out Pointer to accept the index of outputting peripheral signal
  * @param slp_sel Pointer to accept the status of pin sleep mode enabled or not
  */
-#define gpio_hal_get_io_config(hal, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel) \
-            gpio_ll_get_io_config((hal)->dev, gpio_num, pu, pd, ie, oe, od, drv, fun_sel, sig_out, slp_sel)
+#define gpio_hal_get_io_config(hal, gpio_num, pu, pd, ie, oe, oe_ctrl_by_periph, oe_inv, od, drv, fun_sel, sig_out, slp_sel) \
+            gpio_ll_get_io_config((hal)->dev, gpio_num, pu, pd, ie, oe, oe_ctrl_by_periph, oe_inv, od, drv, fun_sel, sig_out, slp_sel)
 
 /**
   * @brief Enable pull-up on GPIO.
@@ -169,6 +171,16 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num);
   */
 #define gpio_hal_output_enable(hal, gpio_num) gpio_ll_output_enable((hal)->dev, gpio_num)
 
+/**
+  * @brief Configure the source of output enable signal for the GPIO pin.
+  *
+  * @param hal Context of the HAL layer
+  * @param gpio_num GPIO number
+  * @param ctrl_by_periph True if use output enable signal from peripheral, false if force the output enable signal to be sourced from bit n of GPIO_ENABLE_REG
+  * @param oen_inv True if the output enable needs to be inverted, otherwise False
+  */
+ #define gpio_hal_set_output_enable_ctrl(hal, gpio_num, ctrl_by_periph, oen_inv) gpio_ll_set_output_enable_ctrl((hal)->dev, gpio_num, ctrl_by_periph, oen_inv)
+
 /**
   * @brief Disable open-drain mode on GPIO.
   *
@@ -371,9 +383,8 @@ void gpio_hal_intr_disable(gpio_hal_context_t *hal, uint32_t gpio_num);
   * @param gpio_num gpio_num GPIO number of the pad.
   * @param func The function number of the peripheral pin to output pin.
   *        One of the ``FUNC_X_*`` of specified pin (X) in ``soc/io_mux_reg.h``.
-  * @param oen_inv True if the output enable needs to be inverted, otherwise False.
   */
-#define gpio_hal_iomux_out(hal, gpio_num, func, oen_inv) gpio_ll_iomux_out((hal)->dev, gpio_num, func, oen_inv)
+#define gpio_hal_iomux_out(hal, gpio_num, func) gpio_ll_iomux_out((hal)->dev, gpio_num, func)
 
 #if SOC_GPIO_SUPPORT_FORCE_HOLD
 /**