diff --git a/components/driver/test/test_spi_bus_lock.c b/components/driver/test/test_spi_bus_lock.c
index 366a3cd981..469b43bce6 100644
--- a/components/driver/test/test_spi_bus_lock.c
+++ b/components/driver/test/test_spi_bus_lock.c
@@ -237,7 +237,6 @@ static void test_bus_lock(bool test_flash)
         .io_mode = SPI_FLASH_DIO,
         .speed = ESP_FLASH_5MHZ,
         .input_delay_ns = 0,
-        .cs_setup = 1,
     };
 
     //Clamp the WP and HD pins to VDD to make it work in DIO mode
diff --git a/components/spi_flash/include/esp_flash_spi_init.h b/components/spi_flash/include/esp_flash_spi_init.h
index e586a8778c..85334d3ea5 100644
--- a/components/spi_flash/include/esp_flash_spi_init.h
+++ b/components/spi_flash/include/esp_flash_spi_init.h
@@ -34,7 +34,6 @@ typedef struct {
      * automatically assigned by the SPI bus lock.
      */
     int cs_id;
-    uint32_t cs_setup;              ///< (cycles-1) of prepare phase by spi clock
 } esp_flash_spi_device_config_t;
 
 /**
diff --git a/components/spi_flash/test/test_esp_flash.c b/components/spi_flash/test/test_esp_flash.c
index 4f8b5bfd8e..d61294040a 100644
--- a/components/spi_flash/test/test_esp_flash.c
+++ b/components/spi_flash/test/test_esp_flash.c
@@ -177,7 +177,6 @@ static const char TAG[] = "test_esp_flash";
         /* the pin which is usually used by the PSRAM */ \
         .cs_io_num = SPI1_CS_IO, \
         .input_delay_ns = 0, \
-        .cs_setup = 1,\
     }
 
 #if CONFIG_IDF_TARGET_ESP32
@@ -200,7 +199,6 @@ flashtest_config_t config_list[] = {
         .cs_id = 0,
         .cs_io_num = VSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
-        .cs_setup = 1,\
     },
 };
 #elif CONFIG_IDF_TARGET_ESP32S2
@@ -213,7 +211,6 @@ flashtest_config_t config_list[] = {
         .cs_id = 0,
         .cs_io_num = FSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
-        .cs_setup = 1,\
     },
     {
         .io_mode = TEST_SPI_READ_MODE,
@@ -223,7 +220,6 @@ flashtest_config_t config_list[] = {
         // uses GPIO matrix on esp32s2 regardless of FORCE_GPIO_MATRIX
         .cs_io_num = HSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
-        .cs_setup = 1,\
     },
 };
 #elif CONFIG_IDF_TARGET_ESP32S3
@@ -237,7 +233,6 @@ flashtest_config_t config_list[] = {
         .cs_id = 0,
         .cs_io_num = FSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
-        .cs_setup = 1,\
     },
 };
 #elif CONFIG_IDF_TARGET_ESP32C3
@@ -254,7 +249,6 @@ flashtest_config_t config_list[] = {
         .cs_id = 0,
         .cs_io_num = FSPI_PIN_NUM_CS,
         .input_delay_ns = 0,
-        .cs_setup = 1,\
     },
 };
 #endif
@@ -391,7 +385,6 @@ static void setup_new_chip(const flashtest_config_t* test_cfg, esp_flash_t** out
         .cs_id = test_cfg->cs_id,
         .cs_io_num = test_cfg->cs_io_num,
         .input_delay_ns = test_cfg->input_delay_ns,
-        .cs_setup = test_cfg->cs_setup,
     };
     esp_flash_t* init_chip;
     esp_err_t err = spi_bus_add_flash_device(&init_chip, &dev_cfg);
diff --git a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c
index d2b7d9b312..608dad502b 100644
--- a/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c
+++ b/examples/storage/ext_flash_fatfs/main/ext_flash_fatfs_example_main.c
@@ -103,8 +103,7 @@ static esp_flash_t* example_init_ext_flash(void)
         .cs_id = 0,
         .cs_io_num = VSPI_IOMUX_PIN_NUM_CS,
         .io_mode = SPI_FLASH_DIO,
-        .speed = ESP_FLASH_40MHZ,
-        .cs_setup = 1,
+        .speed = ESP_FLASH_40MHZ
     };
 
     ESP_LOGI(TAG, "Initializing external SPI Flash");