diff --git a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
index 371d4be6a7..add5bdf33a 100644
--- a/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
+++ b/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32h2.c
@@ -135,7 +135,7 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
         str = "16MHz";
         break;
     }
-    ESP_LOGI(TAG, "SPI Speed      : %s", str);
+    ESP_EARLY_LOGI(TAG, "SPI Speed      : %s", str);
 
     /* SPI mode could have been set to QIO during boot already,
        so test the SPI registers not the flash header */
@@ -153,7 +153,7 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
     } else {
         str = "SLOW READ";
     }
-    ESP_LOGI(TAG, "SPI Mode       : %s", str);
+    ESP_EARLY_LOGI(TAG, "SPI Mode       : %s", str);
 
     switch (bootloader_hdr->spi_size) {
     case ESP_IMAGE_FLASH_SIZE_1MB:
@@ -175,7 +175,7 @@ static void print_flash_info(const esp_image_header_t *bootloader_hdr)
         str = "2MB";
         break;
     }
-    ESP_LOGI(TAG, "SPI Flash Size : %s", str);
+    ESP_EARLY_LOGI(TAG, "SPI Flash Size : %s", str);
 }
 
 static void IRAM_ATTR bootloader_init_flash_configure(void)
diff --git a/components/bootloader_support/src/esp32/bootloader_esp32.c b/components/bootloader_support/src/esp32/bootloader_esp32.c
index c2313b9f6e..30c94cfdc7 100644
--- a/components/bootloader_support/src/esp32/bootloader_esp32.c
+++ b/components/bootloader_support/src/esp32/bootloader_esp32.c
@@ -39,7 +39,7 @@
 
 static const char *TAG = "boot.esp32";
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 static void bootloader_reset_mmu(void)
 {
     /* completely reset MMU in case serial bootloader was running */
@@ -67,7 +67,7 @@ static void bootloader_reset_mmu(void)
     DPORT_REG_CLR_BIT(DPORT_APP_CACHE_CTRL1_REG, DPORT_APP_CACHE_MASK_DROM0);
 #endif
 }
-#endif //!CONFIG_APP_BUILD_TYPE_RAM
+#endif //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
 static esp_err_t bootloader_check_rated_cpu_clock(void)
 {
@@ -208,7 +208,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     // reset MMU
     bootloader_reset_mmu();
     // update flash ID
@@ -218,6 +218,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -226,11 +227,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // #if !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // #if !CONFIG_APP_BUILD_TYPE_RAM
+#endif  //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
index bac2b8bc10..ca254e559d 100644
--- a/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
+++ b/components/bootloader_support/src/esp32c2/bootloader_esp32c2.c
@@ -110,7 +110,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();
     //reset mmu
@@ -119,6 +119,7 @@ esp_err_t bootloader_init(void)
     mmu_ll_set_page_size(0, SPI_FLASH_MMU_PAGE_SIZE);
     // update flash ID
     bootloader_flash_update_id();
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -127,11 +128,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif  //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
index 1a7a8097b1..9c92a6a253 100644
--- a/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
+++ b/components/bootloader_support/src/esp32c3/bootloader_esp32c3.c
@@ -158,7 +158,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();
     //reset mmu
@@ -170,6 +170,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -178,11 +179,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif  //#if !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif // !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c b/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
index 6087afebc7..f73d5b6cb8 100644
--- a/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
+++ b/components/bootloader_support/src/esp32c6/bootloader_esp32c6.c
@@ -166,7 +166,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();
     //reset mmu
@@ -180,6 +180,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -188,11 +189,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
index a48149be9e..3bb04ebbc9 100644
--- a/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
+++ b/components/bootloader_support/src/esp32h2/bootloader_esp32h2.c
@@ -156,7 +156,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();
     //reset mmu
@@ -170,6 +170,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -178,11 +179,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif  //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c b/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
index ef7cf34687..fca0cfa2d8 100644
--- a/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
+++ b/components/bootloader_support/src/esp32h4/bootloader_esp32h4.c
@@ -117,7 +117,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();   //TODO IDF-4649
     //reset mmu
@@ -129,6 +129,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -137,11 +138,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
index c3a25ef54e..b960b9b33c 100644
--- a/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
+++ b/components/bootloader_support/src/esp32s2/bootloader_esp32s2.c
@@ -139,7 +139,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     // init cache hal
     cache_hal_init();
     // reset mmu
@@ -153,6 +153,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -161,11 +162,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
index 31a36b8098..5fba0cdd6c 100644
--- a/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
+++ b/components/bootloader_support/src/esp32s3/bootloader_esp32s3.c
@@ -177,7 +177,7 @@ esp_err_t bootloader_init(void)
     /* print 2nd bootloader banner */
     bootloader_print_banner();
 
-#if !CONFIG_APP_BUILD_TYPE_RAM
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
     //init cache hal
     cache_hal_init();
     //reset mmu
@@ -189,6 +189,7 @@ esp_err_t bootloader_init(void)
         ESP_LOGE(TAG, "failed when running XMC startup flow, reboot!");
         return ret;
     }
+#if !CONFIG_APP_BUILD_TYPE_RAM
     // read bootloader header
     if ((ret = bootloader_read_bootloader_header()) != ESP_OK) {
         return ret;
@@ -197,11 +198,12 @@ esp_err_t bootloader_init(void)
     if ((ret = bootloader_check_bootloader_validity()) != ESP_OK) {
         return ret;
     }
+#endif // !CONFIG_APP_BUILD_TYPE_RAM
     // initialize spi flash
     if ((ret = bootloader_init_spi_flash()) != ESP_OK) {
         return ret;
     }
-#endif // !CONFIG_APP_BUILD_TYPE_RAM
+#endif // #if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
     // check whether a WDT reset happend
     bootloader_check_wdt_reset();
diff --git a/components/esp_rom/esp32c2/Kconfig.soc_caps.in b/components/esp_rom/esp32c2/Kconfig.soc_caps.in
index 49ad3e6c89..022578b6a3 100644
--- a/components/esp_rom/esp32c2/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32c2/Kconfig.soc_caps.in
@@ -58,3 +58,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32c2/esp_rom_caps.h b/components/esp_rom/esp32c2/esp_rom_caps.h
index 0f1b77fcd0..c62e783365 100644
--- a/components/esp_rom/esp32c2/esp_rom_caps.h
+++ b/components/esp_rom/esp32c2/esp_rom_caps.h
@@ -20,3 +20,4 @@
 #define ESP_ROM_HAS_SPI_FLASH               (1) // ROM has the implementation of SPI Flash driver
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/esp32c3/Kconfig.soc_caps.in b/components/esp_rom/esp32c3/Kconfig.soc_caps.in
index 66727ba21e..03b25e62ee 100644
--- a/components/esp_rom/esp32c3/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32c3/Kconfig.soc_caps.in
@@ -62,3 +62,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32c3/esp_rom_caps.h b/components/esp_rom/esp32c3/esp_rom_caps.h
index 06f2765cea..8ff06b7601 100644
--- a/components/esp_rom/esp32c3/esp_rom_caps.h
+++ b/components/esp_rom/esp32c3/esp_rom_caps.h
@@ -21,3 +21,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/esp32c6/Kconfig.soc_caps.in b/components/esp_rom/esp32c6/Kconfig.soc_caps.in
index 565d50aacf..9e23f349b7 100644
--- a/components/esp_rom/esp32c6/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32c6/Kconfig.soc_caps.in
@@ -74,3 +74,7 @@ config ESP_ROM_WDT_INIT_PATCH
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32c6/esp_rom_caps.h b/components/esp_rom/esp32c6/esp_rom_caps.h
index 46cebc153b..1ec2d87239 100644
--- a/components/esp_rom/esp32c6/esp_rom_caps.h
+++ b/components/esp_rom/esp32c6/esp_rom_caps.h
@@ -24,3 +24,4 @@
 #define ESP_ROM_REV0_HAS_NO_ECDSA_INTERFACE (1) // ECO 0 does not have ets_ecdsa_verify symbol, future revision will have it
 #define ESP_ROM_WDT_INIT_PATCH              (1) // ROM version does not configure the clock
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/esp32h2/Kconfig.soc_caps.in b/components/esp_rom/esp32h2/Kconfig.soc_caps.in
index 0e0ffe6666..a5b8f87971 100644
--- a/components/esp_rom/esp32h2/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32h2/Kconfig.soc_caps.in
@@ -62,3 +62,7 @@ config ESP_ROM_WDT_INIT_PATCH
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32h2/esp_rom_caps.h b/components/esp_rom/esp32h2/esp_rom_caps.h
index ab907de2a3..321ab91b8e 100644
--- a/components/esp_rom/esp32h2/esp_rom_caps.h
+++ b/components/esp_rom/esp32h2/esp_rom_caps.h
@@ -21,3 +21,4 @@
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano versions of formatting functions
 #define ESP_ROM_WDT_INIT_PATCH              (1) // ROM version does not configure the clock
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/esp32h4/Kconfig.soc_caps.in b/components/esp_rom/esp32h4/Kconfig.soc_caps.in
index 819d7f3757..b8f83cc125 100644
--- a/components/esp_rom/esp32h4/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32h4/Kconfig.soc_caps.in
@@ -54,3 +54,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32h4/esp_rom_caps.h b/components/esp_rom/esp32h4/esp_rom_caps.h
index 52bb54d36b..30336691dc 100644
--- a/components/esp_rom/esp32h4/esp_rom_caps.h
+++ b/components/esp_rom/esp32h4/esp_rom_caps.h
@@ -19,3 +19,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/esp32s3/Kconfig.soc_caps.in b/components/esp_rom/esp32s3/Kconfig.soc_caps.in
index f64587e996..5216a3d2e0 100644
--- a/components/esp_rom/esp32s3/Kconfig.soc_caps.in
+++ b/components/esp_rom/esp32s3/Kconfig.soc_caps.in
@@ -66,3 +66,7 @@ config ESP_ROM_HAS_NEWLIB_NANO_FORMAT
 config ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE
     bool
     default y
+
+config ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    bool
+    default y
diff --git a/components/esp_rom/esp32s3/esp_rom_caps.h b/components/esp_rom/esp32s3/esp_rom_caps.h
index a7c0460da9..682f37b464 100644
--- a/components/esp_rom/esp32s3/esp_rom_caps.h
+++ b/components/esp_rom/esp32s3/esp_rom_caps.h
@@ -22,3 +22,4 @@
 #define ESP_ROM_HAS_ETS_PRINTF_BUG          (1) // ROM has ets_printf bug when disable the ROM log either by eFuse or RTC storage register
 #define ESP_ROM_HAS_NEWLIB_NANO_FORMAT      (1) // ROM has the newlib nano version of formatting functions
 #define ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE    (1) // ROM needs to set cache MMU size according to instruction and rodata for flash mmap
+#define ESP_ROM_RAM_APP_NEEDS_MMU_INIT      (1) // ROM doesn't init cache MMU when it's a RAM APP, needs MMU hal to init
diff --git a/components/esp_rom/include/esp32c2/rom/cache.h b/components/esp_rom/include/esp32c2/rom/cache.h
index ccde7d8a07..51e38469be 100644
--- a/components/esp_rom/include/esp32c2/rom/cache.h
+++ b/components/esp_rom/include/esp32c2/rom/cache.h
@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *
diff --git a/components/esp_rom/include/esp32c3/rom/cache.h b/components/esp_rom/include/esp32c3/rom/cache.h
index 8e4bbb9acd..148f47427f 100644
--- a/components/esp_rom/include/esp32c3/rom/cache.h
+++ b/components/esp_rom/include/esp32c3/rom/cache.h
@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *
diff --git a/components/esp_rom/include/esp32c6/rom/cache.h b/components/esp_rom/include/esp32c6/rom/cache.h
index 53c228ef47..15663f2ed1 100644
--- a/components/esp_rom/include/esp32c6/rom/cache.h
+++ b/components/esp_rom/include/esp32c6/rom/cache.h
@@ -165,6 +165,15 @@ extern const cache_op_cb_t* rom_cache_op_cb;
   */
 void Cache_MMU_Init(void);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing MMU, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Set ICache mmu mapping.
   *        Please do not call this function in your SDK application.
diff --git a/components/esp_rom/include/esp32h2/rom/cache.h b/components/esp_rom/include/esp32h2/rom/cache.h
index e253e91d32..bbda694c1a 100644
--- a/components/esp_rom/include/esp32h2/rom/cache.h
+++ b/components/esp_rom/include/esp32h2/rom/cache.h
@@ -169,6 +169,15 @@ extern const cache_op_cb_t* rom_cache_op_cb;
   */
 void Cache_MMU_Init(void);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing MMU, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Set ICache mmu mapping.
   *        Please do not call this function in your SDK application.
diff --git a/components/esp_rom/include/esp32h4/rom/cache.h b/components/esp_rom/include/esp32h4/rom/cache.h
index 7295ed82f6..4bf5b854c5 100644
--- a/components/esp_rom/include/esp32h4/rom/cache.h
+++ b/components/esp_rom/include/esp32h4/rom/cache.h
@@ -269,6 +269,15 @@ void Cache_Occupy_ICache_MEMORY(cache_array_t icache_low);
   */
 void Cache_Get_Mode(struct cache_mode * mode);
 
+/**
+  * @brief Init Cache for ROM boot, including resetting the Icache, initializing Owner, MMU, setting ICache mode, Enabling ICache, unmasking bus.
+  *
+  * @param None
+  *
+  * @return None
+  */
+void ROM_Boot_Cache_Init(void);
+
 /**
   * @brief Init mmu owner register to make i/d cache use half mmu entries.
   *
diff --git a/components/esp_rom/include/esp32s3/rom/cache.h b/components/esp_rom/include/esp32s3/rom/cache.h
index 8cf46815d3..74db8bde53 100644
--- a/components/esp_rom/include/esp32s3/rom/cache.h
+++ b/components/esp_rom/include/esp32s3/rom/cache.h
@@ -391,6 +391,15 @@ uint32_t Cache_Address_Through_DCache(uint32_t addr);
   *
   * @return None
   */
+void ROM_Boot_Cache_Init(void);
+
+/**
+  * @brief Init mmu owner register to make i/d cache use half mmu entries.
+  *
+  * @param None
+  *
+  * @return None
+  */
 void Cache_Owner_Init(void);
 
 /**
diff --git a/components/hal/mmu_hal.c b/components/hal/mmu_hal.c
index d6101599ad..3f31259bfb 100644
--- a/components/hal/mmu_hal.c
+++ b/components/hal/mmu_hal.c
@@ -12,9 +12,14 @@
 #include "hal/assert.h"
 #include "hal/mmu_hal.h"
 #include "hal/mmu_ll.h"
+#include "rom/cache.h"
 
 void mmu_hal_init(void)
 {
+#if CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT
+    ROM_Boot_Cache_Init();
+#endif
+
     mmu_ll_unmap_all(0);
 #if !CONFIG_FREERTOS_UNICORE
     mmu_ll_unmap_all(1);
diff --git a/tools/test_apps/system/ram_loadable_app/conftest.py b/tools/test_apps/system/ram_loadable_app/conftest.py
deleted file mode 100644
index 5c99c8eb50..0000000000
--- a/tools/test_apps/system/ram_loadable_app/conftest.py
+++ /dev/null
@@ -1,22 +0,0 @@
-# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
-# SPDX-License-Identifier: Apache-2.0
-
-# pylint: disable=W0621  # redefined-outer-name
-
-import pytest
-from _pytest.fixtures import FixtureRequest
-from _pytest.monkeypatch import MonkeyPatch
-from test_ram_loadable_app_util.loadable_app_serial import LoadableAppSerial
-
-
-@pytest.fixture(scope='module')
-def monkeypatch_module(request: FixtureRequest) -> MonkeyPatch:
-    mp = MonkeyPatch()
-    request.addfinalizer(mp.undo)
-    return mp
-
-
-@pytest.fixture(scope='module', autouse=True)
-def replace_dut_class(monkeypatch_module: MonkeyPatch) -> None:
-    monkeypatch_module.setattr('pytest_embedded_idf.serial.IdfSerial', LoadableAppSerial)
-    monkeypatch_module.setattr('pytest_embedded_idf.IdfSerial', LoadableAppSerial)
diff --git a/tools/test_apps/system/ram_loadable_app/main/CMakeLists.txt b/tools/test_apps/system/ram_loadable_app/main/CMakeLists.txt
index a2342d3e36..5d72a371fc 100644
--- a/tools/test_apps/system/ram_loadable_app/main/CMakeLists.txt
+++ b/tools/test_apps/system/ram_loadable_app/main/CMakeLists.txt
@@ -1,2 +1,2 @@
-idf_component_register(SRCS "ram_loadable_app_example_main.c"
+idf_component_register(SRCS "ram_loadable_app_test.c"
                     INCLUDE_DIRS "")
diff --git a/tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_example_main.c b/tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_test.c
similarity index 50%
rename from tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_example_main.c
rename to tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_test.c
index e1090b0ce6..6daa76aa67 100644
--- a/tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_example_main.c
+++ b/tools/test_apps/system/ram_loadable_app/main/ram_loadable_app_test.c
@@ -10,6 +10,32 @@
 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
 #include "esp_chip_info.h"
+#include "hal/mmu_hal.h"
+#include "soc/soc.h"
+
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
+
+#define TEST_SIZE     CONFIG_MMU_PAGE_SIZE
+#define TEST_PADDR    0x10000
+#define TEST_VADDR    SOC_DROM_LOW
+
+static void s_test_ext_vaddr(void)
+{
+    uint32_t actual_mapped_len = 0;
+    mmu_hal_map_region(0, MMU_TARGET_FLASH0, TEST_VADDR, TEST_PADDR, TEST_SIZE, &actual_mapped_len);
+    printf("actual_mapped_len is 0x%"PRIx32" bytes\n", actual_mapped_len);
+
+    /**
+     * we should work here, without any other Cache/MMU configs
+     * If you found here we need some Cache/MMU configs, you should fix it in the driver
+     */
+    for (int i = 0; i < TEST_SIZE; i = i+4) {
+        volatile uint32_t my_var = *(uint32_t *)(TEST_VADDR + i);
+        //we actually don't care the value, but we need to make sure above line won't lead to Cache/MMU error
+        assert(my_var || my_var == 0);
+    }
+}
+#endif //#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
 
 void app_main(void)
 {
@@ -24,12 +50,14 @@ void app_main(void)
            chip_info.cores,
            (chip_info.features & CHIP_FEATURE_BT) ? "/BT" : "",
            (chip_info.features & CHIP_FEATURE_BLE) ? "/BLE" : "");
-
     printf("silicon revision %d, ", chip_info.revision);
-
     printf("Minimum free heap size: %"PRIu32" bytes\n", esp_get_minimum_free_heap_size());
-
     printf("App is running in RAM !\n");
+
+#if !CONFIG_APP_BUILD_TYPE_PURE_RAM_APP
+    s_test_ext_vaddr();
+#endif
+
     uint32_t uptime = 0;
     while (1) {
         printf("Time since boot: %"PRIu32" seconds...\n", uptime++);
diff --git a/tools/test_apps/system/ram_loadable_app/test_ram_loadable_app_util/loadable_app_serial.py b/tools/test_apps/system/ram_loadable_app/test_ram_loadable_app_util/loadable_app_serial.py
deleted file mode 100644
index 9cb8ca4dfb..0000000000
--- a/tools/test_apps/system/ram_loadable_app/test_ram_loadable_app_util/loadable_app_serial.py
+++ /dev/null
@@ -1,54 +0,0 @@
-# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
-# SPDX-License-Identifier: Unlicense OR CC0-1.0
-import logging
-from typing import Any, Optional
-
-import esptool
-from pytest_embedded_idf.app import IdfApp
-from pytest_embedded_serial_esp.serial import EspSerial, EsptoolArgs
-
-
-class LoadableAppSerial(EspSerial):
-    def __init__(
-        self,
-        app: IdfApp,
-        target: Optional[str] = None,
-        **kwargs: Any,
-    ) -> None:
-        self.app = app
-        self.app.bin_file = self.app._get_bin_file()
-
-        if not hasattr(self.app, 'target'):
-            raise ValueError(f'Idf app not parsable. Please check if it\'s valid: {self.app.binary_path}')
-
-        if target and self.app.target and self.app.target != target:
-            raise ValueError(f'Targets do not match. App target: {self.app.target}, Cmd target: {target}.')
-
-        super().__init__(
-            target=target or app.target,
-            **kwargs,
-        )
-
-    def _start(self) -> None:
-        self.load_ram()
-
-    @EspSerial.use_esptool(hard_reset_after=False, no_stub=True)
-    def load_ram(self) -> None:
-        if not self.app.bin_file:
-            logging.error('No image file detected. Skipping load ram...')
-            return
-
-        f_bin_file = open(self.app.bin_file, 'rb')
-
-        default_kwargs = {
-            'filename': f_bin_file,
-            'chip': self.esp.CHIP_NAME.lower().replace('-', ''),
-        }
-
-        load_ram_args = EsptoolArgs(**default_kwargs)
-
-        try:
-            self.esp.change_baud(460800)
-            esptool.load_ram(self.esp, load_ram_args)
-        finally:
-            f_bin_file.close()