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https://github.com/espressif/esp-idf.git
synced 2025-11-02 16:11:41 +01:00
SHA: add HAL layer and refactor driver
Add a LL and HAL layer for SHA.
This commit is contained in:
224
components/mbedtls/port/sha/parallel_engine/sha.c
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224
components/mbedtls/port/sha/parallel_engine/sha.c
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/*
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* ESP32 hardware accelerated SHA1/256/512 implementation
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* based on mbedTLS FIPS-197 compliant version.
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*
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* Copyright (C) 2006-2015, ARM Limited, All Rights Reserved
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* Additions Copyright (C) 2016, Espressif Systems (Shanghai) PTE Ltd
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*
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*/
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/*
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* The SHA-1 standard was published by NIST in 1993.
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*
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* http://www.itl.nist.gov/fipspubs/fip180-1.htm
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*/
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#include <string.h>
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#include <stdio.h>
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#include <machine/endian.h>
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#include <assert.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "hal/sha_hal.h"
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#include "hal/sha_types.h"
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#include "sha/sha_parallel_engine.h"
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#include "soc/hwcrypto_periph.h"
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#include "driver/periph_ctrl.h"
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/*
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Single spinlock for SHA engine memory block
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*/
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static portMUX_TYPE memory_block_lock = portMUX_INITIALIZER_UNLOCKED;
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/* Binary semaphore managing the state of each concurrent SHA engine.
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Available = noone is using this SHA engine
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Taken = a SHA session is running on this SHA engine
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Indexes:
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0 = SHA1
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1 = SHA2_256
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2 = SHA2_384 or SHA2_512
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*/
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static SemaphoreHandle_t engine_states[3];
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static uint8_t engines_in_use;
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/* Spinlock for engines_in_use counter
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*/
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static portMUX_TYPE engines_in_use_lock = portMUX_INITIALIZER_UNLOCKED;
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/* Return block size (in words) for a given SHA type */
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inline static size_t block_length(esp_sha_type type)
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{
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switch (type) {
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case SHA1:
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case SHA2_256:
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return 64 / 4;
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case SHA2_384:
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case SHA2_512:
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return 128 / 4;
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default:
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return 0;
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}
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}
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/* Index into the engine_states array */
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inline static size_t sha_engine_index(esp_sha_type type)
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{
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switch (type) {
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case SHA1:
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return 0;
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case SHA2_256:
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return 1;
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default:
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return 2;
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}
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}
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void esp_sha_lock_memory_block(void)
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{
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portENTER_CRITICAL(&memory_block_lock);
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}
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void esp_sha_unlock_memory_block(void)
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{
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portEXIT_CRITICAL(&memory_block_lock);
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}
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static SemaphoreHandle_t sha_get_engine_state(esp_sha_type sha_type)
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{
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unsigned idx = sha_engine_index(sha_type);
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volatile SemaphoreHandle_t *engine = &engine_states[idx];
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SemaphoreHandle_t result = *engine;
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uint32_t set_engine = 0;
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if (result == NULL) {
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// Create a new semaphore for 'in use' flag
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SemaphoreHandle_t new_engine = xSemaphoreCreateBinary();
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assert(new_engine != NULL);
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xSemaphoreGive(new_engine); // start available
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// try to atomically set the previously NULL *engine to new_engine
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set_engine = (uint32_t)new_engine;
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uxPortCompareSet((volatile uint32_t *)engine, 0, &set_engine);
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if (set_engine != 0) { // we lost a race setting *engine
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vSemaphoreDelete(new_engine);
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}
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result = *engine;
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}
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return result;
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}
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static bool esp_sha_lock_engine_common(esp_sha_type sha_type, TickType_t ticks_to_wait);
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bool esp_sha_try_lock_engine(esp_sha_type sha_type)
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{
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return esp_sha_lock_engine_common(sha_type, 0);
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}
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void esp_sha_lock_engine(esp_sha_type sha_type)
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{
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esp_sha_lock_engine_common(sha_type, portMAX_DELAY);
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}
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static bool esp_sha_lock_engine_common(esp_sha_type sha_type, TickType_t ticks_to_wait)
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{
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SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
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BaseType_t result = xSemaphoreTake(engine_state, ticks_to_wait);
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if (result == pdFALSE) {
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// failed to take semaphore
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return false;
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}
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portENTER_CRITICAL(&engines_in_use_lock);
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if (engines_in_use == 0) {
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/* Just locked first engine,
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so enable SHA hardware */
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periph_module_enable(PERIPH_SHA_MODULE);
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}
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engines_in_use++;
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assert(engines_in_use <= 3);
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portEXIT_CRITICAL(&engines_in_use_lock);
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return true;
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}
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void esp_sha_unlock_engine(esp_sha_type sha_type)
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{
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SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
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portENTER_CRITICAL(&engines_in_use_lock);
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engines_in_use--;
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if (engines_in_use == 0) {
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/* About to release last engine, so
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disable SHA hardware */
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periph_module_disable(PERIPH_SHA_MODULE);
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}
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portEXIT_CRITICAL(&engines_in_use_lock);
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xSemaphoreGive(engine_state);
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}
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void esp_sha_read_digest_state(esp_sha_type sha_type, void *digest_state)
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{
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#ifndef NDEBUG
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{
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SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
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assert(uxSemaphoreGetCount(engine_state) == 0 &&
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"SHA engine should be locked" );
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}
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#endif
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// preemptively do this before entering the critical section, then re-check once in it
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sha_hal_wait_idle();
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esp_sha_lock_memory_block();
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sha_hal_read_digest(sha_type, digest_state);
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esp_sha_unlock_memory_block();
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}
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void esp_sha_block(esp_sha_type sha_type, const void *data_block, bool first_block)
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{
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#ifndef NDEBUG
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{
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SemaphoreHandle_t engine_state = sha_get_engine_state(sha_type);
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assert(uxSemaphoreGetCount(engine_state) == 0 &&
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"SHA engine should be locked" );
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}
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#endif
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// preemptively do this before entering the critical section, then re-check once in it
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sha_hal_wait_idle();
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esp_sha_lock_memory_block();
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sha_hal_hash_block(sha_type, data_block, block_length(sha_type), first_block);
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esp_sha_unlock_memory_block();
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}
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