espressif/esp-idf
1
0
Fork 1
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-10 16:14:34 +02:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'refactor/update-esp_check-for-himem-rtcio' into 'master'

Browse Source 
rtc_io, esp_himem: replace XXX_CHECK with ESP_RETURN_ON_FALSE

Closes IDF-3669 and IDF-3035

See merge request espressif/esp-idf!14992
This commit is contained in:
Li Hang Fan
2021-08-30 07:10:31 +00:00
parent 32f4138c6b 55a5c444b5
commit 9625f0618f
2 changed files with 41 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

50
components/driver/rtc_io.c
View File

@@ -7,6 +7,7 @@
#include <string.h> #include <string.h>
#include "esp_log.h" #include "esp_log.h"
#include "esp_err.h" #include "esp_err.h"
#include "esp_check.h"
#include "freertos/FreeRTOS.h" #include "freertos/FreeRTOS.h"
#include "freertos/semphr.h" #include "freertos/semphr.h"
#include "freertos/timers.h" #include "freertos/timers.h"
@@ -15,13 +16,6 @@
static const char __attribute__((__unused__)) *RTCIO_TAG = "RTCIO"; static const char __attribute__((__unused__)) *RTCIO_TAG = "RTCIO";
#define RTCIO_CHECK(a, str, ret_val) ({ \
if (!(a)) { \
ESP_LOGE(RTCIO_TAG,"%s(%d): %s", __FUNCTION__, __LINE__, str); \
return (ret_val); \
} \
})
extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished. extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate position after the rtc module is finished.
#define RTCIO_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock) #define RTCIO_ENTER_CRITICAL() portENTER_CRITICAL(&rtc_spinlock)
#define RTCIO_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock) #define RTCIO_EXIT_CRITICAL() portEXIT_CRITICAL(&rtc_spinlock)
@@ -33,7 +27,7 @@ extern portMUX_TYPE rtc_spinlock; //TODO: Will be placed in the appropriate posi
---------------------------------------------------------------*/ ---------------------------------------------------------------*/
esp_err_t rtc_gpio_init(gpio_num_t gpio_num) esp_err_t rtc_gpio_init(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_RTC); rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_RTC);
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -43,7 +37,7 @@ esp_err_t rtc_gpio_init(gpio_num_t gpio_num)
esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num) esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
// Select Gpio as Digital Gpio // Select Gpio as Digital Gpio
rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_DIGITAL); rtcio_hal_function_select(rtc_io_number_get(gpio_num), RTCIO_FUNC_DIGITAL);
@@ -54,7 +48,7 @@ esp_err_t rtc_gpio_deinit(gpio_num_t gpio_num)
esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level) esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_set_level(rtc_io_number_get(gpio_num), level); rtcio_hal_set_level(rtc_io_number_get(gpio_num), level);
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -64,15 +58,15 @@ esp_err_t rtc_gpio_set_level(gpio_num_t gpio_num, uint32_t level)
uint32_t rtc_gpio_get_level(gpio_num_t gpio_num) uint32_t rtc_gpio_get_level(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
return rtcio_hal_get_level(rtc_io_number_get(gpio_num)); return rtcio_hal_get_level(rtc_io_number_get(gpio_num));
} }
esp_err_t rtc_gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength) esp_err_t rtc_gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "Output pad only", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "Output pad only");
RTCIO_CHECK(strength < GPIO_DRIVE_CAP_MAX, "RTCIO drive capability error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(strength < GPIO_DRIVE_CAP_MAX, ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO drive capability error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_set_drive_capability(rtc_io_number_get(gpio_num), strength); rtcio_hal_set_drive_capability(rtc_io_number_get(gpio_num), strength);
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -82,9 +76,9 @@ esp_err_t rtc_gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t st
esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *strength) esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *strength)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_CHECK(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), "Output pad only", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(GPIO_IS_VALID_OUTPUT_GPIO(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "Output pad only");
RTCIO_CHECK(strength != NULL, "GPIO drive pointer error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(strength != NULL, ESP_ERR_INVALID_ARG, RTCIO_TAG, "GPIO drive pointer error");
*strength = (gpio_drive_cap_t)rtcio_hal_get_drive_capability(rtc_io_number_get(gpio_num)); *strength = (gpio_drive_cap_t)rtcio_hal_get_drive_capability(rtc_io_number_get(gpio_num));
return ESP_OK; return ESP_OK;
@@ -92,7 +86,7 @@ esp_err_t rtc_gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *s
esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode) esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_set_direction(rtc_io_number_get(gpio_num), mode); rtcio_hal_set_direction(rtc_io_number_get(gpio_num), mode);
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -102,7 +96,7 @@ esp_err_t rtc_gpio_set_direction(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t mode) esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t mode)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_set_direction_in_sleep(rtc_io_number_get(gpio_num), mode); rtcio_hal_set_direction_in_sleep(rtc_io_number_get(gpio_num), mode);
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -112,7 +106,7 @@ esp_err_t rtc_gpio_set_direction_in_sleep(gpio_num_t gpio_num, rtc_gpio_mode_t m
esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num) esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_pullup_enable(rtc_io_number_get(gpio_num)); rtcio_hal_pullup_enable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -122,7 +116,7 @@ esp_err_t rtc_gpio_pullup_en(gpio_num_t gpio_num)
esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num) esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_pullup_disable(rtc_io_number_get(gpio_num)); rtcio_hal_pullup_disable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -132,7 +126,7 @@ esp_err_t rtc_gpio_pullup_dis(gpio_num_t gpio_num)
esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num) esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_pulldown_enable(rtc_io_number_get(gpio_num)); rtcio_hal_pulldown_enable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -142,7 +136,7 @@ esp_err_t rtc_gpio_pulldown_en(gpio_num_t gpio_num)
esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num) esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_pulldown_disable(rtc_io_number_get(gpio_num)); rtcio_hal_pulldown_disable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -156,7 +150,7 @@ esp_err_t rtc_gpio_pulldown_dis(gpio_num_t gpio_num)
esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num) esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_hold_enable(rtc_io_number_get(gpio_num)); rtcio_hal_hold_enable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -165,7 +159,7 @@ esp_err_t rtc_gpio_hold_en(gpio_num_t gpio_num)
esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num) esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_hold_disable(rtc_io_number_get(gpio_num)); rtcio_hal_hold_disable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -174,7 +168,7 @@ esp_err_t rtc_gpio_hold_dis(gpio_num_t gpio_num)
esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num) esp_err_t rtc_gpio_isolate(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_isolate(rtc_io_number_get(gpio_num)); rtcio_hal_isolate(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();
@@ -206,7 +200,7 @@ esp_err_t rtc_gpio_force_hold_dis_all(void)
esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type) esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) { if (intr_type == GPIO_INTR_POSEDGE || intr_type == GPIO_INTR_NEGEDGE || intr_type == GPIO_INTR_ANYEDGE) {
return ESP_ERR_INVALID_ARG; // Dont support this mode. return ESP_ERR_INVALID_ARG; // Dont support this mode.
} }
@@ -218,7 +212,7 @@ esp_err_t rtc_gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)
esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num) esp_err_t rtc_gpio_wakeup_disable(gpio_num_t gpio_num)
{ {
RTCIO_CHECK(rtc_gpio_is_valid_gpio(gpio_num), "RTCIO number error", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, RTCIO_TAG, "RTCIO number error");
RTCIO_ENTER_CRITICAL(); RTCIO_ENTER_CRITICAL();
rtcio_hal_wakeup_disable(rtc_io_number_get(gpio_num)); rtcio_hal_wakeup_disable(rtc_io_number_get(gpio_num));
RTCIO_EXIT_CRITICAL(); RTCIO_EXIT_CRITICAL();

39
components/esp_hw_support/port/esp32/esp_himem.c
View File

@@ -12,6 +12,7 @@
#include "esp32/himem.h" #include "esp32/himem.h"
#include "soc/soc.h" #include "soc/soc.h"
#include "esp_log.h" #include "esp_log.h"
#include "esp_check.h"
/* /*
So, why does the API look this way and is so inflexible to not allow any maps beyond the full 32K chunks? Most of So, why does the API look this way and is so inflexible to not allow any maps beyond the full 32K chunks? Most of
@@ -56,8 +57,6 @@ peripheral. This needs support for SPI1 to be in the SPI driver, however.
#define TAG "esp_himem" #define TAG "esp_himem"
#define HIMEM_CHECK(cond, str, err) if (cond) do {ESP_LOGE(TAG, "%s: %s", __FUNCTION__, str); return err; } while(0)
// Metadata for a block of physical RAM // Metadata for a block of physical RAM
typedef struct { typedef struct {
unsigned int is_alloced: 1; unsigned int is_alloced: 1;
@@ -134,10 +133,10 @@ void __attribute__((constructor)) esp_himem_init(void)
if (SPIRAM_BANKSWITCH_RESERVE == 0) return; if (SPIRAM_BANKSWITCH_RESERVE == 0) return;
int maxram=esp_spiram_get_size(); int maxram=esp_spiram_get_size();
//catch double init //catch double init
HIMEM_CHECK(s_ram_descriptor != NULL, "already initialized", ); //Looks weird; last arg is empty so it expands to 'return ;' ESP_RETURN_ON_FALSE(s_ram_descriptor != NULL, , TAG, "already initialized"); //Looks weird; last arg is empty so it expands to 'return ;'
HIMEM_CHECK(s_range_descriptor != NULL, "already initialized", ); ESP_RETURN_ON_FALSE(s_range_descriptor != NULL, , TAG, "already initialized");
//need to have some reserved banks //need to have some reserved banks
HIMEM_CHECK(SPIRAM_BANKSWITCH_RESERVE == 0, "No banks reserved for himem", ); ESP_RETURN_ON_FALSE(SPIRAM_BANKSWITCH_RESERVE == 0, , TAG, "No banks reserved for himem");
//Start and end of physical reserved memory. Note it starts slightly under //Start and end of physical reserved memory. Note it starts slightly under
//the 4MiB mark as the reserved banks can't have an unity mapping to be used by malloc //the 4MiB mark as the reserved banks can't have an unity mapping to be used by malloc
//anymore; we treat them as himem instead. //anymore; we treat them as himem instead.
@@ -219,7 +218,7 @@ esp_err_t esp_himem_free(esp_himem_handle_t handle)
//Check if any of the blocks is still mapped; fail if this is the case. //Check if any of the blocks is still mapped; fail if this is the case.
for (int i = 0; i < handle->block_ct; i++) { for (int i = 0; i < handle->block_ct; i++) {
assert(ramblock_idx_valid(handle->block[i])); assert(ramblock_idx_valid(handle->block[i]));
HIMEM_CHECK(s_ram_descriptor[handle->block[i]].is_mapped, "block in range still mapped", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(s_ram_descriptor[handle->block[i]].is_mapped, ESP_ERR_INVALID_ARG, TAG, "block in range still mapped");
} }
//Mark blocks as free //Mark blocks as free
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL(&spinlock);
@@ -237,8 +236,8 @@ esp_err_t esp_himem_free(esp_himem_handle_t handle)
esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out) esp_err_t esp_himem_alloc_map_range(size_t size, esp_himem_rangehandle_t *handle_out)
{ {
HIMEM_CHECK(s_ram_descriptor == NULL, "Himem not available!", ESP_ERR_INVALID_STATE); ESP_RETURN_ON_FALSE(s_ram_descriptor == NULL, ESP_ERR_INVALID_STATE, TAG, "Himem not available!");
HIMEM_CHECK(size % CACHE_BLOCKSIZE != 0, "requested size not aligned to blocksize", ESP_ERR_INVALID_SIZE); ESP_RETURN_ON_FALSE(size % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_SIZE, TAG, "requested size not aligned to blocksize");
int blocks = size / CACHE_BLOCKSIZE; int blocks = size / CACHE_BLOCKSIZE;
esp_himem_rangedata_t *r = calloc(sizeof(esp_himem_rangedata_t), 1); esp_himem_rangedata_t *r = calloc(sizeof(esp_himem_rangedata_t), 1);
if (!r) { if (!r) {
@@ -280,7 +279,7 @@ esp_err_t esp_himem_free_map_range(esp_himem_rangehandle_t handle)
for (int i = 0; i < handle->block_ct; i++) { for (int i = 0; i < handle->block_ct; i++) {
assert(rangeblock_idx_valid(handle->block_start + i)); assert(rangeblock_idx_valid(handle->block_start + i));
assert(s_range_descriptor[i + handle->block_start].is_alloced == 1); //should be, if handle is valid assert(s_range_descriptor[i + handle->block_start].is_alloced == 1); //should be, if handle is valid
HIMEM_CHECK(s_range_descriptor[i + handle->block_start].is_mapped, "memory still mapped to range", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(s_range_descriptor[i + handle->block_start].is_mapped, ESP_ERR_INVALID_ARG, TAG, "memory still mapped to range");
} }
//We should be good to free this. Mark blocks as free. //We should be good to free this. Mark blocks as free.
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL(&spinlock);
@@ -298,19 +297,19 @@ esp_err_t esp_himem_map(esp_himem_handle_t handle, esp_himem_rangehandle_t range
int ram_block = ram_offset / CACHE_BLOCKSIZE; int ram_block = ram_offset / CACHE_BLOCKSIZE;
int range_block = range_offset / CACHE_BLOCKSIZE; int range_block = range_offset / CACHE_BLOCKSIZE;
int blockcount = len / CACHE_BLOCKSIZE; int blockcount = len / CACHE_BLOCKSIZE;
HIMEM_CHECK(s_ram_descriptor == NULL, "Himem not available!", ESP_ERR_INVALID_STATE); ESP_RETURN_ON_FALSE(s_ram_descriptor == NULL, ESP_ERR_INVALID_STATE, TAG, "Himem not available!");
//Offsets and length must be block-aligned //Offsets and length must be block-aligned
HIMEM_CHECK(ram_offset % CACHE_BLOCKSIZE != 0, "ram offset not aligned to blocksize", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(ram_offset % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_ARG, TAG, "ram offset not aligned to blocksize");
HIMEM_CHECK(range_offset % CACHE_BLOCKSIZE != 0, "range not aligned to blocksize", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(range_offset % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_ARG, TAG, "range not aligned to blocksize");
HIMEM_CHECK(len % CACHE_BLOCKSIZE != 0, "length not aligned to blocksize", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(len % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_ARG, TAG, "length not aligned to blocksize");
//ram and range should be within allocated range //ram and range should be within allocated range
HIMEM_CHECK(ram_block + blockcount > handle->block_ct, "args not in range of phys ram handle", ESP_ERR_INVALID_SIZE); ESP_RETURN_ON_FALSE(ram_block + blockcount > handle->block_ct, ESP_ERR_INVALID_SIZE, TAG, "args not in range of phys ram handle");
HIMEM_CHECK(range_block + blockcount > range->block_ct, "args not in range of range handle", ESP_ERR_INVALID_SIZE); ESP_RETURN_ON_FALSE(range_block + blockcount > range->block_ct, ESP_ERR_INVALID_SIZE, TAG, "args not in range of range handle");
//Check if ram blocks aren't already mapped, and if memory range is unmapped //Check if ram blocks aren't already mapped, and if memory range is unmapped
for (int i = 0; i < blockcount; i++) { for (int i = 0; i < blockcount; i++) {
HIMEM_CHECK(s_ram_descriptor[handle->block[i + ram_block]].is_mapped, "ram already mapped", ESP_ERR_INVALID_STATE); ESP_RETURN_ON_FALSE(s_ram_descriptor[handle->block[i + ram_block]].is_mapped, ESP_ERR_INVALID_STATE, TAG, "ram already mapped");
HIMEM_CHECK(s_range_descriptor[range->block_start + i + range_block].is_mapped, "range already mapped", ESP_ERR_INVALID_STATE); ESP_RETURN_ON_FALSE(s_range_descriptor[range->block_start + i + range_block].is_mapped, ESP_ERR_INVALID_STATE, TAG, "range already mapped");
} }
//Map and mark as mapped //Map and mark as mapped
@@ -339,9 +338,9 @@ esp_err_t esp_himem_unmap(esp_himem_rangehandle_t range, void *ptr, size_t len)
int range_offset = (uint32_t)ptr - VIRT_HIMEM_RANGE_START; int range_offset = (uint32_t)ptr - VIRT_HIMEM_RANGE_START;
int range_block = (range_offset / CACHE_BLOCKSIZE) - range->block_start; int range_block = (range_offset / CACHE_BLOCKSIZE) - range->block_start;
int blockcount = len / CACHE_BLOCKSIZE; int blockcount = len / CACHE_BLOCKSIZE;
HIMEM_CHECK(range_offset % CACHE_BLOCKSIZE != 0, "range offset not block-aligned", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(range_offset % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_ARG, TAG, "range offset not block-aligned");
HIMEM_CHECK(len % CACHE_BLOCKSIZE != 0, "map length not block-aligned", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(len % CACHE_BLOCKSIZE != 0, ESP_ERR_INVALID_ARG, TAG, "map length not block-aligned");
HIMEM_CHECK(range_block + blockcount > range->block_ct, "range out of bounds for handle", ESP_ERR_INVALID_ARG); ESP_RETURN_ON_FALSE(range_block + blockcount > range->block_ct, ESP_ERR_INVALID_ARG, TAG, "range out of bounds for handle");
portENTER_CRITICAL(&spinlock); portENTER_CRITICAL(&spinlock);
for (int i = 0; i < blockcount; i++) { for (int i = 0; i < blockcount; i++) {