fix(hal): correct the power up sequence for MPI/ECC peripherals in ESP32-C5

This commit is contained in:
Mahavir Jain
2024-06-20 10:41:20 +08:00
parent e0991facf5
commit 99b1e56500
12 changed files with 69 additions and 2 deletions

View File

@@ -12,6 +12,7 @@
#include "hal/ecc_types.h"
#include "soc/ecc_mult_reg.h"
#include "soc/pcr_struct.h"
#include "soc/pcr_reg.h"
#ifdef __cplusplus
extern "C" {
@@ -51,6 +52,20 @@ static inline void ecc_ll_reset_register(void)
#endif
}
static inline void ecc_ll_power_up(void)
{
/* Power up the ECC peripheral (default state is power-down) */
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
}
static inline void ecc_ll_power_down(void)
{
/* Power down the ECC peripheral */
REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU);
REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
}
static inline void ecc_ll_enable_interrupt(void)
{
REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);

View File

@@ -56,11 +56,15 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
static inline void mpi_ll_clear_power_control_bit(void)
{
/* Power up the MPI peripheral (default is power-down state) */
REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD);
}
static inline void mpi_ll_set_power_control_bit(void)
{
/* Power down the MPI peripheral */
REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU);
REG_SET_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
}