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fix(hal): correct the power up sequence for MPI/ECC peripherals in ESP32-C5
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@@ -12,6 +12,7 @@
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#include "hal/ecc_types.h"
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#include "soc/ecc_mult_reg.h"
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#include "soc/pcr_struct.h"
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#include "soc/pcr_reg.h"
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#ifdef __cplusplus
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extern "C" {
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@@ -51,6 +52,20 @@ static inline void ecc_ll_reset_register(void)
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#endif
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}
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static inline void ecc_ll_power_up(void)
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{
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/* Power up the ECC peripheral (default state is power-down) */
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REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
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REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PD);
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}
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static inline void ecc_ll_power_down(void)
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{
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/* Power down the ECC peripheral */
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REG_CLR_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_FORCE_PU);
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REG_SET_BIT(PCR_ECC_PD_CTRL_REG, PCR_ECC_MEM_PD);
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}
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static inline void ecc_ll_enable_interrupt(void)
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{
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REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1);
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@@ -56,11 +56,15 @@ static inline size_t mpi_ll_calculate_hardware_words(size_t words)
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static inline void mpi_ll_clear_power_control_bit(void)
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{
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/* Power up the MPI peripheral (default is power-down state) */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PD);
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}
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static inline void mpi_ll_set_power_control_bit(void)
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{
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/* Power down the MPI peripheral */
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REG_CLR_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_FORCE_PU);
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REG_SET_BIT(PCR_RSA_PD_CTRL_REG, PCR_RSA_MEM_PD);
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}
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