esp_hw_support/clk_cali: remove redundant check for cali value

This commit is contained in:
jingli
2022-09-20 20:01:17 +08:00
parent 13984c0a79
commit 9a61a07fd8
5 changed files with 5 additions and 30 deletions

View File

@ -37,11 +37,6 @@ static const char* TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1 #define RTC_XTAL_CAL_RETRY 1
#endif #endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather /* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal. * than a crystal.
*/ */
@ -85,7 +80,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { if (cal_val == 0) {
if (retry_32k_xtal-- > 0) { if (retry_32k_xtal-- > 0) {
continue; continue;
} }

View File

@ -37,11 +37,6 @@
#define MHZ (1000000) #define MHZ (1000000)
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather /* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal. * than a crystal.
*/ */
@ -164,7 +159,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { if (cal_val == 0) {
if (retry_32k_xtal-- > 0) { if (retry_32k_xtal-- > 0) {
continue; continue;
} }

View File

@ -37,11 +37,6 @@
#define MHZ (1000000) #define MHZ (1000000)
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather /* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal. * than a crystal.
*/ */
@ -158,7 +153,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { if (cal_val == 0) {
if (retry_32k_xtal-- > 0) { if (retry_32k_xtal-- > 0) {
continue; continue;
} }

View File

@ -42,11 +42,6 @@ static const char *TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1 #define RTC_XTAL_CAL_RETRY 1
#endif #endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather /* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal. * than a crystal.
*/ */
@ -168,7 +163,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { if (cal_val == 0) {
if (retry_32k_xtal-- > 0) { if (retry_32k_xtal-- > 0) {
continue; continue;
} }

View File

@ -41,11 +41,6 @@ static const char *TAG = "clk";
#define RTC_XTAL_CAL_RETRY 1 #define RTC_XTAL_CAL_RETRY 1
#endif #endif
/* Lower threshold for a reasonably-looking calibration value for a 32k XTAL.
* The ideal value (assuming 32768 Hz frequency) is 1000000/32768*(2**19) = 16*10^6.
*/
#define MIN_32K_XTAL_CAL_VAL 15000000L
/* Indicates that this 32k oscillator gets input from external oscillator, rather /* Indicates that this 32k oscillator gets input from external oscillator, rather
* than a crystal. * than a crystal.
*/ */
@ -162,7 +157,7 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk)
// When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup.
if (SLOW_CLK_CAL_CYCLES > 0) { if (SLOW_CLK_CAL_CYCLES > 0) {
cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES); cal_val = rtc_clk_cal(RTC_CAL_32K_XTAL, SLOW_CLK_CAL_CYCLES);
if (cal_val == 0 || cal_val < MIN_32K_XTAL_CAL_VAL) { if (cal_val == 0) {
if (retry_32k_xtal-- > 0) { if (retry_32k_xtal-- > 0) {
continue; continue;
} }