diff --git a/components/driver/i2c.c b/components/driver/i2c.c index 94a8eb2bec..164b9e9e6a 100644 --- a/components/driver/i2c.c +++ b/components/driver/i2c.c @@ -1288,6 +1288,7 @@ esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t dat return ret; } +__attribute__((always_inline)) static inline bool i2c_cmd_is_single_byte(const i2c_cmd_t *cmd) { return cmd->total_bytes == 1; } diff --git a/components/hal/esp32/include/hal/i2c_ll.h b/components/hal/esp32/include/hal/i2c_ll.h index df4a7d5eb7..b7c71bde84 100644 --- a/components/hal/esp32/include/hal/i2c_ll.h +++ b/components/hal/esp32/include/hal/i2c_ll.h @@ -238,6 +238,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -293,6 +294,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -457,6 +459,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -469,6 +472,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -493,6 +497,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -552,6 +557,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -569,6 +575,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -617,6 +624,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -630,6 +638,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -643,6 +652,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -655,6 +665,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -667,6 +678,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -679,6 +691,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -715,6 +728,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -739,6 +753,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -804,6 +819,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -830,6 +846,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -885,6 +902,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32 do not support diff --git a/components/hal/esp32c3/include/hal/i2c_ll.h b/components/hal/esp32c3/include/hal/i2c_ll.h index c2aee7b27f..c6273a5f51 100644 --- a/components/hal/esp32c3/include/hal/i2c_ll.h +++ b/components/hal/esp32c3/include/hal/i2c_ll.h @@ -134,6 +134,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -259,6 +260,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -314,6 +316,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -478,6 +481,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rx_fifo_cnt; @@ -490,6 +494,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt; @@ -514,6 +519,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -573,6 +579,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -589,6 +596,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -637,6 +645,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -650,6 +659,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -663,6 +673,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -675,6 +686,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -687,6 +699,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -699,6 +712,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -735,6 +749,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -759,6 +774,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ + __attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -836,6 +852,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -862,6 +879,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/esp32h2/include/hal/i2c_ll.h b/components/hal/esp32h2/include/hal/i2c_ll.h index 9c505fd98a..9a417b8fc0 100644 --- a/components/hal/esp32h2/include/hal/i2c_ll.h +++ b/components/hal/esp32h2/include/hal/i2c_ll.h @@ -142,6 +142,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -267,6 +268,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -322,6 +324,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -486,6 +489,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rx_fifo_cnt; @@ -498,6 +502,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.tx_fifo_cnt; @@ -522,6 +527,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -581,6 +587,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -597,6 +604,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -645,6 +653,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -658,6 +667,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -671,6 +681,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -683,6 +694,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -695,6 +707,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -707,6 +720,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -743,6 +757,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -767,6 +782,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ + __attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -841,6 +857,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -867,6 +884,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/esp32s2/include/hal/i2c_ll.h b/components/hal/esp32s2/include/hal/i2c_ll.h index f332613e56..daa0ca0aa5 100644 --- a/components/hal/esp32s2/include/hal/i2c_ll.h +++ b/components/hal/esp32s2/include/hal/i2c_ll.h @@ -224,6 +224,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -280,6 +281,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { hw->command[cmd_idx].val = cmd.val; @@ -444,6 +446,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->status_reg.rx_fifo_cnt; @@ -456,6 +459,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->status_reg.tx_fifo_cnt; @@ -480,6 +484,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -539,6 +544,7 @@ static inline void i2c_ll_get_scl_timing(i2c_dev_t *hw, int *high_period, int *l * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -556,6 +562,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { uint32_t fifo_addr = (hw == &I2C0) ? 0x6001301c : 0x6002701c; @@ -605,6 +612,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -618,6 +626,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -631,6 +640,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -643,6 +653,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -655,6 +666,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -667,6 +679,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -703,6 +716,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -727,6 +741,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -795,6 +810,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -821,6 +837,7 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -894,6 +911,7 @@ static inline void i2c_ll_slave_init(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { ;// ESP32S2 do not support diff --git a/components/hal/esp32s3/include/hal/i2c_ll.h b/components/hal/esp32s3/include/hal/i2c_ll.h index 20b5c7d9ed..e7040114dd 100644 --- a/components/hal/esp32s3/include/hal/i2c_ll.h +++ b/components/hal/esp32s3/include/hal/i2c_ll.h @@ -129,6 +129,7 @@ static inline void i2c_ll_cal_bus_clk(uint32_t source_clk, uint32_t bus_freq, i2 * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_update(i2c_dev_t *hw) { hw->ctr.conf_upgate = 1; @@ -272,6 +273,7 @@ static inline void i2c_ll_disable_intr_mask(i2c_dev_t *hw, uint32_t mask) * * @return I2C interrupt status */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_intsts_mask(i2c_dev_t *hw) { return hw->int_status.val; @@ -327,6 +329,7 @@ static inline void i2c_ll_set_slave_addr(i2c_dev_t *hw, uint16_t slave_addr, boo * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_write_cmd_reg(i2c_dev_t *hw, i2c_hw_cmd_t cmd, int cmd_idx) { _Static_assert(sizeof(i2c_comd0_reg_t) == sizeof(i2c_hw_cmd_t), @@ -494,6 +497,7 @@ static inline bool i2c_ll_is_master_mode(i2c_dev_t *hw) * * @return RxFIFO readable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) { return hw->sr.rxfifo_cnt; @@ -506,6 +510,7 @@ static inline uint32_t i2c_ll_get_rxfifo_cnt(i2c_dev_t *hw) * * @return TxFIFO writable length */ +__attribute__((always_inline)) static inline uint32_t i2c_ll_get_txfifo_len(i2c_dev_t *hw) { return SOC_I2C_FIFO_LEN - hw->sr.txfifo_cnt; @@ -530,6 +535,7 @@ static inline uint32_t i2c_ll_get_tout(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_trans_start(i2c_dev_t *hw) { hw->ctr.trans_start = 1; @@ -605,6 +611,7 @@ static inline void i2c_ll_get_scl_clk_timing(i2c_dev_t *hw, int *high_period, in * * @return None. */ +__attribute__((always_inline)) static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for (int i = 0; i< len; i++) { @@ -621,6 +628,7 @@ static inline void i2c_ll_write_txfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_read_rxfifo(i2c_dev_t *hw, uint8_t *ptr, uint8_t len) { for(int i = 0; i < len; i++) { @@ -669,6 +677,7 @@ static inline uint8_t i2c_ll_get_filter(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -682,6 +691,7 @@ static inline void i2c_ll_master_enable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) { hw->int_clr.val = ~0; @@ -695,6 +705,7 @@ static inline void i2c_ll_master_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_TX_INT); @@ -707,6 +718,7 @@ static inline void i2c_ll_master_disable_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_MASTER_RX_INT); @@ -719,6 +731,7 @@ static inline void i2c_ll_master_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_TX_INT; @@ -731,6 +744,7 @@ static inline void i2c_ll_master_clr_tx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_clr_rx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_MASTER_RX_INT; @@ -767,6 +781,7 @@ static inline void i2c_ll_slave_enable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_disable_tx_it(i2c_dev_t *hw) { hw->int_ena.val &= (~I2C_LL_SLAVE_TX_INT); @@ -791,6 +806,7 @@ static inline void i2c_ll_slave_disable_rx_it(i2c_dev_t *hw) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_slave_clr_tx_it(i2c_dev_t *hw) { hw->int_clr.val = I2C_LL_SLAVE_TX_INT; @@ -859,6 +875,7 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_sclk_t src_clk) * * @return None */ +__attribute__((always_inline)) static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; @@ -885,6 +902,8 @@ static inline void i2c_ll_master_get_event(i2c_dev_t *hw, i2c_intr_event_t *even * * @return None */ + +__attribute__((always_inline)) static inline void i2c_ll_slave_get_event(i2c_dev_t *hw, i2c_intr_event_t *event) { typeof(hw->int_status) int_sts = hw->int_status; diff --git a/components/hal/i2c_hal.c b/components/hal/i2c_hal.c index db2dd1a7e1..aec4e604cf 100644 --- a/components/hal/i2c_hal.c +++ b/components/hal/i2c_hal.c @@ -64,11 +64,6 @@ void i2c_hal_disable_intr_mask(i2c_hal_context_t *hal, uint32_t mask) i2c_ll_disable_intr_mask(hal->dev, mask); } -void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) -{ - *mask = i2c_ll_get_intsts_mask(hal->dev); -} - void i2c_hal_set_fifo_mode(i2c_hal_context_t *hal, bool fifo_mode_en) { i2c_ll_set_fifo_mode(hal->dev, fifo_mode_en); diff --git a/components/hal/i2c_hal_iram.c b/components/hal/i2c_hal_iram.c index 080d19c919..557a58c79b 100644 --- a/components/hal/i2c_hal_iram.c +++ b/components/hal/i2c_hal_iram.c @@ -67,3 +67,8 @@ void i2c_hal_get_txfifo_cnt(i2c_hal_context_t *hal, uint32_t *len) { *len = i2c_ll_get_txfifo_len(hal->dev); } + +void i2c_hal_get_intsts_mask(i2c_hal_context_t *hal, uint32_t *mask) +{ + *mask = i2c_ll_get_intsts_mask(hal->dev); +}