diff --git a/components/esp_driver_parlio/src/parlio_rx.c b/components/esp_driver_parlio/src/parlio_rx.c index 97acef1973..fc61332349 100644 --- a/components/esp_driver_parlio/src/parlio_rx.c +++ b/components/esp_driver_parlio/src/parlio_rx.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -534,10 +534,15 @@ static esp_err_t s_parlio_select_periph_clock(parlio_rx_unit_handle_t rx_unit, c #if CONFIG_PM_ENABLE if (clk_src != PARLIO_CLK_SRC_EXTERNAL) { - /* XTAL and PLL clock source will be turned off in light sleep, so we need to create a NO_LIGHT_SLEEP lock */ + // XTAL and PLL clock source will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient + esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP; sprintf(rx_unit->pm_lock_name, "parlio_rx_%d_%d", rx_unit->base.group->group_id, rx_unit->base.unit_id); // e.g. parlio_rx_0_0 - esp_err_t ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, rx_unit->pm_lock_name, &rx_unit->pm_lock); - ESP_RETURN_ON_ERROR(ret, TAG, "create NO_LIGHT_SLEEP lock failed"); +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + lock_type = ESP_PM_CPU_FREQ_MAX; +#endif + esp_err_t ret = esp_pm_lock_create(lock_type, 0, rx_unit->pm_lock_name, &rx_unit->pm_lock); + ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed"); } #endif diff --git a/components/esp_driver_parlio/src/parlio_tx.c b/components/esp_driver_parlio/src/parlio_tx.c index 9cd52ee093..7c2515ac51 100644 --- a/components/esp_driver_parlio/src/parlio_tx.c +++ b/components/esp_driver_parlio/src/parlio_tx.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -246,10 +246,15 @@ static esp_err_t parlio_select_periph_clock(parlio_tx_unit_t *tx_unit, const par #if CONFIG_PM_ENABLE if (clk_src != PARLIO_CLK_SRC_EXTERNAL) { - // XTAL and PLL clock source will be turned off in light sleep, so we need to create a NO_LIGHT_SLEEP lock + // XTAL and PLL clock source will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient + esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP; sprintf(tx_unit->pm_lock_name, "parlio_tx_%d_%d", tx_unit->base.group->group_id, tx_unit->base.unit_id); // e.g. parlio_tx_0_0 - esp_err_t ret = esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, tx_unit->pm_lock_name, &tx_unit->pm_lock); - ESP_RETURN_ON_ERROR(ret, TAG, "create NO_LIGHT_SLEEP lock failed"); +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + lock_type = ESP_PM_CPU_FREQ_MAX; +#endif + esp_err_t ret = esp_pm_lock_create(lock_type, 0, tx_unit->pm_lock_name, &tx_unit->pm_lock); + ESP_RETURN_ON_ERROR(ret, TAG, "create pm lock failed"); } #endif hal_utils_clk_div_t clk_div = {}; diff --git a/components/esp_driver_spi/src/gpspi/spi_common.c b/components/esp_driver_spi/src/gpspi/spi_common.c index 771de6a6fc..3ce0a21463 100644 --- a/components/esp_driver_spi/src/gpspi/spi_common.c +++ b/components/esp_driver_spi/src/gpspi/spi_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -888,8 +888,14 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t * #endif // SOC_SPI_SUPPORT_SLEEP_RETENTION #ifdef CONFIG_PM_ENABLE +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + err = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "spi_master", + &bus_attr->pm_lock); +#else err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "spi_master", &bus_attr->pm_lock); +#endif if (err != ESP_OK) { goto cleanup; } diff --git a/components/esp_driver_spi/src/gpspi/spi_slave.c b/components/esp_driver_spi/src/gpspi/spi_slave.c index a2c29fe912..e2d1a4fb3b 100644 --- a/components/esp_driver_spi/src/gpspi/spi_slave.c +++ b/components/esp_driver_spi/src/gpspi/spi_slave.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -212,8 +212,12 @@ esp_err_t spi_slave_initialize(spi_host_device_t host, const spi_bus_config_t *b } #ifdef CONFIG_PM_ENABLE - err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "spi_slave", - &spihost[host]->pm_lock); +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + err = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "spi_slave", &spihost[host]->pm_lock); +#else + err = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "spi_slave", &spihost[host]->pm_lock); +#endif if (err != ESP_OK) { ret = err; goto cleanup; diff --git a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c index b93383b527..7036448767 100644 --- a/components/esp_driver_spi/src/gpspi/spi_slave_hd.c +++ b/components/esp_driver_spi/src/gpspi/spi_slave_hd.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2010-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2010-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -170,7 +170,12 @@ esp_err_t spi_slave_hd_init(spi_host_device_t host_id, const spi_bus_config_t *b spi_slave_hd_hal_init(&host->hal, &hal_config); #ifdef CONFIG_PM_ENABLE - ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "spi_slave", &host->pm_lock); +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + ret = esp_pm_lock_create(ESP_PM_CPU_FREQ_MAX, 0, "spi_slave_hd", &host->pm_lock); +#else + ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, "spi_slave_hd", &host->pm_lock); +#endif if (ret != ESP_OK) { goto cleanup; } diff --git a/components/esp_lcd/dsi/esp_lcd_panel_dpi.c b/components/esp_lcd/dsi/esp_lcd_panel_dpi.c index 2cca8a7214..8372bdd197 100644 --- a/components/esp_lcd/dsi/esp_lcd_panel_dpi.c +++ b/components/esp_lcd/dsi/esp_lcd_panel_dpi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -270,7 +270,8 @@ esp_err_t esp_lcd_new_panel_dpi(esp_lcd_dsi_bus_handle_t bus, const esp_lcd_dpi_ #if CONFIG_PM_ENABLE // When MIPI DSI is working, we don't expect the clock source would be turned off - esp_pm_lock_type_t pm_lock_type = ESP_PM_NO_LIGHT_SLEEP; + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + esp_pm_lock_type_t pm_lock_type = ESP_PM_CPU_FREQ_MAX; ret = esp_pm_lock_create(pm_lock_type, 0, "dsi_dpi", &dpi_panel->pm_lock); ESP_GOTO_ON_ERROR(ret, err, TAG, "create PM lock failed"); esp_pm_lock_acquire(dpi_panel->pm_lock); diff --git a/components/esp_lcd/i80/esp_lcd_panel_io_i80.c b/components/esp_lcd/i80/esp_lcd_panel_io_i80.c index e5909287ab..0f96148c3c 100644 --- a/components/esp_lcd/i80/esp_lcd_panel_io_i80.c +++ b/components/esp_lcd/i80/esp_lcd_panel_io_i80.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -582,9 +582,14 @@ static esp_err_t lcd_i80_select_periph_clock(esp_lcd_i80_bus_handle_t bus, lcd_c // save the resolution of the i80 bus bus->resolution_hz = src_clk_hz / LCD_PERIPH_CLOCK_PRE_SCALE; // create pm lock based on different clock source - // clock sources like PLL and XTAL will be turned off in light sleep #if CONFIG_PM_ENABLE - ESP_RETURN_ON_ERROR(esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "i80_bus_lcd", &bus->pm_lock), TAG, "create pm lock failed"); + // clock sources like PLL and XTAL will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient + esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP; +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + lock_type = ESP_PM_CPU_FREQ_MAX; +#endif + ESP_RETURN_ON_ERROR(esp_pm_lock_create(lock_type, 0, "i80_bus_lcd", &bus->pm_lock), TAG, "create pm lock failed"); #endif return ESP_OK; } diff --git a/components/esp_lcd/rgb/esp_lcd_panel_rgb.c b/components/esp_lcd/rgb/esp_lcd_panel_rgb.c index 2a1b691bbd..dc59c0c845 100644 --- a/components/esp_lcd/rgb/esp_lcd_panel_rgb.c +++ b/components/esp_lcd/rgb/esp_lcd_panel_rgb.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2025 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -788,9 +788,14 @@ static esp_err_t lcd_rgb_panel_select_clock_src(esp_rgb_panel_t *rgb_panel, lcd_ } // create pm lock based on different clock source - // clock sources like PLL and XTAL will be turned off in light sleep #if CONFIG_PM_ENABLE - ESP_RETURN_ON_ERROR(esp_pm_lock_create(ESP_PM_NO_LIGHT_SLEEP, 0, "rgb_panel", &rgb_panel->pm_lock), TAG, "create pm lock failed"); + // clock sources like PLL and XTAL will be turned off in light sleep, so basically a NO_LIGHT_SLEEP lock is sufficient + esp_pm_lock_type_t lock_type = ESP_PM_NO_LIGHT_SLEEP; +#if CONFIG_IDF_TARGET_ESP32P4 + // use CPU_MAX lock to ensure PSRAM bandwidth and usability during DFS + lock_type = ESP_PM_CPU_FREQ_MAX; +#endif + ESP_RETURN_ON_ERROR(esp_pm_lock_create(lock_type, 0, "rgb_panel", &rgb_panel->pm_lock), TAG, "create pm lock failed"); // hold the lock during the whole lifecycle of RGB panel esp_pm_lock_acquire(rgb_panel->pm_lock); ESP_LOGD(TAG, "installed pm lock and hold the lock during the whole panel lifecycle");