spi_flash_test: remove threshold from unit test

components/idf_test/include/idf_performance.h

@@ -46,48 +46,6 @@
 #define IDF_PERFORMANCE_MIN_SDIO_THROUGHPUT_MBSEC_FRHOST_SPI                    1000
 
 
-/*
- * Flash Performance value
- * 4 subsections: legacy, normal (new driver after v4.0), SPI1 (external but on SPI1), external (SPI2)
- * These thresholds are set to about 70% of the average test data, under certain condition.
- * Contact Espressif for details.
- */
-
-//The single_core config is much faster than other configs. Use the value of other configs
-//Collect data and correct it later
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_4B               0
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_4B               35300
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_WR_2KB              (697*1000)
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_RD_2KB              (6780*1000)
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE               11200
-
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_4B                      20100
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_4B                      35200
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_WR_2KB                     (754*1000)
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_RD_2KB                     (6650*1000)
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_ERASE                      0
-
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_4B                 16200
-//The single_core config is much faster than other configs. Use the value of other configs
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_4B                 33600
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_WR_2KB                (484*1000)
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_RD_2KB                (1512*1000)
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_SPI1_ERASE                 49600
-
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_4B                  73500
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_4B                  (261*1000)
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_WR_2KB                 (470*1000)
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_RD_2KB                 (261*1000)
-//erase performance is highly depending on the chip vendor. Use 70% of the minimal value.
-#define IDF_PERFORMANCE_MIN_FLASH_SPEED_BYTE_PER_SEC_EXT_ERASE                  30900
-
 #ifdef CONFIG_IDF_TARGET_ESP32
 // AES-CBC hardware throughput (accounts for worst-case performance with PSRAM workaround)
 #define IDF_PERFORMANCE_MIN_AES_CBC_THROUGHPUT_MBSEC                            8.2

components/spi_flash/test/test_esp_flash.c

@@ -814,6 +814,37 @@ static uint32_t measure_read(const char* name, const esp_partition_t* part, uint
     return time_measure_end(&time_ctx);
 }
 
+static const char* get_chip_vendor(uint32_t id)
+{
+    switch (id)
+    {
+    case 0x20:
+        return "XMC";
+        break;
+    case 0x68:
+        return "BOYA";
+        break;
+    case 0xC8:
+        return "GigaDevice";
+        break;
+    case 0x9D:
+        return "ISSI";
+        break;
+    case 0xC2:
+        return "MXIC";
+        break;
+    case 0xEF:
+        return "Winbond";
+        break;
+    case 0xA1:
+        return "Fudan Micro";
+        break;
+    default:
+        break;
+    }
+    return "generic";
+}
+
 #define MEAS_WRITE(n)   (measure_write("write in "#n"-byte chunks", &test_part, data_to_write, n))
 #define MEAS_READ(n)    (measure_read("read in "#n"-byte chunks", &test_part, data_read, n))
 
@@ -844,37 +875,35 @@ static void test_flash_read_write_performance(esp_flash_t* chip)
 
     TEST_ASSERT_EQUAL_HEX8_ARRAY(data_to_write, data_read, total_len);
 
-#if !CONFIG_SPIRAM_SUPPORT && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
+#define LOG_DATA(bus, suffix, chip) IDF_LOG_PERFORMANCE("FLASH_SPEED_BYTE_PER_SEC_"#bus#suffix, "%d, flash_chip: %s", speed_##suffix, chip)
-#  define CHECK_DATA(bus, suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##suffix, "%d", speed_##suffix)
+#define LOG_ERASE(bus, var, chip) IDF_LOG_PERFORMANCE("FLASH_SPEED_BYTE_PER_SEC_"#bus"ERASE", "%d, flash_chip: %s", var, chip)
-#  define CHECK_ERASE(bus, var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_##bus##ERASE, "%d", var)
-#else
-#  define CHECK_DATA(bus, suffix) ((void)speed_##suffix)
-#  define CHECK_ERASE(bus, var)   ((void)var)
-#endif
 
 // Erase time may vary a lot, can increase threshold if this fails with a reasonable speed
-#define CHECK_PERFORMANCE(bus) do {\
+#define LOG_PERFORMANCE(bus, chip) do {\
-            CHECK_DATA(bus, WR_4B); \
+            LOG_DATA(bus, WR_4B, chip); \
-            CHECK_DATA(bus, RD_4B); \
+            LOG_DATA(bus, RD_4B, chip); \
-            CHECK_DATA(bus, WR_2KB); \
+            LOG_DATA(bus, WR_2KB, chip); \
-            CHECK_DATA(bus, RD_2KB); \
+            LOG_DATA(bus, RD_2KB, chip); \
-            CHECK_ERASE(bus, erase_1); \
+            LOG_ERASE(bus, erase_1, chip); \
-            CHECK_ERASE(bus, erase_2); \
+            LOG_ERASE(bus, erase_2, chip); \
         } while (0)
 
     spi_host_device_t host_id;
     int cs_id;
+    uint32_t id;
+    esp_flash_read_id(chip, &id);
+    const char *chip_name = get_chip_vendor(id >> 16);
 
     get_chip_host(chip, &host_id, &cs_id);
     if (host_id != SPI_HOST) {
         // Chips on other SPI buses
-        CHECK_PERFORMANCE(EXT_);
+        LOG_PERFORMANCE(EXT_, chip_name);
     } else if (cs_id == 0) {
         // Main flash
-        CHECK_PERFORMANCE();
+        LOG_PERFORMANCE(,chip_name);
     } else {
         // Other cs pins on SPI1
-        CHECK_PERFORMANCE(SPI1_);
+        LOG_PERFORMANCE(SPI1_, chip_name);
     }
     free(data_to_write);
     free(data_read);

components/spi_flash/test/test_spi_flash.c

@@ -297,23 +297,17 @@ TEST_CASE("Test spi_flash read/write performance", "[spi_flash]")
 
     TEST_ASSERT_EQUAL_HEX8_ARRAY(data_to_write, data_read, total_len);
 
-// Data checks are disabled when PSRAM is used or in Freertos compliance check test
+#define LOG_DATA(suffix) IDF_LOG_PERFORMANCE("FLASH_SPEED_BYTE_PER_SEC_LEGACY_"#suffix, "%d", speed_##suffix)
-#if !CONFIG_SPIRAM_SUPPORT && !CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE
+#define LOG_ERASE(var) IDF_LOG_PERFORMANCE("FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE", "%d", var)
-#  define CHECK_DATA(suffix) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_##suffix, "%d", speed_##suffix)
-#  define CHECK_ERASE(var) TEST_PERFORMANCE_GREATER_THAN(FLASH_SPEED_BYTE_PER_SEC_LEGACY_ERASE, "%d", var)
-#else
-#  define CHECK_DATA(suffix) ((void)speed_##suffix)
-#  define CHECK_ERASE(var) ((void)var)
-#endif
 
-    CHECK_DATA(WR_4B);
+    LOG_DATA(WR_4B);
-    CHECK_DATA(RD_4B);
+    LOG_DATA(RD_4B);
-    CHECK_DATA(WR_2KB);
+    LOG_DATA(WR_2KB);
-    CHECK_DATA(RD_2KB);
+    LOG_DATA(RD_2KB);
 
     // Erase time may vary a lot, can increase threshold if this fails with a reasonable speed
-    CHECK_ERASE(erase_1);
+    LOG_ERASE(erase_1);
-    CHECK_ERASE(erase_2);
+    LOG_ERASE(erase_2);
 
     free(data_to_write);
     free(data_read);