Merge branch 'refactor/i2s_deprecate_confusing_names' into 'master'

i2s: deprecate confusing names

Closes IDF-4368

See merge request espressif/esp-idf!16088
This commit is contained in:
Kevin (Lao Kaiyao)
2021-12-07 11:52:44 +00:00
18 changed files with 93 additions and 95 deletions

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@@ -84,8 +84,8 @@ typedef struct {
i2s_port_t i2s_num; /*!< I2S port number*/ i2s_port_t i2s_num; /*!< I2S port number*/
int queue_size; /*!< I2S event queue size*/ int queue_size; /*!< I2S event queue size*/
QueueHandle_t i2s_queue; /*!< I2S queue handler*/ QueueHandle_t i2s_queue; /*!< I2S queue handler*/
int dma_buf_count; /*!< DMA buffer count, number of buffer*/ int dma_desc_num; /*!< DMA buffer count, number of buffer*/
int dma_buf_len; /*!< DMA buffer length, length of each buffer*/ int dma_frame_num; /*!< DMA buffer length, length of each buffer*/
uint32_t last_buf_size; /*!< DMA last buffer size */ uint32_t last_buf_size; /*!< DMA last buffer size */
i2s_dma_t *tx; /*!< DMA Tx buffer*/ i2s_dma_t *tx; /*!< DMA Tx buffer*/
i2s_dma_t *rx; /*!< DMA Rx buffer*/ i2s_dma_t *rx; /*!< DMA Rx buffer*/
@@ -662,9 +662,9 @@ static inline uint32_t i2s_get_buf_size(i2s_port_t i2s_num)
uint32_t bytes_per_sample = ((p_i2s[i2s_num]->hal_cfg.sample_bits + 15) / 16) * 2; uint32_t bytes_per_sample = ((p_i2s[i2s_num]->hal_cfg.sample_bits + 15) / 16) * 2;
/* The DMA buffer limitation is 4092 bytes */ /* The DMA buffer limitation is 4092 bytes */
uint32_t bytes_per_frame = bytes_per_sample * p_i2s[i2s_num]->hal_cfg.active_chan; uint32_t bytes_per_frame = bytes_per_sample * p_i2s[i2s_num]->hal_cfg.active_chan;
p_i2s[i2s_num]->dma_buf_len = (p_i2s[i2s_num]->dma_buf_len * bytes_per_frame > I2S_DMA_BUFFER_MAX_SIZE) ? p_i2s[i2s_num]->dma_frame_num = (p_i2s[i2s_num]->dma_frame_num * bytes_per_frame > I2S_DMA_BUFFER_MAX_SIZE) ?
I2S_DMA_BUFFER_MAX_SIZE / bytes_per_frame : p_i2s[i2s_num]->dma_buf_len; I2S_DMA_BUFFER_MAX_SIZE / bytes_per_frame : p_i2s[i2s_num]->dma_frame_num;
return p_i2s[i2s_num]->dma_buf_len * bytes_per_frame; return p_i2s[i2s_num]->dma_frame_num * bytes_per_frame;
} }
/** /**
@@ -680,7 +680,7 @@ static esp_err_t i2s_delete_dma_buffer(i2s_port_t i2s_num, i2s_dma_t *dma_obj)
{ {
ESP_RETURN_ON_FALSE(dma_obj, ESP_ERR_INVALID_ARG, TAG, "I2S DMA object can't be NULL"); ESP_RETURN_ON_FALSE(dma_obj, ESP_ERR_INVALID_ARG, TAG, "I2S DMA object can't be NULL");
/* Loop to destroy every descriptor and buffer */ /* Loop to destroy every descriptor and buffer */
for (int cnt = 0; cnt < p_i2s[i2s_num]->dma_buf_count; cnt++) { for (int cnt = 0; cnt < p_i2s[i2s_num]->dma_desc_num; cnt++) {
if (dma_obj->desc && dma_obj->desc[cnt]) { if (dma_obj->desc && dma_obj->desc[cnt]) {
free(dma_obj->desc[cnt]); free(dma_obj->desc[cnt]);
dma_obj->desc[cnt] = NULL; dma_obj->desc[cnt] = NULL;
@@ -707,7 +707,7 @@ static esp_err_t i2s_alloc_dma_buffer(i2s_port_t i2s_num, i2s_dma_t *dma_obj)
esp_err_t ret = ESP_OK; esp_err_t ret = ESP_OK;
ESP_GOTO_ON_FALSE(dma_obj, ESP_ERR_INVALID_ARG, err, TAG, "I2S DMA object can't be NULL"); ESP_GOTO_ON_FALSE(dma_obj, ESP_ERR_INVALID_ARG, err, TAG, "I2S DMA object can't be NULL");
uint32_t buf_cnt = p_i2s[i2s_num]->dma_buf_count; uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;
for (int cnt = 0; cnt < buf_cnt; cnt++) { for (int cnt = 0; cnt < buf_cnt; cnt++) {
/* Allocate DMA buffer */ /* Allocate DMA buffer */
dma_obj->buf[cnt] = (char *) heap_caps_calloc(dma_obj->buf_size, sizeof(char), MALLOC_CAP_DMA); dma_obj->buf[cnt] = (char *) heap_caps_calloc(dma_obj->buf_size, sizeof(char), MALLOC_CAP_DMA);
@@ -733,7 +733,7 @@ static esp_err_t i2s_alloc_dma_buffer(i2s_port_t i2s_num, i2s_dma_t *dma_obj)
/* Link to the next descriptor */ /* Link to the next descriptor */
dma_obj->desc[cnt]->empty = (uint32_t)((cnt < (buf_cnt - 1)) ? (dma_obj->desc[cnt + 1]) : dma_obj->desc[0]); dma_obj->desc[cnt]->empty = (uint32_t)((cnt < (buf_cnt - 1)) ? (dma_obj->desc[cnt + 1]) : dma_obj->desc[0]);
} }
ESP_LOGI(TAG, "DMA Malloc info, datalen=blocksize=%d, dma_buf_count=%d", dma_obj->buf_size, buf_cnt); ESP_LOGI(TAG, "DMA Malloc info, datalen=blocksize=%d, dma_desc_num=%d", dma_obj->buf_size, buf_cnt);
return ESP_OK; return ESP_OK;
err: err:
/* Delete DMA buffer if failed to allocate memory */ /* Delete DMA buffer if failed to allocate memory */
@@ -819,7 +819,7 @@ static esp_err_t i2s_create_dma_object(i2s_port_t i2s_num, i2s_dma_t **dma)
{ {
ESP_RETURN_ON_FALSE(dma, ESP_ERR_INVALID_ARG, TAG, "DMA object secondary pointer is NULL"); ESP_RETURN_ON_FALSE(dma, ESP_ERR_INVALID_ARG, TAG, "DMA object secondary pointer is NULL");
ESP_RETURN_ON_FALSE((*dma == NULL), ESP_ERR_INVALID_ARG, TAG, "DMA object has been created"); ESP_RETURN_ON_FALSE((*dma == NULL), ESP_ERR_INVALID_ARG, TAG, "DMA object has been created");
uint32_t buf_cnt = p_i2s[i2s_num]->dma_buf_count; uint32_t buf_cnt = p_i2s[i2s_num]->dma_desc_num;
/* Allocate new DMA structure */ /* Allocate new DMA structure */
*dma = (i2s_dma_t *) malloc(sizeof(i2s_dma_t)); *dma = (i2s_dma_t *) malloc(sizeof(i2s_dma_t));
ESP_RETURN_ON_FALSE(*dma, ESP_ERR_NO_MEM, TAG, "DMA object allocate failed"); ESP_RETURN_ON_FALSE(*dma, ESP_ERR_NO_MEM, TAG, "DMA object allocate failed");
@@ -866,7 +866,7 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num)
/* Clear I2S RX DMA buffer */ /* Clear I2S RX DMA buffer */
if (p_i2s[i2s_num]->rx && p_i2s[i2s_num]->rx->buf != NULL && p_i2s[i2s_num]->rx->buf_size != 0) { if (p_i2s[i2s_num]->rx && p_i2s[i2s_num]->rx->buf != NULL && p_i2s[i2s_num]->rx->buf_size != 0) {
for (int i = 0; i < p_i2s[i2s_num]->dma_buf_count; i++) { for (int i = 0; i < p_i2s[i2s_num]->dma_desc_num; i++) {
memset(p_i2s[i2s_num]->rx->buf[i], 0, p_i2s[i2s_num]->rx->buf_size); memset(p_i2s[i2s_num]->rx->buf[i], 0, p_i2s[i2s_num]->rx->buf_size);
} }
} }
@@ -879,7 +879,7 @@ esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num)
size_t zero_bytes = 0, bytes_written; size_t zero_bytes = 0, bytes_written;
i2s_write(i2s_num, (void *)&zero_bytes, bytes_left, &bytes_written, portMAX_DELAY); i2s_write(i2s_num, (void *)&zero_bytes, bytes_left, &bytes_written, portMAX_DELAY);
} }
for (int i = 0; i < p_i2s[i2s_num]->dma_buf_count; i++) { for (int i = 0; i < p_i2s[i2s_num]->dma_desc_num; i++) {
memset(p_i2s[i2s_num]->tx->buf[i], 0, p_i2s[i2s_num]->tx->buf_size); memset(p_i2s[i2s_num]->tx->buf[i], 0, p_i2s[i2s_num]->tx->buf_size);
} }
} }
@@ -1808,8 +1808,8 @@ static esp_err_t i2s_driver_init(i2s_port_t i2s_num, const i2s_config_t *i2s_con
/* I2S driver configuration assignment */ /* I2S driver configuration assignment */
p_i2s[i2s_num]->i2s_num = i2s_num; p_i2s[i2s_num]->i2s_num = i2s_num;
p_i2s[i2s_num]->dma_buf_count = i2s_config->dma_buf_count; p_i2s[i2s_num]->dma_desc_num = i2s_config->dma_desc_num;
p_i2s[i2s_num]->dma_buf_len = i2s_config->dma_buf_len; p_i2s[i2s_num]->dma_frame_num = i2s_config->dma_frame_num;
p_i2s[i2s_num]->last_buf_size = 0; p_i2s[i2s_num]->last_buf_size = 0;
p_i2s[i2s_num]->use_apll = i2s_config->use_apll; p_i2s[i2s_num]->use_apll = i2s_config->use_apll;
p_i2s[i2s_num]->fixed_mclk = i2s_config->fixed_mclk; p_i2s[i2s_num]->fixed_mclk = i2s_config->fixed_mclk;
@@ -1918,8 +1918,8 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,
ESP_RETURN_ON_FALSE((i2s_num < I2S_NUM_MAX), ESP_ERR_INVALID_ARG, TAG, "i2s_num error"); ESP_RETURN_ON_FALSE((i2s_num < I2S_NUM_MAX), ESP_ERR_INVALID_ARG, TAG, "i2s_num error");
ESP_RETURN_ON_FALSE(i2s_config, ESP_ERR_INVALID_ARG, TAG, "I2S configuration must not be NULL"); ESP_RETURN_ON_FALSE(i2s_config, ESP_ERR_INVALID_ARG, TAG, "I2S configuration must not be NULL");
/* Check the size of DMA buffer */ /* Check the size of DMA buffer */
ESP_RETURN_ON_FALSE((i2s_config->dma_buf_count >= 2 && i2s_config->dma_buf_count <= 128), ESP_ERR_INVALID_ARG, TAG, "I2S buffer count less than 128 and more than 2"); ESP_RETURN_ON_FALSE((i2s_config->dma_desc_num >= 2 && i2s_config->dma_desc_num <= 128), ESP_ERR_INVALID_ARG, TAG, "I2S buffer count less than 128 and more than 2");
ESP_RETURN_ON_FALSE((i2s_config->dma_buf_len >= 8 && i2s_config->dma_buf_len <= 1024), ESP_ERR_INVALID_ARG, TAG, "I2S buffer length at most 1024 and more than 8"); ESP_RETURN_ON_FALSE((i2s_config->dma_frame_num >= 8 && i2s_config->dma_frame_num <= 1024), ESP_ERR_INVALID_ARG, TAG, "I2S buffer length at most 1024 and more than 8");
/* Step 2: Allocate driver object and register to platform */ /* Step 2: Allocate driver object and register to platform */
i2s_obj_t *pre_alloc_i2s_obj = calloc(1, sizeof(i2s_obj_t)); i2s_obj_t *pre_alloc_i2s_obj = calloc(1, sizeof(i2s_obj_t));

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@@ -96,8 +96,15 @@ typedef struct {
i2s_channel_fmt_t channel_format; /*!< I2S channel format.*/ i2s_channel_fmt_t channel_format; /*!< I2S channel format.*/
i2s_comm_format_t communication_format; /*!< I2S communication format */ i2s_comm_format_t communication_format; /*!< I2S communication format */
int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */ int intr_alloc_flags; /*!< Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info */
int dma_buf_count; /*!< I2S DMA Buffer Count */ union {
int dma_buf_len; /*!< I2S DMA Buffer Length */ int dma_desc_num; /*!< The total number of descriptors used by I2S DMA to receive/transmit data */
int dma_buf_count __attribute__((deprecated)); /*!< This is an alias to 'dma_desc_num' for backward compatibility */
};
union {
int dma_frame_num; /*!< Frame number for one-time sampling. Frame here means the total data from all the channels in a WS cycle */
int dma_buf_len __attribute__((deprecated)); /*!< This is an alias to 'dma_frame_num' for backward compatibility */
};
bool use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */ bool use_apll; /*!< I2S using APLL as main I2S clock, enable it to get accurate clock */
bool tx_desc_auto_clear; /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */ bool tx_desc_auto_clear; /*!< I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability) */
int fixed_mclk; /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */ int fixed_mclk; /*!< I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won't take effect */

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@@ -59,8 +59,8 @@ static void example_i2s_init(void)
.bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS, .bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS,
.channel_format = EXAMPLE_I2S_FORMAT, .channel_format = EXAMPLE_I2S_FORMAT,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
.dma_buf_count = 2, .dma_desc_num = 2,
.dma_buf_len = 1024, .dma_frame_num = 1024,
.use_apll = 0, .use_apll = 0,
}; };

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@@ -61,8 +61,8 @@ static void example_i2s_init(void)
.bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS, .bits_per_sample = EXAMPLE_I2S_SAMPLE_BITS,
.channel_format = EXAMPLE_I2S_FORMAT, .channel_format = EXAMPLE_I2S_FORMAT,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
.dma_buf_count = 2, .dma_desc_num = 2,
.dma_buf_len = 1024, .dma_frame_num = 1024,
.use_apll = 0, .use_apll = 0,
}; };
//install and start i2s driver //install and start i2s driver

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@@ -228,8 +228,8 @@ static void i2s_adc_init(void)
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
.dma_buf_count = 2, .dma_desc_num = 2,
.dma_buf_len = 1024, .dma_frame_num = 1024,
.use_apll = 0, .use_apll = 0,
}; };
// install and start I2S driver // install and start I2S driver

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@@ -143,8 +143,8 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -174,9 +174,9 @@ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
//error param test //error param test
TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 1; i2s_config.dma_desc_num = 1;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
i2s_config.dma_buf_count = 129; i2s_config.dma_desc_num = 129;
TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, i2s_driver_uninstall(I2S_NUM_0)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, i2s_driver_uninstall(I2S_NUM_0));
} }
@@ -190,8 +190,8 @@ TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -265,8 +265,8 @@ TEST_CASE("I2S TDM Loopback test(master tx and rx)", "[i2s]")
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.total_chan = 4, .total_chan = 4,
.chan_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1 | I2S_TDM_ACTIVE_CH2 | I2S_TDM_ACTIVE_CH3, .chan_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH1 | I2S_TDM_ACTIVE_CH2 | I2S_TDM_ACTIVE_CH3,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
}; };
@@ -332,8 +332,8 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -363,8 +363,8 @@ TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -436,8 +436,8 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 1, .use_apll = 1,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -467,8 +467,8 @@ TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 1, .use_apll = 1,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -541,8 +541,8 @@ TEST_CASE("I2S memory leaking test", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 100, .dma_frame_num = 100,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -599,8 +599,8 @@ TEST_CASE("I2S APLL clock variation test", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.use_apll = true, .use_apll = true,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
#if SOC_I2S_SUPPORTS_TDM #if SOC_I2S_SUPPORTS_TDM
@@ -650,8 +650,8 @@ TEST_CASE("I2S adc test", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
.dma_buf_count = 2, .dma_desc_num = 2,
.dma_buf_len = 1024, .dma_frame_num = 1024,
.use_apll = 0, .use_apll = 0,
}; };
// install and start I2S driver // install and start I2S driver
@@ -717,8 +717,8 @@ TEST_CASE("I2S dac test", "[i2s]")
.bits_per_sample = SAMPLE_BITS, .bits_per_sample = SAMPLE_BITS,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.use_apll = 0, .use_apll = 0,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,
}; };

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@@ -591,8 +591,8 @@ TEST_CASE("i80 and i2s driver coexistance", "[lcd][i2s]")
.bits_per_sample = 16, .bits_per_sample = 16,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
}; };
// I2S driver won't be installed as the same I2S port has been used by LCD // I2S driver won't be installed as the same I2S port has been used by LCD
TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, i2s_driver_install(0, &i2s_config, 0, NULL)); TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, i2s_driver_install(0, &i2s_config, 0, NULL));

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@@ -80,8 +80,8 @@ Configuration example:
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S .communication_format = I2S_COMM_FORMAT_STAND_I2S
.tx_desc_auto_clear = false, .tx_desc_auto_clear = false,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.use_apll = false, .use_apll = false,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 // Interrupt level 1, default 0 .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 // Interrupt level 1, default 0
}; };
@@ -101,8 +101,8 @@ Configuration example:
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.tx_desc_auto_clear = false, .tx_desc_auto_clear = false,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.bits_per_chan = I2S_BITS_PER_SAMPLE_16BIT .bits_per_chan = I2S_BITS_PER_SAMPLE_16BIT
}; };
@@ -194,8 +194,8 @@ Example for general usage.
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S .communication_format = I2S_COMM_FORMAT_STAND_I2S
.tx_desc_auto_clear = false, .tx_desc_auto_clear = false,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.use_apll = false, .use_apll = false,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 // Interrupt level 1, default 0 .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 // Interrupt level 1, default 0
}; };
@@ -238,8 +238,8 @@ Example for general usage.
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S .communication_format = I2S_COMM_FORMAT_STAND_I2S
.tx_desc_auto_clear = false, .tx_desc_auto_clear = false,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64 .dma_frame_num = 64
}; };
static const i2s_pin_config_t pin_config = { static const i2s_pin_config_t pin_config = {
@@ -282,8 +282,8 @@ Example for general usage.
.channel_format = I2S_CHANNEL_FMT_MULTIPLE, .channel_format = I2S_CHANNEL_FMT_MULTIPLE,
.communication_format = I2S_COMM_FORMAT_STAND_I2S .communication_format = I2S_COMM_FORMAT_STAND_I2S
.tx_desc_auto_clear = false, .tx_desc_auto_clear = false,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.chan_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH2 .chan_mask = I2S_TDM_ACTIVE_CH0 | I2S_TDM_ACTIVE_CH2
}; };
@@ -328,8 +328,8 @@ Example for general usage.
.bits_per_sample = 16, /* the DAC module will only take the 8bits from MSB */ .bits_per_sample = 16, /* the DAC module will only take the 8bits from MSB */
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.intr_alloc_flags = 0, // default interrupt priority .intr_alloc_flags = 0, // default interrupt priority
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.use_apll = false .use_apll = false
}; };

View File

@@ -1,16 +1,8 @@
// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD /*
// * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD
// Licensed under the Apache License, Version 2.0 (the "License"); *
// you may not use this file except in compliance with the License. * SPDX-License-Identifier: Apache-2.0
// You may obtain a copy of the License at */
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <stdio.h> #include <stdio.h>
#include <stdlib.h> #include <stdlib.h>
@@ -62,8 +54,8 @@ void app_main(void)
.bits_per_sample = 16, .bits_per_sample = 16,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.communication_format = I2S_COMM_FORMAT_STAND_MSB, .communication_format = I2S_COMM_FORMAT_STAND_MSB,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.intr_alloc_flags = 0, //Default interrupt priority .intr_alloc_flags = 0, //Default interrupt priority
.tx_desc_auto_clear = true //Auto clear tx descriptor on underflow .tx_desc_auto_clear = true //Auto clear tx descriptor on underflow
}; };

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@@ -693,8 +693,8 @@ void app_main(void)
.sample_rate = 44100, .sample_rate = 44100,
.bits_per_sample = 16, .bits_per_sample = 16,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.intr_alloc_flags = 0, //Default interrupt priority .intr_alloc_flags = 0, //Default interrupt priority
.tx_desc_auto_clear = true //Auto clear tx descriptor on underflow .tx_desc_auto_clear = true //Auto clear tx descriptor on underflow
}; };

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@@ -69,8 +69,8 @@ void example_i2s_init(void)
.communication_format = I2S_COMM_FORMAT_STAND_MSB, .communication_format = I2S_COMM_FORMAT_STAND_MSB,
.channel_format = EXAMPLE_I2S_FORMAT, .channel_format = EXAMPLE_I2S_FORMAT,
.intr_alloc_flags = 0, .intr_alloc_flags = 0,
.dma_buf_count = 2, .dma_desc_num = 2,
.dma_buf_len = 1024, .dma_frame_num = 1024,
.use_apll = 1, .use_apll = 1,
}; };
//install and start i2s driver //install and start i2s driver

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@@ -75,7 +75,7 @@ Running this example, you will see the Bits per Sample changes every 5 seconds a
``` ```
I (361) pdm_rec_example: PDM microphone recording Example start I (361) pdm_rec_example: PDM microphone recording Example start
I (371) I2S: DMA Malloc info, datalen=blocksize=2048, dma_buf_count=64 I (371) I2S: DMA Malloc info, datalen=blocksize=2048, dma_desc_num=64
I (401) I2S: APLL: Req RATE: 44100, real rate: 88199.977, BITS: 16, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0 I (401) I2S: APLL: Req RATE: 44100, real rate: 88199.977, BITS: 16, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0
I (431) I2S: APLL: Req RATE: 44100, real rate: 88199.977, BITS: 16, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0 I (431) I2S: APLL: Req RATE: 44100, real rate: 88199.977, BITS: 16, CLKM: 1, BCK_M: 8, MCLK: 22579194.000, SCLK: 2822399.250000, diva: 1, divb: 0
I (431) pdm_rec_example: Initializing SD card I (431) pdm_rec_example: Initializing SD card

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@@ -173,8 +173,8 @@ void init_microphone(void)
.channel_format = I2S_CHANNEL_FMT_ONLY_LEFT, .channel_format = I2S_CHANNEL_FMT_ONLY_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_I2S, .communication_format = I2S_COMM_FORMAT_STAND_I2S,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL2, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL2,
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 200, .dma_frame_num = 200,
.use_apll = 0, .use_apll = 0,
}; };

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@@ -38,15 +38,15 @@ Running this example, you will see the Bits per Sample changes every 5 seconds a
``` ```
Test bits=24 free mem=293780, written data=2880 Test bits=24 free mem=293780, written data=2880
I2S: DMA Malloc info, datalen=blocksize=480, dma_buf_count=6 I2S: DMA Malloc info, datalen=blocksize=480, dma_desc_num=6
I2S: PLL_D2: Req RATE: 36000, real rate: 37878.000, BITS: 24, CLKM: 11, BCK: 8, MCLK: 13837837.838, SCLK: 1818144.000000, diva: 64, divb: 36 I2S: PLL_D2: Req RATE: 36000, real rate: 37878.000, BITS: 24, CLKM: 11, BCK: 8, MCLK: 13837837.838, SCLK: 1818144.000000, diva: 64, divb: 36
Test bits=32 free mem=292336, written data=2880 Test bits=32 free mem=292336, written data=2880
I2S: DMA Malloc info, datalen=blocksize=480, dma_buf_count=6 I2S: DMA Malloc info, datalen=blocksize=480, dma_desc_num=6
I2S: PLL_D2: Req RATE: 36000, real rate: 36764.000, BITS: 32, CLKM: 17, BCK: 4, MCLK: 9216921.692, SCLK: 2352896.000000, diva: 64, divb: 23 I2S: PLL_D2: Req RATE: 36000, real rate: 36764.000, BITS: 32, CLKM: 17, BCK: 4, MCLK: 9216921.692, SCLK: 2352896.000000, diva: 64, divb: 23
Test bits=16 free mem=293772, written data=1440 Test bits=16 free mem=293772, written data=1440
I2S: DMA Malloc info, datalen=blocksize=240, dma_buf_count=6 I2S: DMA Malloc info, datalen=blocksize=240, dma_desc_num=6
I2S: PLL_D2: Req RATE: 36000, real rate: 36764.000, BITS: 16, CLKM: 17, BCK: 8, MCLK: 9216921.692, SCLK: 1176448.000000, diva: 64, divb: 23 I2S: PLL_D2: Req RATE: 36000, real rate: 36764.000, BITS: 16, CLKM: 17, BCK: 8, MCLK: 9216921.692, SCLK: 1176448.000000, diva: 64, divb: 23
``` ```

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@@ -96,8 +96,8 @@ void app_main(void)
.bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT, .bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT,
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
.communication_format = I2S_COMM_FORMAT_STAND_MSB, .communication_format = I2S_COMM_FORMAT_STAND_MSB,
.dma_buf_count = 6, .dma_desc_num = 6,
.dma_buf_len = 60, .dma_frame_num = 60,
.use_apll = false, .use_apll = false,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 //Interrupt level 1 .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 //Interrupt level 1
}; };

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@@ -94,8 +94,8 @@ See the Getting Started Guide for full steps to configure and use ESP-IDF to bui
Running this example in music mode, you can hear a piece of music (canon), the log is shown as follow: Running this example in music mode, you can hear a piece of music (canon), the log is shown as follow:
``` ```
I (348) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=6 I (348) I2S: DMA Malloc info, datalen=blocksize=1200, dma_desc_num=6
I (348) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=6 I (348) I2S: DMA Malloc info, datalen=blocksize=1200, dma_desc_num=6
I (358) I2S: I2S0, MCLK output by GPIO0 I (358) I2S: I2S0, MCLK output by GPIO0
I (368) DRV8311: ES8311 in Slave mode I (368) DRV8311: ES8311 in Slave mode
I (378) gpio: GPIO[10]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 I (378) gpio: GPIO[10]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0
@@ -106,8 +106,8 @@ I (7948) i2s_es8311: I2S music played, 213996 bytes are written.
Running this example in echo mode, you can hear the sound in earphone that collected by mic. Running this example in echo mode, you can hear the sound in earphone that collected by mic.
``` ```
I (312) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=6 I (312) I2S: DMA Malloc info, datalen=blocksize=1200, dma_desc_num=6
I (312) I2S: DMA Malloc info, datalen=blocksize=1200, dma_buf_count=6 I (312) I2S: DMA Malloc info, datalen=blocksize=1200, dma_desc_num=6
I (322) I2S: I2S0, MCLK output by GPIO0 I (322) I2S: I2S0, MCLK output by GPIO0
I (332) DRV8311: ES8311 in Slave mode I (332) DRV8311: ES8311 in Slave mode
I (342) gpio: GPIO[10]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 I (342) gpio: GPIO[10]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0

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@@ -100,8 +100,8 @@ static esp_err_t i2s_driver_init(void)
.bit_order_msb = false, .bit_order_msb = false,
.skip_msk = false, .skip_msk = false,
#endif #endif
.dma_buf_count = 8, .dma_desc_num = 8,
.dma_buf_len = 64, .dma_frame_num = 64,
.use_apll = false, .use_apll = false,
.mclk_multiple = EXAMPLE_MCLK_MULTIPLE, .mclk_multiple = EXAMPLE_MCLK_MULTIPLE,
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1,

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@@ -2723,7 +2723,6 @@ examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_av.c
examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_av.h examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_av.h
examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_core.c examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_core.c
examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_core.h examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/bt_app_core.h
examples/bluetooth/bluedroid/classic_bt/a2dp_sink/main/main.c
examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/bt_app_core.c examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/bt_app_core.c
examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/bt_app_core.h examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/bt_app_core.h
examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c examples/bluetooth/bluedroid/classic_bt/a2dp_source/main/main.c