diff --git a/components/esp_hw_support/port/esp32c2/rtc_clk.c b/components/esp_hw_support/port/esp32c2/rtc_clk.c index d9b1b43e66..12474d7f45 100644 --- a/components/esp_hw_support/port/esp32c2/rtc_clk.c +++ b/components/esp_hw_support/port/esp32c2/rtc_clk.c @@ -19,6 +19,8 @@ #include "soc/efuse_reg.h" #include "soc/syscon_reg.h" #include "soc/system_reg.h" +#include "soc/io_mux_reg.h" +#include "soc/soc.h" #include "regi2c_ctrl.h" #include "regi2c_bbpll.h" #include "esp_hw_log.h" @@ -35,6 +37,12 @@ static int s_cur_pll_freq; static void rtc_clk_cpu_freq_to_8m(void); +void rtc_clk_32k_enable_external(void) +{ + REG_SET_BIT(PERIPHS_IO_MUX_XTAL_32K_P_U, FUN_IE); + REG_SET_BIT(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_GPIO_PIN0_HOLD); +} + void rtc_clk_8m_enable(bool clk_8m_en, bool d256_en) { if (clk_8m_en) { diff --git a/components/esp_system/port/soc/esp32c2/clk.c b/components/esp_system/port/soc/esp32c2/clk.c index c07abd9d74..1a03ccf65c 100644 --- a/components/esp_system/port/soc/esp32c2/clk.c +++ b/components/esp_system/port/soc/esp32c2/clk.c @@ -147,6 +147,8 @@ static void select_rtc_slow_clk(slow_clk_sel_t slow_clk) * will time out, returning 0. */ ESP_EARLY_LOGD(TAG, "waiting for external clock by pin0 to start up"); + rtc_clk_32k_enable_external(); + // When SLOW_CLK_CAL_CYCLES is set to 0, clock calibration will not be performed at startup. if (SLOW_CLK_CAL_CYCLES > 0) { cal_val = rtc_clk_cal(RTC_CAL_EXT_CLK, SLOW_CLK_CAL_CYCLES); diff --git a/components/soc/esp32c2/include/soc/rtc.h b/components/soc/esp32c2/include/soc/rtc.h index 59898a7c92..28abe9c0c6 100644 --- a/components/soc/esp32c2/include/soc/rtc.h +++ b/components/soc/esp32c2/include/soc/rtc.h @@ -240,6 +240,11 @@ rtc_xtal_freq_t rtc_clk_xtal_freq_get(void); */ void rtc_clk_xtal_freq_update(rtc_xtal_freq_t xtal_freq); +/** + * @brief Enable 32KHz external oscillator + */ +void rtc_clk_32k_enable_external(void); + /** * @brief Enable or disable 8 MHz internal oscillator *