From 9ffd8aa017262d9762fc4054b901ef6c8beb7715 Mon Sep 17 00:00:00 2001 From: wuzhenghui Date: Tue, 24 Sep 2024 18:05:47 +0800 Subject: [PATCH] fix(esp_hw_support): fix coverity defects in sleep code --- .../esp_hw_support/port/esp32p4/io_mux.c | 4 +++ components/esp_hw_support/sleep_modes.c | 31 ++++++++++--------- 2 files changed, 20 insertions(+), 15 deletions(-) diff --git a/components/esp_hw_support/port/esp32p4/io_mux.c b/components/esp_hw_support/port/esp32p4/io_mux.c index 64cd2aa200..5f24525a7a 100644 --- a/components/esp_hw_support/port/esp32p4/io_mux.c +++ b/components/esp_hw_support/port/esp32p4/io_mux.c @@ -6,6 +6,7 @@ #include "sdkconfig.h" #include "esp_attr.h" +#include "esp_check.h" #include "freertos/FreeRTOS.h" #include "esp_private/esp_clk_tree_common.h" #include "esp_private/io_mux.h" @@ -14,6 +15,8 @@ #include "hal/rtc_io_ll.h" #include "soc/soc_caps.h" +static const char __attribute__((__unused__)) *IOMUX_TAG = "IO_MUX"; + #define RTCIO_RCC_ATOMIC() PERIPH_RCC_ATOMIC() static portMUX_TYPE s_io_mux_spinlock = portMUX_INITIALIZER_UNLOCKED; @@ -52,6 +55,7 @@ esp_err_t io_mux_set_clock_source(soc_module_clk_t clk_src) void io_mux_enable_lp_io_clock(gpio_num_t gpio_num, bool enable) { + ESP_RETURN_ON_FALSE(rtc_gpio_is_valid_gpio(gpio_num), ESP_ERR_INVALID_ARG, IOMUX_TAG, "RTCIO number error"); portENTER_CRITICAL(&s_io_mux_spinlock); if (enable) { if (s_rtc_io_status.rtc_io_enabled_cnt[gpio_num] == 0) { diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 44edbe8cfd..e119b46310 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -983,6 +983,14 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m #endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY #endif +#if SOC_DCDC_SUPPORTED + uint64_t ldo_increased_us = rtc_time_slowclk_to_us(rtc_time_get() - s_config.rtc_ticks_at_ldo_prepare, s_config.rtc_clk_cal_period); + if (ldo_increased_us < LDO_POWER_TAKEOVER_PREPARATION_TIME_US) { + esp_rom_delay_us(LDO_POWER_TAKEOVER_PREPARATION_TIME_US - ldo_increased_us); + } + pmu_sleep_shutdown_dcdc(); +#endif + // Enter Deep Sleep #if!ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB || SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY || !CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP #if SOC_PMU_SUPPORTED @@ -1016,27 +1024,20 @@ static esp_err_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t m } #endif -#if SOC_DCDC_SUPPORTED -#if CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON - if (!deep_sleep) { - // Keep DCDC always on during light sleep, no need to adjust LDO voltage. - } else -#endif - { - uint64_t ldo_increased_us = rtc_time_slowclk_to_us(rtc_time_get() - s_config.rtc_ticks_at_ldo_prepare, s_config.rtc_clk_cal_period); - if (ldo_increased_us < LDO_POWER_TAKEOVER_PREPARATION_TIME_US) { - esp_rom_delay_us(LDO_POWER_TAKEOVER_PREPARATION_TIME_US - ldo_increased_us); - } - pmu_sleep_shutdown_dcdc(); - } -#endif - #if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && SOC_PM_MMU_TABLE_RETENTION_WHEN_TOP_PD if (pd_flags & PMU_SLEEP_PD_TOP) { esp_sleep_mmu_retention(true); } #endif +#if SOC_DCDC_SUPPORTED && !CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON + uint64_t ldo_increased_us = rtc_time_slowclk_to_us(rtc_time_get() - s_config.rtc_ticks_at_ldo_prepare, s_config.rtc_clk_cal_period); + if (ldo_increased_us < LDO_POWER_TAKEOVER_PREPARATION_TIME_US) { + esp_rom_delay_us(LDO_POWER_TAKEOVER_PREPARATION_TIME_US - ldo_increased_us); + } + pmu_sleep_shutdown_dcdc(); +#endif + #if SOC_PMU_SUPPORTED #if SOC_PM_CPU_RETENTION_BY_SW && ESP_SLEEP_POWER_DOWN_CPU esp_sleep_execute_event_callbacks(SLEEP_EVENT_HW_GOTO_SLEEP, (void *)0);