diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c
index 4e320b7aef..37c9dedd85 100644
--- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c
+++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c
@@ -148,6 +148,9 @@ const pmu_sleep_config_t* pmu_sleep_config_default(
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_DSLP_CONFIG_DEFAULT(pd_flags);
         config->analog = analog_default;
     } else {
+        pmu_sleep_digital_config_t digital_default = PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags);
+        config->digital = digital_default;
+
         pmu_sleep_analog_config_t analog_default = PMU_SLEEP_ANALOG_LSLP_CONFIG_DEFAULT(pd_flags);
         if (!(pd_flags & PMU_SLEEP_PD_MODEM)){
             analog_default.hp_sys.analog.slp_logic_dbias += 2;
@@ -179,6 +182,11 @@ static void pmu_sleep_power_init(pmu_context_t *ctx, const pmu_sleep_power_confi
     }
 }
 
+static void pmu_sleep_digital_init(pmu_context_t *ctx, const pmu_sleep_digital_config_t *dig)
+{
+    pmu_ll_hp_set_dig_pad_slp_sel   (ctx->hal->dev, HP(SLEEP), dig->syscntl.dig_pad_slp_sel);
+}
+
 static void pmu_sleep_analog_init(pmu_context_t *ctx, const pmu_sleep_analog_config_t *analog, bool dslp)
 {
     assert(ctx->hal);
@@ -230,6 +238,9 @@ void pmu_sleep_init(const pmu_sleep_config_t *config, bool dslp)
 {
     assert(PMU_instance());
     pmu_sleep_power_init(PMU_instance(), &config->power, dslp);
+    if(!dslp){
+        pmu_sleep_digital_init(PMU_instance(), &config->digital);
+    }
     pmu_sleep_analog_init(PMU_instance(), &config->analog, dslp);
     pmu_sleep_param_init(PMU_instance(), &config->param, dslp);
 }
diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
index 31f49a0a87..24b15a2958 100644
--- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
+++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h
@@ -150,6 +150,16 @@ typedef struct {
     }                                                                       \
 }
 
+typedef struct {
+    pmu_hp_sys_cntl_reg_t   syscntl;
+} pmu_sleep_digital_config_t;
+
+#define PMU_SLEEP_DIGITAL_LSLP_CONFIG_DEFAULT(pd_flags) {               \
+    .syscntl = {                                                        \
+        .dig_pad_slp_sel = ((pd_flags) & PMU_SLEEP_PD_TOP) ? 0 : 1,     \
+    }                                                                   \
+}
+
 typedef struct {
     struct {
         pmu_hp_analog_t analog;
@@ -266,9 +276,10 @@ typedef struct {
 }
 
 typedef struct {
-    pmu_sleep_power_config_t  power;
-    pmu_sleep_analog_config_t analog;
-    pmu_sleep_param_config_t  param;
+    pmu_sleep_power_config_t    power;
+    pmu_sleep_digital_config_t  digital;
+    pmu_sleep_analog_config_t   analog;
+    pmu_sleep_param_config_t    param;
 } pmu_sleep_config_t;
 
 typedef struct pmu_sleep_machine_constant {
diff --git a/components/esp_hw_support/sleep_gpio.c b/components/esp_hw_support/sleep_gpio.c
index 8deadc2e80..0b30f0b10d 100644
--- a/components/esp_hw_support/sleep_gpio.c
+++ b/components/esp_hw_support/sleep_gpio.c
@@ -185,9 +185,13 @@ void esp_deep_sleep_wakeup_io_reset(void)
 #if CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND || CONFIG_PM_SLP_DISABLE_GPIO
 ESP_SYSTEM_INIT_FN(esp_sleep_startup_init, BIT(0), 105)
 {
+/* If the TOP domain is powered off, the GPIO will also be powered off during sleep,
+   and all configurations in the sleep state of GPIO will not take effect.*/
+#if !CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
     // Configure to isolate (disable the Input/Output/Pullup/Pulldown
     // function of the pin) all GPIO pins in sleep state
     esp_sleep_config_gpio_isolate();
+#endif
     // Enable automatic switching of GPIO configuration
     esp_sleep_enable_gpio_switch(true);
     return ESP_OK;
diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c
index 44ae1f95ff..0006c7e3e0 100644
--- a/components/esp_hw_support/sleep_modes.c
+++ b/components/esp_hw_support/sleep_modes.c
@@ -564,6 +564,13 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
         result = ESP_OK;
 #endif
     } else {
+
+/* On esp32c6, only the lp_aon pad hold function can only hold the GPIO state in the active mode.
+   In order to avoid the leakage of the SPI cs pin, hold it here */
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
+    rtcio_ll_force_hold_enable(SPI_CS0_GPIO_NUM);
+#endif
+
 #if SOC_PM_CPU_RETENTION_BY_SW
         if (pd_flags & PMU_SLEEP_PD_CPU) {
             result = esp_sleep_cpu_retention(pmu_sleep_start, s_config.wakeup_triggers, reject_triggers, config.power.hp_sys.dig_power.mem_dslp, deep_sleep);
@@ -573,6 +580,11 @@ static uint32_t IRAM_ATTR esp_sleep_start(uint32_t pd_flags, esp_sleep_mode_t mo
 #else
         result = call_rtc_sleep_start(reject_triggers, config.lslp_mem_inf_fpu, deep_sleep);
 #endif
+
+/* Unhold the SPI CS pin */
+#if CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP && CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND
+    rtcio_ll_force_hold_disable(SPI_CS0_GPIO_NUM);
+#endif
     }
 
     // Restore CPU frequency