diff --git a/components/bootloader/subproject/CMakeLists.txt b/components/bootloader/subproject/CMakeLists.txt index 2c507035c7..222aad9f2d 100644 --- a/components/bootloader/subproject/CMakeLists.txt +++ b/components/bootloader/subproject/CMakeLists.txt @@ -19,6 +19,7 @@ set(COMPONENTS bootloader esptool_py esp_hw_support + esp_system hal partition_table soc diff --git a/components/driver/CMakeLists.txt b/components/driver/CMakeLists.txt index 8e68bb570e..df392d00b2 100644 --- a/components/driver/CMakeLists.txt +++ b/components/driver/CMakeLists.txt @@ -75,8 +75,8 @@ endif() idf_component_register(SRCS "${srcs}" INCLUDE_DIRS ${includes} PRIV_INCLUDE_DIRS "include/driver" - PRIV_REQUIRES efuse esp_pm esp_timer esp_ipc - REQUIRES esp_ringbuf freertos soc hal esp_hw_support) + PRIV_REQUIRES efuse esp_timer esp_ipc + REQUIRES esp_pm esp_ringbuf freertos soc hal esp_hw_support) # (REQUIRES cannot hide soc headers, since many arguments in the driver headers are chip-dependent) # uses C11 atomic feature diff --git a/components/esp32/CMakeLists.txt b/components/esp32/CMakeLists.txt index b805a5c539..de64b5f8fa 100644 --- a/components/esp32/CMakeLists.txt +++ b/components/esp32/CMakeLists.txt @@ -30,7 +30,7 @@ else() # app_update is added here because cpu_start.c uses esp_ota_get_app_description() function. # esp_timer is added here because cpu_start.c uses esp_timer set(priv_requires app_trace app_update bootloader_support esp_system log mbedtls nvs_flash pthread - spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc) + spi_flash vfs espcoredump esp_common perfmon esp_timer esp_ipc esp_pm) set(fragments linker.lf ld/esp32_fragments.lf) idf_component_register(SRCS "${srcs}" diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig index 3788e97bc1..ef84997304 100644 --- a/components/esp32/Kconfig +++ b/components/esp32/Kconfig @@ -122,7 +122,7 @@ menu "ESP32-specific" endchoice # insert non-chip-specific items here - source "$IDF_PATH/components/esp_common/Kconfig.spiram.common" + source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" config SPIRAM_CACHE_WORKAROUND bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s" diff --git a/components/esp32s2/Kconfig b/components/esp32s2/Kconfig index 9ff302f698..b4aa25dfd2 100644 --- a/components/esp32s2/Kconfig +++ b/components/esp32s2/Kconfig @@ -192,7 +192,7 @@ menu "ESP32S2-specific" endchoice # insert non-chip-specific items here - source "$IDF_PATH/components/esp_common/Kconfig.spiram.common" + source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" endmenu diff --git a/components/esp32s3/Kconfig b/components/esp32s3/Kconfig index a083bd6a57..6e17dddd0c 100644 --- a/components/esp32s3/Kconfig +++ b/components/esp32s3/Kconfig @@ -242,7 +242,7 @@ menu "ESP32S3-Specific" endchoice # insert non-chip-specific items here - source "$IDF_PATH/components/esp_common/Kconfig.spiram.common" + source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" endmenu diff --git a/components/esp_common/CMakeLists.txt b/components/esp_common/CMakeLists.txt index 27b1e9b01a..bcb16a907e 100644 --- a/components/esp_common/CMakeLists.txt +++ b/components/esp_common/CMakeLists.txt @@ -1,76 +1,37 @@ idf_build_get_property(target IDF_TARGET) -if(CONFIG_IDF_ENV_FPGA) - list(APPEND srcs "src/fpga_overrides.c") -endif() +list(APPEND srcs "src/esp_err_to_name.c") -if(BOOTLOADER_BUILD) - # For bootloader, all we need from esp_common is headers - idf_component_register(SRCS ${srcs} - INCLUDE_DIRS include - PRIV_REQUIRES soc) - set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-Wl,--gc-sections") -else() - # Regular app build - list(APPEND srcs "src/brownout.c" - "src/esp_err.c" - "src/esp_err_to_name.c" - "src/freertos_hooks.c" - "src/mac_addr.c" - "src/stack_check.c" - "src/task_wdt.c" - "src/int_wdt.c") +# Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here. +idf_component_register(SRCS "${srcs}" + INCLUDE_DIRS include + REQUIRES ${target}) - if(NOT CONFIG_IDF_TARGET_ESP32C3) - list(APPEND srcs "src/dbg_stubs.c") +set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY LINK_INTERFACE_MULTIPLICITY 4) + +# List of components needed for the error codes list +set(optional_reqs ulp + efuse + esp_http_client + esp_http_server + bootloader_support + nvs_flash + esp_wifi + app_update + lwip + spi_flash + wpa_supplicant + tcpip_adapter + esp_serial_slave_link + esp_netif + soc + esp-tls + esp_https_ota) + +idf_build_get_property(build_components BUILD_COMPONENTS) +foreach(req ${optional_reqs}) + if(req IN_LIST build_components) + idf_component_get_property(req_lib ${req} COMPONENT_LIB) + target_link_libraries(${COMPONENT_LIB} PRIVATE ${req_lib}) endif() - - # Note: esp_ipc, esp_pm added as a public requirement to keep compatibility as to be located here. - idf_component_register(SRCS "${srcs}" - INCLUDE_DIRS include - REQUIRES ${target} espcoredump esp_timer esp_ipc esp_pm esp_hw_support - PRIV_REQUIRES soc - LDFRAGMENTS "linker.lf") - - set_source_files_properties( - "src/stack_check.c" - PROPERTIES COMPILE_FLAGS - -fno-stack-protector) - - set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY LINK_LIBRARIES "-Wl,--gc-sections") - set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY INTERFACE_LINK_LIBRARIES "-Wl,--gc-sections") - set_property(TARGET ${COMPONENT_LIB} APPEND PROPERTY LINK_INTERFACE_MULTIPLICITY 4) - - # List of components needed for the error codes list - set(optional_reqs ulp - efuse - esp_http_client - esp_http_server - bootloader_support - nvs_flash - esp_wifi - app_update - lwip - spi_flash - wpa_supplicant - tcpip_adapter - esp_serial_slave_link - esp_netif - soc - esp-tls - esp_https_ota) - - idf_build_get_property(build_components BUILD_COMPONENTS) - foreach(req ${optional_reqs}) - if(req IN_LIST build_components) - idf_component_get_property(req_lib ${req} COMPONENT_LIB) - target_link_libraries(${COMPONENT_LIB} PRIVATE ${req_lib}) - endif() - endforeach() - -endif() - -if(CONFIG_IDF_ENV_FPGA) - # Forces the linker to include fpga stubs from this component - target_link_libraries(${COMPONENT_LIB} INTERFACE "-u esp_common_include_fpga_overrides") -endif() +endforeach() diff --git a/components/esp_common/Kconfig b/components/esp_common/Kconfig index ab0c2277bd..43a74a4544 100644 --- a/components/esp_common/Kconfig +++ b/components/esp_common/Kconfig @@ -9,301 +9,6 @@ menu "Common ESP-related" save memory but this comes at the price of sacrificing distinguishable (meaningful) output string representations. - config ESP_SYSTEM_EVENT_QUEUE_SIZE - int "System event queue size" - default 32 - help - Config system event queue size in different application. - - config ESP_SYSTEM_EVENT_TASK_STACK_SIZE - int "Event loop task stack size" - default 2304 - help - Config system event task stack size in different application. - - config ESP_MAIN_TASK_STACK_SIZE - int "Main task stack size" - default 3584 - help - Configure the "main task" stack size. This is the stack of the task - which calls app_main(). If app_main() returns then this task is deleted - and its stack memory is freed. - - config ESP_IPC_TASK_STACK_SIZE - int "Inter-Processor Call (IPC) task stack size" - range 512 65536 if !APPTRACE_ENABLE - range 2048 65536 if APPTRACE_ENABLE - default 2048 if APPTRACE_ENABLE - default 1024 - help - Configure the IPC tasks stack size. One IPC task runs on each core - (in dual core mode), and allows for cross-core function calls. - - See IPC documentation for more details. - - The default stack size should be enough for most common use cases. - It can be shrunk if you are sure that you do not use any custom - IPC functionality. - - config ESP_IPC_USES_CALLERS_PRIORITY - bool "IPC runs at caller's priority" - default y - depends on !FREERTOS_UNICORE - help - If this option is not enabled then the IPC task will keep behavior - same as prior to that of ESP-IDF v4.0, and hence IPC task will run - at (configMAX_PRIORITIES - 1) priority. - - config ESP_MINIMAL_SHARED_STACK_SIZE - int "Minimal allowed size for shared stack" - default 2048 - help - Minimal value of size, in bytes, accepted to execute a expression - with shared stack. - - choice ESP_CONSOLE_UART - prompt "Channel for console output" - default ESP_CONSOLE_UART_DEFAULT - help - Select where to send console output (through stdout and stderr). - - - Default is to use UART0 on pre-defined GPIOs. - - If "Custom" is selected, UART0 or UART1 can be chosen, - and any pins can be selected. - - If "None" is selected, there will be no console output on any UART, except - for initial output from ROM bootloader. This ROM output can be suppressed by - GPIO strapping or EFUSE, refer to chip datasheet for details. - - On chips with USB peripheral, "USB CDC" option redirects output to the - CDC port. This option uses the CDC driver in the chip ROM. - This option is incompatible with TinyUSB stack. - config ESP_CONSOLE_UART_DEFAULT - bool "Default: UART0" - config ESP_CONSOLE_USB_CDC - bool "USB CDC" - # The naming is confusing: USB_ENABLED means that TinyUSB driver is enabled, not USB in general. - # && !USB_ENABLED is because the ROM CDC driver is currently incompatible with TinyUSB. - depends on IDF_TARGET_ESP32S2 && !USB_ENABLED - config ESP_CONSOLE_UART_CUSTOM - bool "Custom UART" - config ESP_CONSOLE_NONE - bool "None" - endchoice - - # Internal option, indicates that console UART is used (and not USB, for example) - config ESP_CONSOLE_UART - bool - default y if ESP_CONSOLE_UART_DEFAULT || ESP_CONSOLE_UART_CUSTOM - - config ESP_CONSOLE_MULTIPLE_UART - bool - default y if !IDF_TARGET_ESP32C3 - - choice ESP_CONSOLE_UART_NUM - prompt "UART peripheral to use for console output (0-1)" - depends on ESP_CONSOLE_UART_CUSTOM && ESP_CONSOLE_MULTIPLE_UART - default ESP_CONSOLE_UART_CUSTOM_NUM_0 - help - This UART peripheral is used for console output from the ESP-IDF Bootloader and the app. - - If the configuration is different in the Bootloader binary compared to the app binary, UART - is reconfigured after the bootloader exits and the app starts. - - Due to an ESP32 ROM bug, UART2 is not supported for console output - via esp_rom_printf. - - config ESP_CONSOLE_UART_CUSTOM_NUM_0 - bool "UART0" - config ESP_CONSOLE_UART_CUSTOM_NUM_1 - bool "UART1" - endchoice - - config ESP_CONSOLE_UART_NUM - int - default 0 if ESP_CONSOLE_UART_DEFAULT - default 0 if !ESP_CONSOLE_MULTIPLE_UART - default 0 if ESP_CONSOLE_UART_CUSTOM_NUM_0 - default 1 if ESP_CONSOLE_UART_CUSTOM_NUM_1 - default -1 if !ESP_CONSOLE_UART - - config ESP_CONSOLE_UART_TX_GPIO - int "UART TX on GPIO#" - depends on ESP_CONSOLE_UART_CUSTOM - range 0 46 - default 1 if IDF_TARGET_ESP32 - default 21 if IDF_TARGET_ESP32C3 - default 43 - help - This GPIO is used for console UART TX output in the ESP-IDF Bootloader and the app (including - boot log output and default standard output and standard error of the app). - - If the configuration is different in the Bootloader binary compared to the app binary, UART - is reconfigured after the bootloader exits and the app starts. - - config ESP_CONSOLE_UART_RX_GPIO - int "UART RX on GPIO#" - depends on ESP_CONSOLE_UART_CUSTOM - range 0 46 - default 3 if IDF_TARGET_ESP32 - default 20 if IDF_TARGET_ESP32C3 - default 44 - help - This GPIO is used for UART RX input in the ESP-IDF Bootloader and the app (including - default default standard input of the app). - - Note: The default ESP-IDF Bootloader configures this pin but doesn't read anything from the UART. - - If the configuration is different in the Bootloader binary compared to the app binary, UART - is reconfigured after the bootloader exits and the app starts. - - - config ESP_CONSOLE_UART_BAUDRATE - int - prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM - depends on ESP_CONSOLE_UART - default 115200 - range 1200 4000000 if !PM_ENABLE - range 1200 1000000 if PM_ENABLE - help - This baud rate is used by both the ESP-IDF Bootloader and the app (including - boot log output and default standard input/output/error of the app). - - The app's maximum baud rate depends on the UART clock source. If Power Management is disabled, - the UART clock source is the APB clock and all baud rates in the available range will be sufficiently - accurate. If Power Management is enabled, REF_TICK clock source is used so the baud rate is divided - from 1MHz. Baud rates above 1Mbps are not possible and values between 500Kbps and 1Mbps may not be - accurate. - - If the configuration is different in the Bootloader binary compared to the app binary, UART - is reconfigured after the bootloader exits and the app starts. - - config ESP_CONSOLE_USB_CDC_RX_BUF_SIZE - int "Size of USB CDC RX buffer" - depends on ESP_CONSOLE_USB_CDC - default 64 - range 4 16384 - help - Set the size of USB CDC RX buffer. Increase the buffer size if your application - is often receiving data over USB CDC. - - config ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF - bool "Enable esp_rom_printf / ESP_EARLY_LOG via USB CDC" - depends on ESP_CONSOLE_USB_CDC - default n - help - If enabled, esp_rom_printf and ESP_EARLY_LOG output will also be sent over USB CDC. - Disabling this option saves about 1kB or RAM. - - config ESP_INT_WDT - bool "Interrupt watchdog" - default y - help - This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time, - either because a task turned off interrupts and did not turn them on for a long time, or because an - interrupt handler did not return. It will try to invoke the panic handler first and failing that - reset the SoC. - - config ESP_INT_WDT_TIMEOUT_MS - int "Interrupt watchdog timeout (ms)" - depends on ESP_INT_WDT - default 300 if !ESP32_SPIRAM_SUPPORT - default 800 if ESP32_SPIRAM_SUPPORT - range 10 10000 - help - The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate. - - config ESP_INT_WDT_CHECK_CPU1 - bool "Also watch CPU1 tick interrupt" - depends on ESP_INT_WDT && !FREERTOS_UNICORE - default y - help - Also detect if interrupts on CPU 1 are disabled for too long. - - config ESP_TASK_WDT - bool "Initialize Task Watchdog Timer on startup" - default y - help - The Task Watchdog Timer can be used to make sure individual tasks are still - running. Enabling this option will cause the Task Watchdog Timer to be - initialized automatically at startup. The Task Watchdog timer can be - initialized after startup as well (see Task Watchdog Timer API Reference) - - config ESP_TASK_WDT_PANIC - bool "Invoke panic handler on Task Watchdog timeout" - depends on ESP_TASK_WDT - default n - help - If this option is enabled, the Task Watchdog Timer will be configured to - trigger the panic handler when it times out. This can also be configured - at run time (see Task Watchdog Timer API Reference) - - config ESP_TASK_WDT_TIMEOUT_S - int "Task Watchdog timeout period (seconds)" - depends on ESP_TASK_WDT - range 1 60 - default 5 - help - Timeout period configuration for the Task Watchdog Timer in seconds. - This is also configurable at run time (see Task Watchdog Timer API Reference) - - config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 - bool "Watch CPU0 Idle Task" - depends on ESP_TASK_WDT - default y - help - If this option is enabled, the Task Watchdog Timer will watch the CPU0 - Idle Task. Having the Task Watchdog watch the Idle Task allows for detection - of CPU starvation as the Idle Task not being called is usually a symptom of - CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household - tasks depend on the Idle Task getting some runtime every now and then. - - config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 - bool "Watch CPU1 Idle Task" - depends on ESP_TASK_WDT && !FREERTOS_UNICORE - default y - help - If this option is enabled, the Task Wtachdog Timer will wach the CPU1 - Idle Task. - - config ESP_PANIC_HANDLER_IRAM - bool "Place panic handler code in IRAM" - default n - help - If this option is disabled (default), the panic handler code is placed in flash not IRAM. - This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will - automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor - risk, if the flash cache status is also corrupted during the crash. - - If this option is enabled, the panic handler code is placed in IRAM. This allows the panic - handler to run without needing to re-enable cache first. This may be necessary to debug some - complex issues with crashes while flash cache is disabled (for example, when writing to - SPI flash.) - - config ESP_DEBUG_STUBS_ENABLE - bool - default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32_TRAX && !ESP32S2_TRAX - help - Debug stubs are used by OpenOCD to execute pre-compiled onboard code - which does some useful debugging stuff, e.g. GCOV data dump. - - config ESP_MAC_ADDR_UNIVERSE_WIFI_STA - bool - - config ESP_MAC_ADDR_UNIVERSE_WIFI_AP - bool - - config ESP_MAC_ADDR_UNIVERSE_BT - bool - - config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET - int - default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR - default 1 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO - default 1 - - config ESP_MAC_ADDR_UNIVERSE_ETH - bool - config ESP_ALLOW_BSS_SEG_EXTERNAL_MEMORY # Invisible option that is set by SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY, but # exists even if SPIRAM is not supported diff --git a/components/esp_common/component.mk b/components/esp_common/component.mk index da494c4b94..ea720ca509 100644 --- a/components/esp_common/component.mk +++ b/components/esp_common/component.mk @@ -4,10 +4,3 @@ COMPONENT_ADD_INCLUDEDIRS := include COMPONENT_SRCDIRS := src - -ifndef CONFIG_IDF_ENV_FPGA -COMPONENT_OBJEXCLUDE += src/fpga_overrides.o -endif - -# disable stack protection in files which are involved in initialization of that feature -src/stack_check.o: CFLAGS := $(filter-out -fstack-protector%, $(CFLAGS)) diff --git a/components/esp_common/linker.lf b/components/esp_common/linker.lf deleted file mode 100644 index b6913ecff1..0000000000 --- a/components/esp_common/linker.lf +++ /dev/null @@ -1,4 +0,0 @@ -[mapping:esp_common] -archive: libesp_common.a -entries: - esp_err (noflash) diff --git a/components/esp_common/sdkconfig.rename b/components/esp_common/sdkconfig.rename deleted file mode 100644 index 5096f42755..0000000000 --- a/components/esp_common/sdkconfig.rename +++ /dev/null @@ -1,29 +0,0 @@ -# sdkconfig replacement configurations for deprecated options formatted as -# CONFIG_DEPRECATED_OPTION CONFIG_NEW_OPTION - -CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE -CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE -CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE -CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE -CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART -CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT -CONFIG_CONSOLE_UART_CUSTOM CONFIG_ESP_CONSOLE_UART_CUSTOM -CONFIG_CONSOLE_UART_NONE CONFIG_ESP_CONSOLE_NONE -CONFIG_ESP_CONSOLE_UART_NONE CONFIG_ESP_CONSOLE_NONE -CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM -CONFIG_CONSOLE_UART_CUSTOM_NUM_0 CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0 -CONFIG_CONSOLE_UART_CUSTOM_NUM_1 CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 -CONFIG_CONSOLE_UART_TX_GPIO CONFIG_ESP_CONSOLE_UART_TX_GPIO -CONFIG_CONSOLE_UART_RX_GPIO CONFIG_ESP_CONSOLE_UART_RX_GPIO -CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE -CONFIG_INT_WDT CONFIG_ESP_INT_WDT -CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS -CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1 -CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT -CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC -CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S -CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 -CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 -CONFIG_ESP32_DEBUG_STUBS_ENABLE CONFIG_ESP_DEBUG_STUBS_ENABLE -CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP -CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 7b8994d950..d18183d1ec 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -7,7 +7,7 @@ endif() set(srcs "compare_set.c" "cpu_util.c") if(NOT BOOTLOADER_BUILD) - list(APPEND srcs "clk_ctrl_os.c") + list(APPEND srcs "clk_ctrl_os.c" "mac_addr.c") endif() idf_component_register(SRCS ${srcs} diff --git a/components/esp_hw_support/Kconfig b/components/esp_hw_support/Kconfig new file mode 100644 index 0000000000..e37fb77ec2 --- /dev/null +++ b/components/esp_hw_support/Kconfig @@ -0,0 +1,21 @@ +menu "Hardware Settings" + menu "MAC Config" + config ESP_MAC_ADDR_UNIVERSE_WIFI_STA + bool + + config ESP_MAC_ADDR_UNIVERSE_WIFI_AP + bool + + config ESP_MAC_ADDR_UNIVERSE_BT + bool + + config ESP_MAC_ADDR_UNIVERSE_BT_OFFSET + int + default 2 if ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR + default 1 if ESP32_UNIVERSAL_MAC_ADDRESSES_TWO + default 1 + + config ESP_MAC_ADDR_UNIVERSE_ETH + bool + endmenu +endmenu diff --git a/components/esp_common/Kconfig.spiram.common b/components/esp_hw_support/Kconfig.spiram.common similarity index 100% rename from components/esp_common/Kconfig.spiram.common rename to components/esp_hw_support/Kconfig.spiram.common diff --git a/components/esp_hw_support/component.mk b/components/esp_hw_support/component.mk index 867056fdc0..07566e52b8 100644 --- a/components/esp_hw_support/component.mk +++ b/components/esp_hw_support/component.mk @@ -5,5 +5,5 @@ COMPONENT_ADD_LDFRAGMENTS := linker.lf port/$(IDF_TARGET)/rtc_clk.o: CFLAGS += -fno-jump-tables -fno-tree-switch-conversion ifdef IS_BOOTLOADER_BUILD -COMPONENT_OBJEXCLUDE += clk_ctrl_os.o +COMPONENT_OBJEXCLUDE += clk_ctrl_os.o mac_addr.o endif diff --git a/components/esp_common/include/esp_crc.h b/components/esp_hw_support/include/esp_crc.h similarity index 100% rename from components/esp_common/include/esp_crc.h rename to components/esp_hw_support/include/esp_crc.h diff --git a/components/esp_common/include/esp_fault.h b/components/esp_hw_support/include/esp_fault.h similarity index 100% rename from components/esp_common/include/esp_fault.h rename to components/esp_hw_support/include/esp_fault.h diff --git a/components/esp_common/include/esp_interface.h b/components/esp_hw_support/include/esp_interface.h similarity index 100% rename from components/esp_common/include/esp_interface.h rename to components/esp_hw_support/include/esp_interface.h diff --git a/components/esp_common/src/mac_addr.c b/components/esp_hw_support/mac_addr.c similarity index 100% rename from components/esp_common/src/mac_addr.c rename to components/esp_hw_support/mac_addr.c diff --git a/components/esp_ipc/test/CMakeLists.txt b/components/esp_ipc/test/CMakeLists.txt index 37594e61be..24591e199b 100644 --- a/components/esp_ipc/test/CMakeLists.txt +++ b/components/esp_ipc/test/CMakeLists.txt @@ -1,5 +1,5 @@ if(IDF_TARGET STREQUAL "esp32") idf_component_register(SRC_DIRS "." PRIV_INCLUDE_DIRS "." - PRIV_REQUIRES cmock test_utils) + PRIV_REQUIRES cmock test_utils esp_ipc) endif() diff --git a/components/esp_pm/linker.lf b/components/esp_pm/linker.lf index e4c4b2f9a5..f1fe2f4baa 100644 --- a/components/esp_pm/linker.lf +++ b/components/esp_pm/linker.lf @@ -7,16 +7,6 @@ entries: if PM_SLP_IRAM_OPT = y && IDF_TARGET_ESP32 = n: pm_impl:periph_inform_out_light_sleep_overhead (noflash) -[mapping:esp_common_pm] -archive: libesp_common.a -entries: - if PM_RTOS_IDLE_OPT = y: - freertos_hooks:esp_vApplicationIdleHook (noflash) - task_wdt:idle_hook_cb (noflash) - task_wdt:esp_task_wdt_reset (noflash) - task_wdt:find_task_in_twdt_list (noflash) - task_wdt:reset_hw_timer (noflash) - [mapping:esp_hw_support_pm] archive: libesp_hw_support.a entries: @@ -26,11 +16,17 @@ entries: [mapping:esp_system_pm] archive: libesp_system.a entries: + if PM_RTOS_IDLE_OPT = y: + freertos_hooks:esp_vApplicationIdleHook (noflash) if PM_SLP_IRAM_OPT = y: sleep_modes:esp_light_sleep_start (noflash) sleep_modes:esp_sleep_enable_timer_wakeup (noflash) sleep_modes:timer_wakeup_prepare (noflash) sleep_modes:get_power_down_flags (noflash) + task_wdt:idle_hook_cb (noflash) + task_wdt:esp_task_wdt_reset (noflash) + task_wdt:find_task_in_twdt_list (noflash) + task_wdt:reset_hw_timer (noflash) [mapping:esp_timer_pm] archive: libesp_timer.a diff --git a/components/esp_system/CMakeLists.txt b/components/esp_system/CMakeLists.txt index f6e9d7b8a2..2f7ab5c2db 100644 --- a/components/esp_system/CMakeLists.txt +++ b/components/esp_system/CMakeLists.txt @@ -1,43 +1,66 @@ +idf_build_get_property(target IDF_TARGET) + +set(srcs) + +if(CONFIG_IDF_ENV_FPGA) + list(APPEND srcs "fpga_overrides.c") +endif() + if(BOOTLOADER_BUILD) # Bootloader relies on some Kconfig options defined in esp_system. - idf_component_register() - return() + idf_component_register(SRCS "${srcs}") +else() + list(APPEND srcs "esp_err.c" + "freertos_hooks.c" + "intr_alloc.c" + "int_wdt.c" + "esp_async_memcpy.c" + "panic.c" + "system_api.c" + "startup.c" + "system_time.c" + "stack_check.c" + "sleep_modes.c" + "task_wdt.c") + + if(NOT (${target} STREQUAL "esp32c3") ) + list(APPEND srcs "dbg_stubs.c") + endif() + + idf_component_register(SRCS "${srcs}" + INCLUDE_DIRS include + PRIV_REQUIRES spi_flash + # [refactor-todo] requirements due to init code, + # should be removable once using component init functions + # link-time registration is used. + esp_pm app_update nvs_flash pthread app_trace esp_gdbstub esp_ipc + espcoredump + LDFRAGMENTS "linker.lf") + add_subdirectory(port) + + # After system initialization, `start_app` (and its other cores variant) is called. + # This is provided by the user or from another component. Since we can't establish + # dependency on what we don't know, force linker to not drop the symbol regardless + # of link line order. + target_link_libraries(${COMPONENT_LIB} INTERFACE "-u start_app") + + if(NOT CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE) + target_link_libraries(${COMPONENT_LIB} INTERFACE "-u start_app_other_cores") + endif() + + # Disable stack protection in files which are involved in initialization of that feature + set_source_files_properties( + "startup.c" "stack_check.c" + PROPERTIES COMPILE_FLAGS + -fno-stack-protector) + + if(NOT CMAKE_BUILD_EARLY_EXPANSION) + set_source_files_properties("${CMAKE_CURRENT_LIST_DIR}/sleep_modes.c" PROPERTIES + COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion") + endif() endif() -idf_component_register(SRCS "intr_alloc.c" - "esp_async_memcpy.c" - "panic.c" - "system_api.c" - "startup.c" - "system_time.c" - "sleep_modes.c" - INCLUDE_DIRS include - PRIV_REQUIRES spi_flash - # [refactor-todo] requirements due to init code, - # should be removable once using component init functions - # link-time registration is used. - esp_pm app_update nvs_flash pthread app_trace esp_gdbstub - LDFRAGMENTS "linker.lf") - -add_subdirectory(port) - -# After system initialization, `start_app` (and its other cores variant) is called. -# This is provided by the user or from another component. Since we can't establish -# dependency on what we don't know, force linker to not drop the symbol regardless -# of link line order. -target_link_libraries(${COMPONENT_LIB} INTERFACE "-u start_app") - -if(NOT CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE) - target_link_libraries(${COMPONENT_LIB} INTERFACE "-u start_app_other_cores") -endif() - -# Disable stack protection in files which are involved in initialization of that feature -set_source_files_properties( - startup.c - PROPERTIES COMPILE_FLAGS - -fno-stack-protector) - -if(NOT CMAKE_BUILD_EARLY_EXPANSION) - set_source_files_properties("${CMAKE_CURRENT_LIST_DIR}/sleep_modes.c" PROPERTIES - COMPILE_FLAGS "-fno-jump-tables -fno-tree-switch-conversion") +if(CONFIG_IDF_ENV_FPGA) + # Forces the linker to include fpga stubs from this component + target_link_libraries(${COMPONENT_LIB} INTERFACE "-u esp_common_include_fpga_overrides") endif() diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 16171815e8..486c8cde45 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -1,3 +1,4 @@ + menu "ESP System Settings" choice ESP_SYSTEM_PANIC @@ -122,4 +123,282 @@ menu "ESP System Settings" endmenu # Memory protection + config ESP_SYSTEM_EVENT_QUEUE_SIZE + int "System event queue size" + default 32 + help + Config system event queue size in different application. + + config ESP_SYSTEM_EVENT_TASK_STACK_SIZE + int "Event loop task stack size" + default 2304 + help + Config system event task stack size in different application. + + config ESP_MAIN_TASK_STACK_SIZE + int "Main task stack size" + default 3584 + help + Configure the "main task" stack size. This is the stack of the task + which calls app_main(). If app_main() returns then this task is deleted + and its stack memory is freed. + + config ESP_MINIMAL_SHARED_STACK_SIZE + int "Minimal allowed size for shared stack" + default 2048 + help + Minimal value of size, in bytes, accepted to execute a expression + with shared stack. + + choice ESP_CONSOLE_UART + prompt "Channel for console output" + default ESP_CONSOLE_UART_DEFAULT + help + Select where to send console output (through stdout and stderr). + + - Default is to use UART0 on pre-defined GPIOs. + - If "Custom" is selected, UART0 or UART1 can be chosen, + and any pins can be selected. + - If "None" is selected, there will be no console output on any UART, except + for initial output from ROM bootloader. This ROM output can be suppressed by + GPIO strapping or EFUSE, refer to chip datasheet for details. + - On chips with USB peripheral, "USB CDC" option redirects output to the + CDC port. This option uses the CDC driver in the chip ROM. + This option is incompatible with TinyUSB stack. + config ESP_CONSOLE_UART_DEFAULT + bool "Default: UART0" + config ESP_CONSOLE_USB_CDC + bool "USB CDC" + # The naming is confusing: USB_ENABLED means that TinyUSB driver is enabled, not USB in general. + # && !USB_ENABLED is because the ROM CDC driver is currently incompatible with TinyUSB. + depends on IDF_TARGET_ESP32S2 && !USB_ENABLED + config ESP_CONSOLE_UART_CUSTOM + bool "Custom UART" + config ESP_CONSOLE_NONE + bool "None" + endchoice + + # Internal option, indicates that console UART is used (and not USB, for example) + config ESP_CONSOLE_UART + bool + default y if ESP_CONSOLE_UART_DEFAULT || ESP_CONSOLE_UART_CUSTOM + + config ESP_CONSOLE_MULTIPLE_UART + bool + default y if !IDF_TARGET_ESP32C3 + + choice ESP_CONSOLE_UART_NUM + prompt "UART peripheral to use for console output (0-1)" + depends on ESP_CONSOLE_UART_CUSTOM && ESP_CONSOLE_MULTIPLE_UART + default ESP_CONSOLE_UART_CUSTOM_NUM_0 + help + This UART peripheral is used for console output from the ESP-IDF Bootloader and the app. + + If the configuration is different in the Bootloader binary compared to the app binary, UART + is reconfigured after the bootloader exits and the app starts. + + Due to an ESP32 ROM bug, UART2 is not supported for console output + via esp_rom_printf. + + config ESP_CONSOLE_UART_CUSTOM_NUM_0 + bool "UART0" + config ESP_CONSOLE_UART_CUSTOM_NUM_1 + bool "UART1" + endchoice + + config ESP_CONSOLE_UART_NUM + int + default 0 if ESP_CONSOLE_UART_DEFAULT + default 0 if !ESP_CONSOLE_MULTIPLE_UART + default 0 if ESP_CONSOLE_UART_CUSTOM_NUM_0 + default 1 if ESP_CONSOLE_UART_CUSTOM_NUM_1 + default -1 if !ESP_CONSOLE_UART + + config ESP_CONSOLE_UART_TX_GPIO + int "UART TX on GPIO#" + depends on ESP_CONSOLE_UART_CUSTOM + range 0 46 + default 1 if IDF_TARGET_ESP32 + default 21 if IDF_TARGET_ESP32C3 + default 43 + help + This GPIO is used for console UART TX output in the ESP-IDF Bootloader and the app (including + boot log output and default standard output and standard error of the app). + + If the configuration is different in the Bootloader binary compared to the app binary, UART + is reconfigured after the bootloader exits and the app starts. + + config ESP_CONSOLE_UART_RX_GPIO + int "UART RX on GPIO#" + depends on ESP_CONSOLE_UART_CUSTOM + range 0 46 + default 3 if IDF_TARGET_ESP32 + default 20 if IDF_TARGET_ESP32C3 + default 44 + help + This GPIO is used for UART RX input in the ESP-IDF Bootloader and the app (including + default default standard input of the app). + + Note: The default ESP-IDF Bootloader configures this pin but doesn't read anything from the UART. + + If the configuration is different in the Bootloader binary compared to the app binary, UART + is reconfigured after the bootloader exits and the app starts. + + + config ESP_CONSOLE_UART_BAUDRATE + int + prompt "UART console baud rate" if ESP_CONSOLE_UART_CUSTOM + depends on ESP_CONSOLE_UART + default 115200 + range 1200 4000000 if !PM_ENABLE + range 1200 1000000 if PM_ENABLE + help + This baud rate is used by both the ESP-IDF Bootloader and the app (including + boot log output and default standard input/output/error of the app). + + The app's maximum baud rate depends on the UART clock source. If Power Management is disabled, + the UART clock source is the APB clock and all baud rates in the available range will be sufficiently + accurate. If Power Management is enabled, REF_TICK clock source is used so the baud rate is divided + from 1MHz. Baud rates above 1Mbps are not possible and values between 500Kbps and 1Mbps may not be + accurate. + + If the configuration is different in the Bootloader binary compared to the app binary, UART + is reconfigured after the bootloader exits and the app starts. + + config ESP_CONSOLE_USB_CDC_RX_BUF_SIZE + int "Size of USB CDC RX buffer" + depends on ESP_CONSOLE_USB_CDC + default 64 + range 4 16384 + help + Set the size of USB CDC RX buffer. Increase the buffer size if your application + is often receiving data over USB CDC. + + config ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF + bool "Enable esp_rom_printf / ESP_EARLY_LOG via USB CDC" + depends on ESP_CONSOLE_USB_CDC + default n + help + If enabled, esp_rom_printf and ESP_EARLY_LOG output will also be sent over USB CDC. + Disabling this option saves about 1kB or RAM. + + config ESP_INT_WDT + bool "Interrupt watchdog" + default y + help + This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time, + either because a task turned off interrupts and did not turn them on for a long time, or because an + interrupt handler did not return. It will try to invoke the panic handler first and failing that + reset the SoC. + + config ESP_INT_WDT_TIMEOUT_MS + int "Interrupt watchdog timeout (ms)" + depends on ESP_INT_WDT + default 300 if !ESP32_SPIRAM_SUPPORT + default 800 if ESP32_SPIRAM_SUPPORT + range 10 10000 + help + The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate. + + config ESP_INT_WDT_CHECK_CPU1 + bool "Also watch CPU1 tick interrupt" + depends on ESP_INT_WDT && !FREERTOS_UNICORE + default y + help + Also detect if interrupts on CPU 1 are disabled for too long. + + config ESP_TASK_WDT + bool "Initialize Task Watchdog Timer on startup" + default y + help + The Task Watchdog Timer can be used to make sure individual tasks are still + running. Enabling this option will cause the Task Watchdog Timer to be + initialized automatically at startup. The Task Watchdog timer can be + initialized after startup as well (see Task Watchdog Timer API Reference) + + config ESP_TASK_WDT_PANIC + bool "Invoke panic handler on Task Watchdog timeout" + depends on ESP_TASK_WDT + default n + help + If this option is enabled, the Task Watchdog Timer will be configured to + trigger the panic handler when it times out. This can also be configured + at run time (see Task Watchdog Timer API Reference) + + config ESP_TASK_WDT_TIMEOUT_S + int "Task Watchdog timeout period (seconds)" + depends on ESP_TASK_WDT + range 1 60 + default 5 + help + Timeout period configuration for the Task Watchdog Timer in seconds. + This is also configurable at run time (see Task Watchdog Timer API Reference) + + config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 + bool "Watch CPU0 Idle Task" + depends on ESP_TASK_WDT + default y + help + If this option is enabled, the Task Watchdog Timer will watch the CPU0 + Idle Task. Having the Task Watchdog watch the Idle Task allows for detection + of CPU starvation as the Idle Task not being called is usually a symptom of + CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household + tasks depend on the Idle Task getting some runtime every now and then. + + config ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 + bool "Watch CPU1 Idle Task" + depends on ESP_TASK_WDT && !FREERTOS_UNICORE + default y + help + If this option is enabled, the Task Wtachdog Timer will wach the CPU1 + Idle Task. + + config ESP_IPC_TASK_STACK_SIZE + int "Inter-Processor Call (IPC) task stack size" + range 512 65536 if !APPTRACE_ENABLE + range 2048 65536 if APPTRACE_ENABLE + default 2048 if APPTRACE_ENABLE + default 1024 + help + Configure the IPC tasks stack size. One IPC task runs on each core + (in dual core mode), and allows for cross-core function calls. + + See IPC documentation for more details. + + The default stack size should be enough for most common use cases. + It can be shrunk if you are sure that you do not use any custom + IPC functionality. + + config ESP_IPC_USES_CALLERS_PRIORITY + bool "IPC runs at caller's priority" + default y + depends on !FREERTOS_UNICORE + help + If this option is not enabled then the IPC task will keep behavior + same as prior to that of ESP-IDF v4.0, and hence IPC task will run + at (configMAX_PRIORITIES - 1) priority. + + config ESP_PANIC_HANDLER_IRAM + bool "Place panic handler code in IRAM" + default n + help + If this option is disabled (default), the panic handler code is placed in flash not IRAM. + This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will + automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor + risk, if the flash cache status is also corrupted during the crash. + + If this option is enabled, the panic handler code is placed in IRAM. This allows the panic + handler to run without needing to re-enable cache first. This may be necessary to debug some + complex issues with crashes while flash cache is disabled (for example, when writing to + SPI flash.) + + config ESP_DEBUG_STUBS_ENABLE + bool + default COMPILER_OPTIMIZATION_LEVEL_DEBUG + depends on !ESP32_TRAX && !ESP32S2_TRAX + help + Debug stubs are used by OpenOCD to execute pre-compiled onboard code + which does some useful debugging stuff, e.g. GCOV data dump. + + endmenu # ESP System Settings diff --git a/components/esp_system/component.mk b/components/esp_system/component.mk index d78bcef737..e6a0693ae7 100644 --- a/components/esp_system/component.mk +++ b/components/esp_system/component.mk @@ -1,11 +1,26 @@ +ifdef IS_BOOTLOADER_BUILD + +ifndef CONFIG_IDF_ENV_FPGA +COMPONENT_CONFIG_ONLY := 1 +else +COMPONENT_SRCDIRS := . +COMPONENT_OBJS += fpga_overrides.o +endif + +else SOC_NAME := $(IDF_TARGET) COMPONENT_SRCDIRS := . COMPONENT_ADD_INCLUDEDIRS := include -COMPONENT_PRIV_INCLUDEDIRS := private_include port/include +COMPONENT_PRIV_INCLUDEDIRS := port/include port COMPONENT_ADD_LDFRAGMENTS += linker.lf +ifndef CONFIG_IDF_ENV_FPGA +COMPONENT_OBJEXCLUDE += fpga_overrides.o +endif + include $(COMPONENT_PATH)/port/soc/$(SOC_NAME)/component.mk # disable stack protection in files which are involved in initialization of that feature -startup.o: CFLAGS := $(filter-out -fstack-protector%, $(CFLAGS)) +startup.o stack_check.o: CFLAGS := $(filter-out -fstack-protector%, $(CFLAGS)) +endif diff --git a/components/esp_common/src/dbg_stubs.c b/components/esp_system/dbg_stubs.c similarity index 100% rename from components/esp_common/src/dbg_stubs.c rename to components/esp_system/dbg_stubs.c diff --git a/components/esp_common/src/esp_err.c b/components/esp_system/esp_err.c similarity index 98% rename from components/esp_common/src/esp_err.c rename to components/esp_system/esp_err.c index 4aa6a230d0..9df59f9290 100644 --- a/components/esp_common/src/esp_err.c +++ b/components/esp_system/esp_err.c @@ -12,6 +12,7 @@ // See the License for the specific language governing permissions and // limitations under the License. #include +#include #include #include "esp_err.h" diff --git a/components/esp_common/src/fpga_overrides.c b/components/esp_system/fpga_overrides.c similarity index 100% rename from components/esp_common/src/fpga_overrides.c rename to components/esp_system/fpga_overrides.c diff --git a/components/esp_common/src/freertos_hooks.c b/components/esp_system/freertos_hooks.c similarity index 100% rename from components/esp_common/src/freertos_hooks.c rename to components/esp_system/freertos_hooks.c diff --git a/components/esp_common/include/esp_expression_with_stack.h b/components/esp_system/include/esp_expression_with_stack.h similarity index 100% rename from components/esp_common/include/esp_expression_with_stack.h rename to components/esp_system/include/esp_expression_with_stack.h diff --git a/components/esp_common/include/esp_freertos_hooks.h b/components/esp_system/include/esp_freertos_hooks.h similarity index 99% rename from components/esp_common/include/esp_freertos_hooks.h rename to components/esp_system/include/esp_freertos_hooks.h index 47db07ce9d..290d580b1d 100644 --- a/components/esp_common/include/esp_freertos_hooks.h +++ b/components/esp_system/include/esp_freertos_hooks.h @@ -16,6 +16,9 @@ #define __ESP_FREERTOS_HOOKS_H__ #include + +#include "freertos/portmacro.h" + #include "esp_err.h" #ifdef __cplusplus diff --git a/components/esp_common/include/esp_int_wdt.h b/components/esp_system/include/esp_int_wdt.h similarity index 100% rename from components/esp_common/include/esp_int_wdt.h rename to components/esp_system/include/esp_int_wdt.h diff --git a/components/esp_common/include/esp_private/crosscore_int.h b/components/esp_system/include/esp_private/crosscore_int.h similarity index 96% rename from components/esp_common/include/esp_private/crosscore_int.h rename to components/esp_system/include/esp_private/crosscore_int.h index e6f7801767..bac4afba29 100644 --- a/components/esp_common/include/esp_private/crosscore_int.h +++ b/components/esp_system/include/esp_private/crosscore_int.h @@ -14,6 +14,9 @@ #ifndef __ESP_CROSSCORE_INT_H #define __ESP_CROSSCORE_INT_H +#ifdef __cplusplus +extern "C" { +#endif /** * Initialize the crosscore interrupt system for this CPU. @@ -61,4 +64,8 @@ void esp_crosscore_int_send_freq_switch(int core_id); */ void esp_crosscore_int_send_print_backtrace(int core_id); +#ifdef __cplusplus +} +#endif + #endif diff --git a/components/esp_common/include/esp_private/dbg_stubs.h b/components/esp_system/include/esp_private/dbg_stubs.h similarity index 95% rename from components/esp_common/include/esp_private/dbg_stubs.h rename to components/esp_system/include/esp_private/dbg_stubs.h index c784de9845..f3f5fba3b7 100644 --- a/components/esp_common/include/esp_private/dbg_stubs.h +++ b/components/esp_system/include/esp_private/dbg_stubs.h @@ -14,6 +14,10 @@ #ifndef ESP_DBG_STUBS_H_ #define ESP_DBG_STUBS_H_ +#ifdef __cplusplus +extern "C" { +#endif + #include "esp_err.h" /** @@ -47,4 +51,8 @@ void esp_dbg_stubs_init(void); */ esp_err_t esp_dbg_stub_entry_set(esp_dbg_stub_id_t id, uint32_t entry); +#ifdef __cplusplus +} +#endif + #endif //ESP_DBG_STUBS_H_ diff --git a/components/esp_common/include/esp_private/system_internal.h b/components/esp_system/include/esp_private/system_internal.h similarity index 100% rename from components/esp_common/include/esp_private/system_internal.h rename to components/esp_system/include/esp_private/system_internal.h diff --git a/components/esp_common/include/esp_task.h b/components/esp_system/include/esp_task.h similarity index 100% rename from components/esp_common/include/esp_task.h rename to components/esp_system/include/esp_task.h diff --git a/components/esp_common/include/esp_task_wdt.h b/components/esp_system/include/esp_task_wdt.h similarity index 100% rename from components/esp_common/include/esp_task_wdt.h rename to components/esp_system/include/esp_task_wdt.h diff --git a/components/esp_common/src/int_wdt.c b/components/esp_system/int_wdt.c similarity index 100% rename from components/esp_common/src/int_wdt.c rename to components/esp_system/int_wdt.c diff --git a/components/esp_system/linker.lf b/components/esp_system/linker.lf index 00544ff0df..b8c568f0e3 100644 --- a/components/esp_system/linker.lf +++ b/components/esp_system/linker.lf @@ -5,6 +5,7 @@ entries: panic_handler (noflash) panic_arch (noflash) reset_reason (noflash) + esp_err (noflash) system_api:esp_system_abort (noflash) if ESP_CONSOLE_USB_CDC_SUPPORT_ETS_PRINTF: diff --git a/components/esp_system/panic.c b/components/esp_system/panic.c index 196e46ec6d..d35057ccb1 100644 --- a/components/esp_system/panic.c +++ b/components/esp_system/panic.c @@ -21,8 +21,6 @@ #include "esp_private/usb_console.h" #include "esp_ota_ops.h" -#include "esp_core_dump.h" - #include "soc/cpu.h" #include "soc/rtc.h" #include "hal/timer_hal.h" @@ -35,7 +33,7 @@ #include "sdkconfig.h" -#if CONFIG_ESP32_ENABLE_COREDUMP +#if CONFIG_ESP_COREDUMP_ENABLE #include "esp_core_dump.h" #endif diff --git a/components/esp_system/port/CMakeLists.txt b/components/esp_system/port/CMakeLists.txt index 628c79f007..cc098d8092 100644 --- a/components/esp_system/port/CMakeLists.txt +++ b/components/esp_system/port/CMakeLists.txt @@ -1,6 +1,6 @@ -target_include_directories(${COMPONENT_LIB} PRIVATE include) +target_include_directories(${COMPONENT_LIB} PRIVATE include .) -set(srcs "cpu_start.c" "panic_handler.c") +set(srcs "cpu_start.c" "panic_handler.c" "brownout.c") add_prefix(srcs "${CMAKE_CURRENT_LIST_DIR}/" ${srcs}) target_sources(${COMPONENT_LIB} PRIVATE ${srcs}) diff --git a/components/esp_common/src/brownout.c b/components/esp_system/port/brownout.c similarity index 100% rename from components/esp_common/src/brownout.c rename to components/esp_system/port/brownout.c diff --git a/components/esp_system/sdkconfig.rename b/components/esp_system/sdkconfig.rename index 33bdd49f17..5d113edd17 100644 --- a/components/esp_system/sdkconfig.rename +++ b/components/esp_system/sdkconfig.rename @@ -16,3 +16,30 @@ CONFIG_ESP32C3_MEMPROT_FEATURE CONFIG_ESP_SYSTEM_MEMPRO CONFIG_ESP32C3_MEMPROT_FEATURE_LOCK CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK CONFIG_ESP32_RTC_XTAL_BOOTSTRAP_CYCLES CONFIG_ESP_SYSTEM_RTC_EXT_XTAL_BOOTSTRAP_CYCLES + +CONFIG_SYSTEM_EVENT_QUEUE_SIZE CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE +CONFIG_MAIN_TASK_STACK_SIZE CONFIG_ESP_MAIN_TASK_STACK_SIZE +CONFIG_IPC_TASK_STACK_SIZE CONFIG_ESP_IPC_TASK_STACK_SIZE +CONFIG_CONSOLE_UART CONFIG_ESP_CONSOLE_UART +CONFIG_CONSOLE_UART_DEFAULT CONFIG_ESP_CONSOLE_UART_DEFAULT +CONFIG_CONSOLE_UART_CUSTOM CONFIG_ESP_CONSOLE_UART_CUSTOM +CONFIG_CONSOLE_UART_NONE CONFIG_ESP_CONSOLE_NONE +CONFIG_ESP_CONSOLE_UART_NONE CONFIG_ESP_CONSOLE_NONE +CONFIG_CONSOLE_UART_NUM CONFIG_ESP_CONSOLE_UART_NUM +CONFIG_CONSOLE_UART_CUSTOM_NUM_0 CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0 +CONFIG_CONSOLE_UART_CUSTOM_NUM_1 CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 +CONFIG_CONSOLE_UART_TX_GPIO CONFIG_ESP_CONSOLE_UART_TX_GPIO +CONFIG_CONSOLE_UART_RX_GPIO CONFIG_ESP_CONSOLE_UART_RX_GPIO +CONFIG_CONSOLE_UART_BAUDRATE CONFIG_ESP_CONSOLE_UART_BAUDRATE +CONFIG_INT_WDT CONFIG_ESP_INT_WDT +CONFIG_INT_WDT_TIMEOUT_MS CONFIG_ESP_INT_WDT_TIMEOUT_MS +CONFIG_INT_WDT_CHECK_CPU1 CONFIG_ESP_INT_WDT_CHECK_CPU1 +CONFIG_TASK_WDT CONFIG_ESP_TASK_WDT +CONFIG_TASK_WDT_PANIC CONFIG_ESP_TASK_WDT_PANIC +CONFIG_TASK_WDT_TIMEOUT_S CONFIG_ESP_TASK_WDT_TIMEOUT_S +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0 +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1 +CONFIG_ESP32_DEBUG_STUBS_ENABLE CONFIG_ESP_DEBUG_STUBS_ENABLE +CONFIG_ESP32_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP +CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP diff --git a/components/esp_common/src/stack_check.c b/components/esp_system/stack_check.c similarity index 100% rename from components/esp_common/src/stack_check.c rename to components/esp_system/stack_check.c diff --git a/components/esp_system/startup.c b/components/esp_system/startup.c index 3ad549d267..4527ffa48a 100644 --- a/components/esp_system/startup.c +++ b/components/esp_system/startup.c @@ -45,7 +45,11 @@ #include "nvs_flash.h" #include "esp_phy_init.h" #include "esp_coexist_internal.h" + +#if CONFIG_ESP_COREDUMP_ENABLE #include "esp_core_dump.h" +#endif + #include "esp_app_trace.h" #include "esp_private/dbg_stubs.h" #include "esp_flash_encrypt.h" diff --git a/components/esp_common/src/task_wdt.c b/components/esp_system/task_wdt.c similarity index 99% rename from components/esp_common/src/task_wdt.c rename to components/esp_system/task_wdt.c index 5c73e20774..27a68a5b15 100644 --- a/components/esp_common/src/task_wdt.c +++ b/components/esp_system/task_wdt.c @@ -164,7 +164,9 @@ static void task_wdt_isr(void *arg) for (twdttask=twdt_config->list; twdttask!=NULL; twdttask=twdttask->next) { if (!twdttask->has_reset) { cpu=xTaskGetAffinity(twdttask->task_handle)==0?DRAM_STR("CPU 0"):DRAM_STR("CPU 1"); - if (xTaskGetAffinity(twdttask->task_handle)==tskNO_AFFINITY) cpu=DRAM_STR("CPU 0/1"); + if (xTaskGetAffinity(twdttask->task_handle)==tskNO_AFFINITY) { + cpu=DRAM_STR("CPU 0/1"); + } ESP_EARLY_LOGE(TAG, " - %s (%s)", pcTaskGetTaskName(twdttask->task_handle), cpu); } } diff --git a/components/esp_common/test/test_delay.c b/components/esp_system/test/test_delay.c similarity index 100% rename from components/esp_common/test/test_delay.c rename to components/esp_system/test/test_delay.c diff --git a/components/esp_common/test/test_atomic.c b/components/newlib/test/test_atomic.c similarity index 100% rename from components/esp_common/test/test_atomic.c rename to components/newlib/test/test_atomic.c diff --git a/docs/doxygen/Doxyfile_common b/docs/doxygen/Doxyfile_common index 71866087e4..d77df83d48 100644 --- a/docs/doxygen/Doxyfile_common +++ b/docs/doxygen/Doxyfile_common @@ -226,15 +226,15 @@ INPUT = \ $(IDF_PATH)/components/esp_system/include/esp_intr_alloc.h \ ## Watchdogs ## NOTE: for two lines below header_file.inc is not used - $(IDF_PATH)/components/esp_common/include/esp_int_wdt.h \ - $(IDF_PATH)/components/esp_common/include/esp_task_wdt.h \ - $(IDF_PATH)/components/esp_common/include/esp_crc.h \ + $(IDF_PATH)/components/esp_system/include/esp_int_wdt.h \ + $(IDF_PATH)/components/esp_system/include/esp_task_wdt.h \ + $(IDF_PATH)/components/esp_hw_support/include/esp_crc.h \ ## Hooks - $(IDF_PATH)/components/esp_common/include/esp_freertos_hooks.h \ + $(IDF_PATH)/components/esp_system/include/esp_freertos_hooks.h \ ## Inter-Processor Call $(IDF_PATH)/components/esp_ipc/include/esp_ipc.h \ ## Call Function with External stack - $(IDF_PATH)/components/esp_common/include/esp_expression_with_stack.h \ + $(IDF_PATH)/components/esp_system/include/esp_expression_with_stack.h \ ## Over The Air Updates (OTA) $(IDF_PATH)/components/app_update/include/esp_ota_ops.h \ ## ESP HTTPS OTA diff --git a/docs/en/api-guides/build-system.rst b/docs/en/api-guides/build-system.rst index d2964f25cb..9643e70a7b 100644 --- a/docs/en/api-guides/build-system.rst +++ b/docs/en/api-guides/build-system.rst @@ -618,7 +618,7 @@ Common component requirements To avoid duplication, every component automatically requires some "common" IDF components even if they are not mentioned explicitly. Headers from these components can always be included. -The list of common components is: freertos, newlib, heap, log, soc, esp_rom, esp_common, xtensa/riscv, cxx. +The list of common components is: cxx, newlib, freertos, esp_hw_support, heap, log, lwip, soc, hal, esp_rom, esp_common, esp_system. Including components in the build ---------------------------------- diff --git a/docs/en/api-reference/system/wdts.rst b/docs/en/api-reference/system/wdts.rst index 6843ab3a4d..5b7d3fbabb 100644 --- a/docs/en/api-reference/system/wdts.rst +++ b/docs/en/api-reference/system/wdts.rst @@ -128,7 +128,7 @@ Interrupt Watchdog API Reference Header File ^^^^^^^^^^^ - * :component_file:`esp_common/include/esp_int_wdt.h` + * :component_file:`esp_system/include/esp_int_wdt.h` Functions diff --git a/docs/zh_CN/api-guides/build-system.rst b/docs/zh_CN/api-guides/build-system.rst index 201c68f62f..7934b935c3 100644 --- a/docs/zh_CN/api-guides/build-system.rst +++ b/docs/zh_CN/api-guides/build-system.rst @@ -618,7 +618,7 @@ Spark Plug 组件 为避免重复性工作,各组件都用自动依赖一些“通用” IDF 组件,即使它们没有被明确提及。这些组件的头文件会一直包含在构建系统中。 -通用组件包括:freertos、newlibheap、log、soc、esp_rom、esp_common、xtensa、cxx。 +通用组件包括:cxx, newlib, freertos, esp_hw_support, heap, log, lwip, soc, hal, esp_rom, esp_common, esp_system。 在构建中导入组件 ----------------- diff --git a/tools/ci/check_public_headers_exceptions.txt b/tools/ci/check_public_headers_exceptions.txt index fe42aecfcd..a76dd29913 100644 --- a/tools/ci/check_public_headers_exceptions.txt +++ b/tools/ci/check_public_headers_exceptions.txt @@ -117,7 +117,6 @@ components/esp_rom/include/esp32s2/rom/cache.h components/esp_rom/include/esp32s2/rom/secure_boot.h components/esp_rom/include/esp32s2/rom/opi_flash.h components/esp_rom/include/esp32s2/rom/efuse.h -components/esp_common/include/esp_freertos_hooks.h components/esp32/include/esp32/dport_access.h components/esp32/include/rom/sha.h components/esp32/include/rom/secure_boot.h diff --git a/tools/cmake/build.cmake b/tools/cmake/build.cmake index 54fd6520fb..3ba3186d89 100644 --- a/tools/cmake/build.cmake +++ b/tools/cmake/build.cmake @@ -112,10 +112,13 @@ function(__build_set_default_build_specifications) list(APPEND cxx_compile_options "-std=gnu++11") + list(APPEND link_options "-Wl,--gc-sections") + idf_build_set_property(COMPILE_DEFINITIONS "${compile_definitions}" APPEND) idf_build_set_property(COMPILE_OPTIONS "${compile_options}" APPEND) idf_build_set_property(C_COMPILE_OPTIONS "${c_compile_options}" APPEND) idf_build_set_property(CXX_COMPILE_OPTIONS "${cxx_compile_options}" APPEND) + idf_build_set_property(LINK_OPTIONS "${link_options}" APPEND) endfunction() #