diff --git a/components/hal/esp32c2/include/hal/gpio_ll.h b/components/hal/esp32c2/include/hal/gpio_ll.h
index ebaf2be948..713ab365cf 100644
--- a/components/hal/esp32c2/include/hal/gpio_ll.h
+++ b/components/hal/esp32c2/include/hal/gpio_ll.h
@@ -21,6 +21,7 @@
 #include "soc/rtc_cntl_reg.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -60,7 +61,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
@@ -534,7 +535,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
 {
     gpio_func_in_sel_cfg_reg_t reg;
     reg.val = hw->func_in_sel_cfg[in_sig_idx].val;
-    return (reg.sig_in_sel ? reg.func_sel : -1);
+    return (reg.sig_in_sel ? reg.in_sel : -1);
 }
 
 /**
diff --git a/components/hal/esp32c3/include/hal/gpio_ll.h b/components/hal/esp32c3/include/hal/gpio_ll.h
index 26131ef0a6..3b18c029d5 100644
--- a/components/hal/esp32c3/include/hal/gpio_ll.h
+++ b/components/hal/esp32c3/include/hal/gpio_ll.h
@@ -23,6 +23,7 @@
 #include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -528,7 +529,7 @@ static inline int gpio_ll_get_in_signal_connected_io(gpio_dev_t *hw, uint32_t in
 {
     typeof(hw->func_in_sel_cfg[in_sig_idx]) reg;
     reg.val = hw->func_in_sel_cfg[in_sig_idx].val;
-    return (reg.sig_in_sel ? reg.func_sel : -1);
+    return (reg.sig_in_sel ? reg.in_sel : -1);
 }
 
 /**
@@ -740,7 +741,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     gpio_ll_get_drive_capability(hw, gpio_num, (gpio_drive_cap_t *)drv); // specific workaround in the LL
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].func_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32c6/include/hal/gpio_ll.h b/components/hal/esp32c6/include/hal/gpio_ll.h
index b1748b21e8..a300388165 100644
--- a/components/hal/esp32c6/include/hal/gpio_ll.h
+++ b/components/hal/esp32c6/include/hal/gpio_ll.h
@@ -20,7 +20,6 @@
 #include "soc/gpio_periph.h"
 #include "soc/gpio_struct.h"
 #include "soc/lp_aon_struct.h"
-#include "soc/lp_io_struct.h"
 #include "soc/pmu_struct.h"
 #include "soc/usb_serial_jtag_reg.h"
 #include "soc/pcr_struct.h"
@@ -28,6 +27,7 @@
 #include "hal/gpio_types.h"
 #include "hal/misc.h"
 #include "hal/assert.h"
+#include "hal/misc.h"
 
 #ifdef __cplusplus
 extern "C" {
@@ -67,7 +67,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32c6/include/hal/rtc_io_ll.h b/components/hal/esp32c6/include/hal/rtc_io_ll.h
index b4285aef95..c58cbbecf1 100644
--- a/components/hal/esp32c6/include/hal/rtc_io_ll.h
+++ b/components/hal/esp32c6/include/hal/rtc_io_ll.h
@@ -111,9 +111,9 @@ static inline void rtcio_ll_output_disable(int rtcio_num)
 static inline void rtcio_ll_set_level(int rtcio_num, uint32_t level)
 {
     if (level) {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_data_w1ts, BIT(rtcio_num));
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1ts, out_w1ts, BIT(rtcio_num));
     } else {
-        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_data_w1tc, BIT(rtcio_num));
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.out_data_w1tc, out_w1tc, BIT(rtcio_num));
     }
 }
 
@@ -406,7 +406,7 @@ static inline  uint32_t rtcio_ll_get_interrupt_status(void)
  */
 static inline  void rtcio_ll_clear_interrupt_status(void)
 {
-    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.status_w1tc, status_w1tc, 0xff);
+    HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IO.status_w1tc, status_intr_w1tc, 0xff);
 }
 
 #ifdef __cplusplus
diff --git a/components/hal/esp32h2/include/hal/gpio_ll.h b/components/hal/esp32h2/include/hal/gpio_ll.h
index 4a4f550863..dfa1cbb087 100644
--- a/components/hal/esp32h2/include/hal/gpio_ll.h
+++ b/components/hal/esp32h2/include/hal/gpio_ll.h
@@ -66,7 +66,7 @@ static inline void gpio_ll_get_io_config(gpio_dev_t *hw, uint32_t gpio_num,
     *od = hw->pin[gpio_num].pad_driver;
     *drv = (iomux_reg_val & FUN_DRV_M) >> FUN_DRV_S;
     *fun_sel = (iomux_reg_val & MCU_SEL_M) >> MCU_SEL_S;
-    *sig_out = hw->func_out_sel_cfg[gpio_num].out_sel;
+    *sig_out = HAL_FORCE_READ_U32_REG_FIELD(hw->func_out_sel_cfg[gpio_num], out_sel);
     *slp_sel = (iomux_reg_val & SLP_SEL_M) >> SLP_SEL_S;
 }
 
diff --git a/components/hal/esp32p4/include/hal/gpio_ll.h b/components/hal/esp32p4/include/hal/gpio_ll.h
index 2f9aa0460d..58fc8efd49 100644
--- a/components/hal/esp32p4/include/hal/gpio_ll.h
+++ b/components/hal/esp32p4/include/hal/gpio_ll.h
@@ -283,7 +283,9 @@ static inline void gpio_ll_pin_input_hysteresis_enable(gpio_dev_t *hw, uint32_t
     uint64_t bit_mask = 1ULL << gpio_num;
     if (!(bit_mask & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK)) {
         // GPIO0-15
-        LP_IOMUX.lp_pad_hys.reg_lp_gpio_hys |= bit_mask;
+        uint32_t hys_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys);
+        hys_mask |= bit_mask;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys, hys_mask);
     } else {
         if (gpio_num < 32 + SOC_RTCIO_PIN_COUNT) {
             // GPIO 16-47
@@ -306,7 +308,9 @@ static inline void gpio_ll_pin_input_hysteresis_disable(gpio_dev_t *hw, uint32_t
     uint64_t bit_mask = 1ULL << gpio_num;
     if (!(bit_mask & SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK)) {
         // GPIO0-15
-        LP_IOMUX.lp_pad_hys.reg_lp_gpio_hys &= ~bit_mask;
+        uint32_t hys_mask = HAL_FORCE_READ_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys);
+        hys_mask &= ~bit_mask;
+        HAL_FORCE_MODIFY_U32_REG_FIELD(LP_IOMUX.lp_pad_hys, reg_lp_gpio_hys, hys_mask);
     } else {
         if (gpio_num < 32 + SOC_RTCIO_PIN_COUNT) {
             // GPIO 16-47
diff --git a/components/hal/esp32s2/include/hal/gpio_ll.h b/components/hal/esp32s2/include/hal/gpio_ll.h
index f9b8f55380..bc22fd11b9 100644
--- a/components/hal/esp32s2/include/hal/gpio_ll.h
+++ b/components/hal/esp32s2/include/hal/gpio_ll.h
@@ -18,7 +18,6 @@
 #include "soc/soc.h"
 #include "soc/gpio_periph.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/rtc_io_reg.h"
 #include "soc/gpio_struct.h"
 #include "hal/gpio_types.h"
 #include "hal/assert.h"
diff --git a/components/hal/esp32s3/include/hal/gpio_ll.h b/components/hal/esp32s3/include/hal/gpio_ll.h
index 6966496f60..c500634728 100644
--- a/components/hal/esp32s3/include/hal/gpio_ll.h
+++ b/components/hal/esp32s3/include/hal/gpio_ll.h
@@ -18,7 +18,6 @@
 #include "soc/soc.h"
 #include "soc/gpio_periph.h"
 #include "soc/rtc_cntl_reg.h"
-#include "soc/rtc_io_reg.h"
 #include "soc/usb_serial_jtag_reg.h"
 #include "hal/gpio_types.h"
 #include "soc/gpio_struct.h"
diff --git a/components/soc/esp32c2/include/soc/gpio_struct.h b/components/soc/esp32c2/include/soc/gpio_struct.h
index 83f7f41402..97ab45e928 100644
--- a/components/soc/esp32c2/include/soc/gpio_struct.h
+++ b/components/soc/esp32c2/include/soc/gpio_struct.h
@@ -301,7 +301,7 @@ typedef union {
          *  set this value: s=0-53: connect GPIO[s] to this port. s=0x38: set this port always
          *  high level. s=0x3C: set this port always low level.
          */
-        uint32_t func_sel:5;
+        uint32_t in_sel:5;
         /** in_inv_sel : R/W; bitpos: [5]; default: 0;
          *  set this bit to invert input signal. 1:invert. 0:not invert.
          */
@@ -325,7 +325,7 @@ typedef union {
          *  output of GPIO[n] equals input of peripheral[s]. s=256: output of GPIO[n] equals
          *  GPIO_OUT_REG[n].
          */
-        uint32_t func_sel:8;
+        uint32_t out_sel:8;
         /** out_inv_sel : R/W; bitpos: [8]; default: 0;
          *  set this bit to invert output signal.1:invert.0:not invert.
          */
diff --git a/components/soc/esp32c3/include/soc/gpio_struct.h b/components/soc/esp32c3/include/soc/gpio_struct.h
index 45f5e55412..26aef1ead0 100644
--- a/components/soc/esp32c3/include/soc/gpio_struct.h
+++ b/components/soc/esp32c3/include/soc/gpio_struct.h
@@ -1,16 +1,8 @@
-// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
+/*
+ * SPDX-FileCopyrightText: 2020-2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
 #ifndef _SOC_GPIO_STRUCT_H_
 #define _SOC_GPIO_STRUCT_H_
 #include <stdint.h>
@@ -190,7 +182,7 @@ typedef volatile struct gpio_dev_s {
     uint32_t reserved_150;
     union {
         struct {
-            uint32_t func_sel:         5;
+            uint32_t in_sel:           5;
             uint32_t sig_in_inv:       1;
             uint32_t sig_in_sel:       1;
             uint32_t reserved7:       25;
@@ -327,7 +319,7 @@ typedef volatile struct gpio_dev_s {
     uint32_t reserved_550;
     union {
         struct {
-            uint32_t func_sel:          8;
+            uint32_t out_sel:           8;
             uint32_t inv_sel:           1;
             uint32_t oen_sel:           1;
             uint32_t oen_inv_sel:       1;
diff --git a/components/soc/esp32c6/include/soc/lp_io_struct.h b/components/soc/esp32c6/include/soc/lp_io_struct.h
index cfaa3127cf..e12d27246c 100644
--- a/components/soc/esp32c6/include/soc/lp_io_struct.h
+++ b/components/soc/esp32c6/include/soc/lp_io_struct.h
@@ -1,5 +1,5 @@
 /**
- * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
+ * SPDX-FileCopyrightText: 2022-2025 Espressif Systems (Shanghai) CO LTD
  *
  *  SPDX-License-Identifier: Apache-2.0
  */
@@ -30,10 +30,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_data_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** out_w1ts : WT; bitpos: [7:0]; default: 0;
          *  set one time output data
          */
-        uint32_t out_data_w1ts:8;
+        uint32_t out_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -44,10 +44,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** out_data_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** out_w1tc : WT; bitpos: [7:0]; default: 0;
          *  clear one time output data
          */
-        uint32_t out_data_w1tc:8;
+        uint32_t out_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -114,10 +114,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1ts : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1ts : WT; bitpos: [7:0]; default: 0;
          *  set one time output data
          */
-        uint32_t status_w1ts:8;
+        uint32_t status_intr_w1ts:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
@@ -128,10 +128,10 @@ typedef union {
  */
 typedef union {
     struct {
-        /** status_w1tc : WT; bitpos: [7:0]; default: 0;
+        /** status_intr_w1tc : WT; bitpos: [7:0]; default: 0;
          *  clear one time output data
          */
-        uint32_t status_w1tc:8;
+        uint32_t status_intr_w1tc:8;
         uint32_t reserved_8:24;
     };
     uint32_t val;
diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt
index 075a021ee2..4f58654b4f 100644
--- a/tools/ci/check_copyright_ignore.txt
+++ b/tools/ci/check_copyright_ignore.txt
@@ -654,7 +654,6 @@ components/soc/esp32c3/include/soc/boot_mode.h
 components/soc/esp32c3/include/soc/extmem_reg.h
 components/soc/esp32c3/include/soc/fe_reg.h
 components/soc/esp32c3/include/soc/gpio_reg.h
-components/soc/esp32c3/include/soc/gpio_struct.h
 components/soc/esp32c3/include/soc/i2c_reg.h
 components/soc/esp32c3/include/soc/interrupt_core0_reg.h
 components/soc/esp32c3/include/soc/ledc_reg.h