diff --git a/docs/docs_not_updated/esp32c6.txt b/docs/docs_not_updated/esp32c6.txt index 023b3148b0..3942c37633 100644 --- a/docs/docs_not_updated/esp32c6.txt +++ b/docs/docs_not_updated/esp32c6.txt @@ -119,7 +119,6 @@ api-reference/peripherals/usb_host api-reference/peripherals/twai api-reference/peripherals/hmac api-reference/peripherals/usb_device -api-reference/peripherals/gpio api-reference/peripherals/sdspi_host api-reference/peripherals/dac api-reference/peripherals/spi_slave diff --git a/docs/en/api-reference/peripherals/gpio.rst b/docs/en/api-reference/peripherals/gpio.rst index 531d8f40ae..80e091f982 100644 --- a/docs/en/api-reference/peripherals/gpio.rst +++ b/docs/en/api-reference/peripherals/gpio.rst @@ -903,6 +903,186 @@ Overview - SPI0/1: GPIO12-17 are usually used for SPI flash and not recommended for other uses. - RTC: GPIO0-5 can be used when in Deep-sleep mode. +.. only:: esp32c6 + + The {IDF_TARGET_NAME} chip features 31 physical GPIO pins (GPIO0 ~ GPIO30). + + - For chip variants with an SiP flash built in, GPIO24 ~ GPIO30 are dedicated to connecting the SiP flash; GPIO10 ~ GPIO11 are not led out to any chip pins; therefore, only the remaining 22 GPIO pins are available. + - For chip variants without an in-package flash, GPIO14 is not led out to any chip pins. + + Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see *{IDF_TARGET_NAME} Technical Reference Manual* > *IO MUX and GPIO Matrix (GPIO, IO_MUX)* [`PDF <{IDF_TARGET_TRM_EN_URL}#iomuxgpio>`__]. + + The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions. + + .. list-table:: + :header-rows: 1 + :widths: 8 12 12 20 + + * - GPIO + - Analog Function + - LP GPIO + - Comment + + * - GPIO0 + - ADC1_CH0 + - LP_GPIO0 + - + + * - GPIO1 + - ADC1_CH1 + - LP_GPIO1 + - + + * - GPIO2 + - ADC1_CH2 + - LP_GPIO2 + - + + * - GPIO3 + - ADC1_CH3 + - LP_GPIO3 + - + + * - GPIO4 + - ADC1_CH4 + - LP_GPIO4 + - Strapping pin + + * - GPIO5 + - ADC1_CH5 + - LP_GPIO5 + - Strapping pin + + * - GPIO6 + - ADC1_CH6 + - LP_GPIO6 + - + + * - GPIO7 + - + - LP_GPIO7 + - + + * - GPIO8 + - + - + - Strapping pin + + * - GPIO9 + - + - + - Strapping pin + + * - GPIO10 + - + - + - + + * - GPIO11 + - + - + - + + * - GPIO12 + - + - + - USB-JTAG + + * - GPIO13 + - + - + - USB-JTAG + + * - GPIO14 + - + - + - + + * - GPIO15 + - + - + - Strapping pin + + * - GPIO16 + - + - + - + + * - GPIO17 + - + - + - + + * - GPIO18 + - + - + - + + * - GPIO19 + - + - + - + + * - GPIO20 + - + - + - + + * - GPIO21 + - + - + - + + * - GPIO22 + - + - + - + + * - GPIO23 + - + - + - + + * - GPIO24 + - + - + - SPI0/1 + + * - GPIO25 + - + - + - SPI0/1 + + * - GPIO26 + - + - + - SPI0/1 + + * - GPIO27 + - + - + - SPI0/1 + + * - GPIO28 + - + - + - SPI0/1 + + * - GPIO29 + - + - + - SPI0/1 + + * - GPIO30 + - + - + - SPI0/1 + + .. note:: + + - Strapping pin: GPIO4, GPIO5, GPIO8, GPIO9, and GPIO15 are strapping pins. For more infomation, please refer to `ESP32C6 datasheet `_. + - SPI0/1: GPIO24-30 are usually used for SPI flash and not recommended for other uses. + - USB-JTAG: GPIO 12 and 13 are used by USB-JTAG by default. In order to use them as GPIOs, USB-JTAG will be disabled by the drivers. .. only:: SOC_RTCIO_INPUT_OUTPUT_SUPPORTED diff --git a/docs/zh_CN/api-reference/peripherals/gpio.rst b/docs/zh_CN/api-reference/peripherals/gpio.rst index 59b943fb71..d03678dc89 100644 --- a/docs/zh_CN/api-reference/peripherals/gpio.rst +++ b/docs/zh_CN/api-reference/peripherals/gpio.rst @@ -903,6 +903,186 @@ GPIO & RTC GPIO - SPI0/1：GPIO12-17 通常用于 SPI flash，不推荐用于其他用途。 - RTC：GPIO0-5 可以在 Deep-sleep 模式时使用。 +.. only:: esp32c6 + + {IDF_TARGET_NAME} 芯片具有 31 个物理 GPIO 管脚（GPIO0 ~ GPIO30）。 + + - 对于内置 SiP flash 的芯片型号，GPIO24 ~ GPIO30 专门用于连接 SiP flash; 且 GPIO10 ~ GPIO11 未引出至芯片管脚。因此，对于这类芯片只有 22 个 GPIO 管脚可用。 + - 对于无内置 SiP flash 的芯片型号，则 GPIO14 未引出至芯片管脚。 + + 每个管脚都可用作一个通用 IO，或连接一个内部的外设 信号。通过 GPIO 交换矩阵和 IO MUX，可配置外设模块的输入信号来源于任何的 IO 管脚，并且外设模块的输 出信号也可连接到任意 IO 管脚。这些模块共同组成了芯片的 IO 控制。更多详细信息，请参阅 *{IDF_TARGET_NAME} 技术参考手册* > *IO MUX 和 GPIO 矩阵（GPIO、IO_MUX）* [`PDF <{IDF_TARGET_TRM_CN_URL}#iomuxgpio>`__]。 + + 下表提供了各管脚的详细信息，部分 GPIO 具有特殊的使用限制，具体可参考表中的注释列。 + + .. list-table:: + :header-rows: 1 + :widths: 8 12 12 20 + + * - GPIO + - 模拟功能 + - LP GPIO + - 注释 + + * - GPIO0 + - ADC1_CH0 + - LP_GPIO0 + - + + * - GPIO1 + - ADC1_CH1 + - LP_GPIO1 + - + + * - GPIO2 + - ADC1_CH2 + - LP_GPIO2 + - + + * - GPIO3 + - ADC1_CH3 + - LP_GPIO3 + - + + * - GPIO4 + - ADC1_CH4 + - LP_GPIO4 + - Strapping 管脚 + + * - GPIO5 + - ADC1_CH5 + - LP_GPIO5 + - Strapping 管脚 + + * - GPIO6 + - ADC1_CH6 + - LP_GPIO6 + - + + * - GPIO7 + - + - LP_GPIO7 + - + + * - GPIO8 + - + - + - Strapping 管脚 + + * - GPIO9 + - + - + - Strapping 管脚 + + * - GPIO10 + - + - + - + + * - GPIO11 + - + - + - + + * - GPIO12 + - + - + - USB-JTAG + + * - GPIO13 + - + - + - USB-JTAG + + * - GPIO14 + - + - + - + + * - GPIO15 + - + - + - Strapping 管脚 + + * - GPIO16 + - + - + - + + * - GPIO17 + - + - + - + + * - GPIO18 + - + - + - + + * - GPIO19 + - + - + - + + * - GPIO20 + - + - + - + + * - GPIO21 + - + - + - + + * - GPIO22 + - + - + - + + * - GPIO23 + - + - + - + + * - GPIO24 + - + - + - SPI0/1 + + * - GPIO25 + - + - + - SPI0/1 + + * - GPIO26 + - + - + - SPI0/1 + + * - GPIO27 + - + - + - SPI0/1 + + * - GPIO28 + - + - + - SPI0/1 + + * - GPIO29 + - + - + - SPI0/1 + + * - GPIO30 + - + - + - SPI0/1 + + .. note:: + + - Strapping 管脚：GPIO4、GPIO5、GPIO8、GPIO9 和 GPIO15 是 Strapping 管脚。更多信息请参考 `ESP32-C6 技术规格书 `_。 + - SPI0/1：GPIO24-30 通常用于 SPI flash，不推荐用于其他用途。 + - USB-JTAG：GPIO12 和 GPIO13 默认用于 USB-JTAG。用做 GPIO 时驱动程序将禁用 USB-JTAG。 .. only:: SOC_RTCIO_INPUT_OUTPUT_SUPPORTED