From a485b1cb67724652585e4c5f1c4e6e4ae00aa7ba Mon Sep 17 00:00:00 2001 From: Sachin Parekh Date: Wed, 8 Feb 2023 14:17:24 +0530 Subject: [PATCH] esp32h2: Add support for ECC hardware accelerator --- components/hal/ecc_hal.c | 97 ++++++++ .../hal/esp32h2/include/hal/clk_gate_ll.h | 8 + components/hal/esp32h2/include/hal/ecc_ll.h | 209 ++++++++++++++++++ components/hal/include/hal/ecc_hal.h | 99 +++++++++ components/hal/include/hal/ecc_types.h | 20 +- .../include/esp32h2/idf_performance_target.h | 8 + .../esp32h2/include/soc/Kconfig.soc_caps.in | 8 + .../soc/esp32h2/include/soc/ecc_mult_reg.h | 20 +- .../soc/esp32h2/include/soc/ecc_mult_struct.h | 9 +- .../soc/esp32h2/include/soc/periph_defs.h | 1 + components/soc/esp32h2/include/soc/soc_caps.h | 2 + 11 files changed, 474 insertions(+), 7 deletions(-) create mode 100644 components/hal/esp32h2/include/hal/ecc_ll.h diff --git a/components/hal/ecc_hal.c b/components/hal/ecc_hal.c index c4063e1357..18ca952f8e 100644 --- a/components/hal/ecc_hal.c +++ b/components/hal/ecc_hal.c @@ -5,6 +5,7 @@ */ #include "hal/ecc_hal.h" #include "hal/ecc_ll.h" +#include "soc/soc_caps.h" void ecc_hal_set_mode(ecc_mode_t mode) { @@ -34,6 +35,11 @@ static void clear_param_registers(void) ecc_ll_write_param(ECC_PARAM_PX, buf, sizeof(buf)); ecc_ll_write_param(ECC_PARAM_PY, buf, sizeof(buf)); ecc_ll_write_param(ECC_PARAM_K, buf, sizeof(buf)); +#if SOC_ECC_EXTENDED_MODES_SUPPORTED + ecc_ll_write_param(ECC_PARAM_QX, buf, sizeof(buf)); + ecc_ll_write_param(ECC_PARAM_QY, buf, sizeof(buf)); + ecc_ll_write_param(ECC_PARAM_QZ, buf, sizeof(buf)); +#endif } void ecc_hal_write_mul_param(const uint8_t *k, const uint8_t *px, const uint8_t *py, uint16_t len) @@ -80,3 +86,94 @@ int ecc_hal_read_verify_result(void) { return ecc_ll_get_verification_result(); } + +#if SOC_ECC_EXTENDED_MODES_SUPPORTED + +void ecc_hal_set_mod_base(ecc_mod_base_t base) +{ + ecc_ll_set_mod_base(base); +} + +void ecc_hal_write_jacob_verify_param(const uint8_t *qx, const uint8_t *qy, const uint8_t *qz, uint16_t len) +{ + ecc_curve_t curve = len == 32 ? ECC_CURVE_SECP256R1 : ECC_CURVE_SECP192R1; + ecc_ll_set_curve(curve); + + clear_param_registers(); + + ecc_ll_write_param(ECC_PARAM_QX, qx, len); + ecc_ll_write_param(ECC_PARAM_QY, qy, len); + ecc_ll_write_param(ECC_PARAM_QZ, qz, len); +} + +int ecc_hal_read_jacob_mul_result(uint8_t *rx, uint8_t *ry, uint8_t *rz, uint16_t len) +{ + ecc_mode_t mode = ecc_ll_get_mode(); + + if (mode == ECC_MODE_POINT_VERIFY_JACOBIAN_MUL) { + if (!ecc_ll_get_verification_result()) { + memset(rx, 0x0, len); + memset(ry, 0x0, len); + memset(rz, 0x0, len); + return -1; + } + } + + ecc_ll_read_param(ECC_PARAM_QX, rx, len); + ecc_ll_read_param(ECC_PARAM_QY, ry, len); + ecc_ll_read_param(ECC_PARAM_QZ, rz, len); + return 0; +} + +void ecc_hal_write_point_add_param(const uint8_t *px, const uint8_t *py, const uint8_t *qx, const uint8_t *qy, const uint8_t *qz, uint16_t len) +{ + ecc_curve_t curve = len == 32 ? ECC_CURVE_SECP256R1 : ECC_CURVE_SECP192R1; + ecc_ll_set_curve(curve); + + clear_param_registers(); + + ecc_ll_write_param(ECC_PARAM_PX, px, len); + ecc_ll_write_param(ECC_PARAM_PY, py, len); + ecc_ll_write_param(ECC_PARAM_QX, qx, len); + ecc_ll_write_param(ECC_PARAM_QY, qy, len); + ecc_ll_write_param(ECC_PARAM_QZ, qz, len); +} + +int ecc_hal_read_point_add_result(uint8_t *rx, uint8_t *ry, uint8_t *rz, uint16_t len, bool read_jacob) +{ + if (read_jacob) { + ecc_ll_read_param(ECC_PARAM_QX, rx, len); + ecc_ll_read_param(ECC_PARAM_QY, ry, len); + ecc_ll_read_param(ECC_PARAM_QZ, rz, len); + } else { + ecc_ll_read_param(ECC_PARAM_PX, rx, len); + ecc_ll_read_param(ECC_PARAM_PY, ry, len); + } + return 0; +} + +void ecc_hal_write_mod_op_param(const uint8_t *a, const uint8_t *b, uint16_t len) +{ + ecc_curve_t curve = len == 32 ? ECC_CURVE_SECP256R1 : ECC_CURVE_SECP192R1; + ecc_ll_set_curve(curve); + + clear_param_registers(); + + ecc_ll_write_param(ECC_PARAM_PX, a, len); + ecc_ll_write_param(ECC_PARAM_PY, b, len); +} + +int ecc_hal_read_mod_op_result(uint8_t *r, uint16_t len) +{ + ecc_mode_t mode = ecc_ll_get_mode(); + if (mode == ECC_MODE_MOD_ADD || mode == ECC_MODE_MOD_SUB) { + ecc_ll_read_param(ECC_PARAM_PX, r, len); + } else if (mode == ECC_MODE_MOD_MUL || mode == ECC_MODE_INVERSE_MUL) { + ecc_ll_read_param(ECC_PARAM_PY, r, len); + } else { + return -1; + } + return 0; +} + +#endif /* SOC_ECC_EXTENDED_MODES_SUPPORTED */ diff --git a/components/hal/esp32h2/include/hal/clk_gate_ll.h b/components/hal/esp32h2/include/hal/clk_gate_ll.h index d5da31a927..3ffd6c51e0 100644 --- a/components/hal/esp32h2/include/hal/clk_gate_ll.h +++ b/components/hal/esp32h2/include/hal/clk_gate_ll.h @@ -63,6 +63,8 @@ static inline uint32_t periph_ll_get_clk_en_mask(periph_module_t periph) return PCR_AES_CLK_EN; case PERIPH_SHA_MODULE: return PCR_SHA_CLK_EN; + case PERIPH_ECC_MODULE: + return PCR_ECC_CLK_EN; case PERIPH_RSA_MODULE: return PCR_RSA_CLK_EN; case PERIPH_HMAC_MODULE: @@ -136,6 +138,8 @@ static inline uint32_t periph_ll_get_rst_en_mask(periph_module_t periph, bool en return PCR_PARL_RST_EN; case PERIPH_TEMPSENSOR_MODULE: return PCR_TSENS_RST_EN; + case PERIPH_ECC_MODULE: + return PCR_ECC_RST_EN; case PERIPH_AES_MODULE: if (enable == true) { // Clear reset on digital signature, otherwise AES unit is held in reset @@ -231,6 +235,8 @@ static uint32_t periph_ll_get_clk_en_reg(periph_module_t periph) return PCR_AES_CONF_REG; case PERIPH_SHA_MODULE: return PCR_SHA_CONF_REG; + case PERIPH_ECC_MODULE: + return PCR_ECC_CONF_REG; case PERIPH_RSA_MODULE: return PCR_RSA_CONF_REG; case PERIPH_HMAC_MODULE: @@ -292,6 +298,8 @@ static uint32_t periph_ll_get_rst_en_reg(periph_module_t periph) return PCR_AES_CONF_REG; case PERIPH_SHA_MODULE: return PCR_SHA_CONF_REG; + case PERIPH_ECC_MODULE: + return PCR_ECC_CONF_REG; case PERIPH_RSA_MODULE: return PCR_RSA_CONF_REG; case PERIPH_HMAC_MODULE: diff --git a/components/hal/esp32h2/include/hal/ecc_ll.h b/components/hal/esp32h2/include/hal/ecc_ll.h new file mode 100644 index 0000000000..967d9857ef --- /dev/null +++ b/components/hal/esp32h2/include/hal/ecc_ll.h @@ -0,0 +1,209 @@ +/* + * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#include +#include +#include "hal/assert.h" +#include "soc/ecc_mult_reg.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + ECC_PARAM_PX = 0x0, + ECC_PARAM_PY, + ECC_PARAM_K, + ECC_PARAM_QX, + ECC_PARAM_QY, + ECC_PARAM_QZ, +} ecc_ll_param_t; + +static inline void ecc_ll_enable_interrupt(void) +{ + REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 1); +} + +static inline void ecc_ll_disable_interrupt(void) +{ + REG_SET_FIELD(ECC_MULT_INT_ENA_REG, ECC_MULT_CALC_DONE_INT_ENA, 0); +} + +static inline void ecc_ll_clear_interrupt(void) +{ + REG_SET_FIELD(ECC_MULT_INT_CLR_REG, ECC_MULT_CALC_DONE_INT_CLR, 1); +} + +static inline void ecc_ll_set_mode(ecc_mode_t mode) +{ + switch(mode) { + case ECC_MODE_POINT_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 0); + break; + case ECC_MODE_VERIFY: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 2); + break; + case ECC_MODE_VERIFY_THEN_POINT_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 3); + break; + case ECC_MODE_JACOBIAN_POINT_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 4); + break; + case ECC_MODE_POINT_ADD: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 5); + break; + case ECC_MODE_JACOBIAN_POINT_VERIFY: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 6); + break; + case ECC_MODE_POINT_VERIFY_JACOBIAN_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 7); + break; + case ECC_MODE_MOD_ADD: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 8); + break; + case ECC_MODE_MOD_SUB: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 9); + break; + case ECC_MODE_MOD_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 10); + break; + case ECC_MODE_INVERSE_MUL: + REG_SET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE, 11); + break; + default: + HAL_ASSERT(false && "Unsupported mode"); + break; + } +} + +static inline void ecc_ll_set_curve(ecc_curve_t curve) +{ + switch(curve) { + case ECC_CURVE_SECP256R1: + REG_SET_BIT(ECC_MULT_CONF_REG, ECC_MULT_KEY_LENGTH); + break; + case ECC_CURVE_SECP192R1: + REG_CLR_BIT(ECC_MULT_CONF_REG, ECC_MULT_KEY_LENGTH); + break; + default: + HAL_ASSERT(false && "Unsupported curve"); + return; + } +} + +static inline void ecc_ll_set_mod_base(ecc_mod_base_t base) +{ + switch(base) { + case ECC_MOD_N: + REG_CLR_BIT(ECC_MULT_CONF_REG, ECC_MULT_MOD_BASE); + break; + case ECC_MOD_P: + REG_SET_BIT(ECC_MULT_CONF_REG, ECC_MULT_MOD_BASE); + break; + default: + HAL_ASSERT(false && "Unsupported curve"); + return; + } +} + +static inline void ecc_ll_write_param(ecc_ll_param_t param, const uint8_t *buf, uint16_t len) +{ + uint32_t reg; + uint32_t word; + switch (param) { + case ECC_PARAM_PX: + reg = ECC_MULT_PX_MEM; + break; + case ECC_PARAM_PY: + reg = ECC_MULT_PY_MEM; + break; + case ECC_PARAM_K: + reg = ECC_MULT_K_MEM; + break; + case ECC_PARAM_QX: + reg = ECC_MULT_QX_MEM; + break; + case ECC_PARAM_QY: + reg = ECC_MULT_QY_MEM; + break; + case ECC_PARAM_QZ: + reg = ECC_MULT_QZ_MEM; + break; + default: + HAL_ASSERT(false && "Invalid parameter"); + return; + } + + for (int i = 0; i < len; i += 4) { + memcpy(&word, buf + i, 4); + REG_WRITE(reg + i, word); + } +} + +static inline void ecc_ll_start_calc(void) +{ + REG_SET_BIT(ECC_MULT_CONF_REG, ECC_MULT_START); +} + +static inline int ecc_ll_is_calc_finished(void) +{ + return REG_GET_FIELD(ECC_MULT_INT_RAW_REG, ECC_MULT_CALC_DONE_INT_RAW); +} + +static inline ecc_mode_t ecc_ll_get_mode(void) +{ + return REG_GET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_WORK_MODE); +} + +static inline int ecc_ll_get_verification_result(void) +{ + return REG_GET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_VERIFICATION_RESULT); +} + +static inline ecc_curve_t ecc_ll_get_curve(void) +{ + return REG_GET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_KEY_LENGTH); +} + +static inline ecc_mod_base_t ecc_ll_get_mod_base(void) +{ + return REG_GET_FIELD(ECC_MULT_CONF_REG, ECC_MULT_MOD_BASE); +} + +static inline void ecc_ll_read_param(ecc_ll_param_t param, uint8_t *buf, uint16_t len) +{ + uint32_t reg; + switch (param) { + case ECC_PARAM_PX: + reg = ECC_MULT_PX_MEM; + break; + case ECC_PARAM_PY: + reg = ECC_MULT_PY_MEM; + break; + case ECC_PARAM_K: + reg = ECC_MULT_K_MEM; + break; + case ECC_PARAM_QX: + reg = ECC_MULT_QX_MEM; + break; + case ECC_PARAM_QY: + reg = ECC_MULT_QY_MEM; + break; + case ECC_PARAM_QZ: + reg = ECC_MULT_QZ_MEM; + break; + default: + HAL_ASSERT(false && "Invalid parameter"); + return; + } + + memcpy(buf, (void *)reg, len); +} + +#ifdef __cplusplus +} +#endif diff --git a/components/hal/include/hal/ecc_hal.h b/components/hal/include/hal/ecc_hal.h index 6b466718a0..23cfbbbda1 100644 --- a/components/hal/include/hal/ecc_hal.h +++ b/components/hal/include/hal/ecc_hal.h @@ -13,6 +13,8 @@ #pragma once #include "stdint.h" +#include +#include "soc/soc_caps.h" #include "hal/ecc_types.h" #ifdef __cplusplus @@ -96,6 +98,103 @@ int ecc_hal_read_mul_result(uint8_t *rx, uint8_t *ry, uint16_t len); */ int ecc_hal_read_verify_result(void); +#if SOC_ECC_EXTENDED_MODES_SUPPORTED +/** + * @brief Set the mod base value used in MOD operation + * + * @param base Identifier of the base to use + */ +void ecc_hal_set_mod_base(ecc_mod_base_t base); + +/** + * @brief Write parameters for Jacobian verification + * i.e Check whether (Qx, Qy, Qz) is a point on selected curve + * + * @param qx X coordinate of the ECC point in jacobian form + * @param qy Y coordinate of the ECC point in jacobian form + * @param qz Z coordinate of the ECC point in jacobian form + * @param len Length (in bytes) of the ECC point + * - 32 bytes for SECP256R1 + * - 24 bytes for SECP192R1 + */ +void ecc_hal_write_jacob_verify_param(const uint8_t *qx, const uint8_t *qy, const uint8_t *qz, uint16_t len); + +/** + * @brief Read ECC point multiplication result in jacobian form + * + * @param rx X coordinate of the multiplication result + * @param ry Y coordinate of the multiplication result + * @param rz Z coordinate of the multiplication result + * @param len Length (in bytes) of the ECC point + * - 32 for SECP256R1 + * - 24 for SECP192R1 + * + * @return - 0 if the operation was successful + * - -1 if the operation was not successful + * + * In case the operation is not successful, rx, ry, and rz will contain + * all zeros + */ +int ecc_hal_read_jacob_mul_result(uint8_t *rx, uint8_t *ry, uint8_t *rz, uint16_t len); + +/** + * @brief Write parameters for ECC point addition ((Px, Py, 1) + (Qx, Qy, Qz)) + * + * @param px X coordinate of the 1st addend ECC point + * @param py Y coordinate of the 1st addend ECC point + * @param qx X coordinate of the 2nd addend ECC point in jacobian form + * @param qy Y coordinate of the 2nd addend ECC point in jacobian form + * @param qz Z coordinate of the 2nd addend ECC point in jacobian form + * @param len Length (in bytes) of the ECC point + * - 32 bytes for SECP256R1 + * - 24 bytes for SECP192R1 + */ +void ecc_hal_write_point_add_param(const uint8_t *px, const uint8_t *py, const uint8_t *qx, const uint8_t *qy, const uint8_t *qz, uint16_t len); + +/** + * @brief Read ECC point addition result + * + * @param rx X coordinate of the addition result + * @param ry Y coordinate of the addition result + * @param rz Z coordinate of the addition result + * @param len Length (in bytes) of the ECC point + * - 32 for SECP256R1 + * - 24 for SECP192R1 + * @param read_jacob Read the result in Jacobian form + * + * @return - 0 if the operation was successful + * - -1 otherwise + */ +int ecc_hal_read_point_add_result(uint8_t *rx, uint8_t *ry, uint8_t *rz, uint16_t len, bool read_jacob); + +/** + * @brief Write parameters for mod operations + * i.e mod add, mod sub, mod mul, mod inverse mul (or mod division) + * + * @param a Value of operand 1 + * @param b Value of operand 2 + * @param len Length (in bytes) of the ECC point + * - 32 bytes for SECP256R1 + * - 24 bytes for SECP192R1 + */ +void ecc_hal_write_mod_op_param(const uint8_t *a, const uint8_t *b, uint16_t len); + +/** + * @brief Read result of mod operations + * i.e mod add, mod sub, mod mul, mod inverse mul (or mod division) + * + * @param r Result of the mod operation + * @param len Length (in bytes) of the ECC point + * - 32 bytes for SECP256R1 + * - 24 bytes for SECP192R1 + * + * @return - 0 if operation successful + * - -1 otherwise + */ +int ecc_hal_read_mod_op_result(uint8_t *r, uint16_t len); + +#endif /* SOC_ECC_EXTENDED_MODES_SUPPORTED */ + #ifdef __cplusplus } #endif diff --git a/components/hal/include/hal/ecc_types.h b/components/hal/include/hal/ecc_types.h index 4abea16f6e..17ce834917 100644 --- a/components/hal/include/hal/ecc_types.h +++ b/components/hal/include/hal/ecc_types.h @@ -6,13 +6,25 @@ #pragma once typedef enum { - ECC_MODE_POINT_MUL = 0x0, // (Rx, Ry) = K * (Px, Py) - ECC_MODE_INVERSE_MUL, // R = K^(-1) * Py - ECC_MODE_VERIFY, // Check if (Px, Py) are points on the curve - ECC_MODE_VERIFY_THEN_POINT_MUL, // Verify and then perform point multiplication + ECC_MODE_POINT_MUL = 0x0, // (Rx, Ry) = K * (Px, Py) + ECC_MODE_INVERSE_MUL, // R = K^(-1) * Py + ECC_MODE_VERIFY, // Check if (Px, Py) are points on the curve + ECC_MODE_VERIFY_THEN_POINT_MUL, // Verify and then perform point multiplication + ECC_MODE_JACOBIAN_POINT_MUL, + ECC_MODE_POINT_ADD, + ECC_MODE_JACOBIAN_POINT_VERIFY, + ECC_MODE_POINT_VERIFY_JACOBIAN_MUL, + ECC_MODE_MOD_ADD, + ECC_MODE_MOD_SUB, + ECC_MODE_MOD_MUL, } ecc_mode_t; typedef enum { ECC_CURVE_SECP192R1 = 0x0, ECC_CURVE_SECP256R1, } ecc_curve_t; + +typedef enum { + ECC_MOD_N, // Order of the curve + ECC_MOD_P, // Prime modulus +} ecc_mod_base_t; diff --git a/components/idf_test/include/esp32h2/idf_performance_target.h b/components/idf_test/include/esp32h2/idf_performance_target.h index 07f23711eb..33f100aa54 100644 --- a/components/idf_test/include/esp32h2/idf_performance_target.h +++ b/components/idf_test/include/esp32h2/idf_performance_target.h @@ -18,6 +18,14 @@ #define IDF_PERFORMANCE_MAX_RSA_3072KEY_PUBLIC_OP 45000 #define IDF_PERFORMANCE_MAX_RSA_3072KEY_PRIVATE_OP 670000 +#define IDF_PERFORMANCE_MAX_ECP_P192_POINT_MULTIPLY_OP 11000 +#define IDF_PERFORMANCE_MAX_ECP_P192_POINT_VERIFY_OP 300 +#define IDF_PERFORMANCE_MAX_ECP_P256_POINT_MULTIPLY_OP 19000 +#define IDF_PERFORMANCE_MAX_ECP_P256_POINT_VERIFY_OP 300 + +#define IDF_PERFORMANCE_MAX_ECDSA_P192_VERIFY_OP 44000 +#define IDF_PERFORMANCE_MAX_ECDSA_P256_VERIFY_OP 67000 + #define IDF_PERFORMANCE_MAX_SPI_CLK_FREQ 26*1000*1000 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING 28 #define IDF_PERFORMANCE_MAX_SPI_PER_TRANS_POLLING_NO_DMA 24 diff --git a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in index eea30cc633..d342077dd8 100644 --- a/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32h2/include/soc/Kconfig.soc_caps.in @@ -131,6 +131,14 @@ config SOC_DIG_SIGN_SUPPORTED bool default y +config SOC_ECC_SUPPORTED + bool + default y + +config SOC_ECC_EXTENDED_MODES_SUPPORTED + bool + default y + config SOC_FLASH_ENC_SUPPORTED bool default y diff --git a/components/soc/esp32h2/include/soc/ecc_mult_reg.h b/components/soc/esp32h2/include/soc/ecc_mult_reg.h index 4060ce107d..5d7fa6c1c3 100644 --- a/components/soc/esp32h2/include/soc/ecc_mult_reg.h +++ b/components/soc/esp32h2/include/soc/ecc_mult_reg.h @@ -1,5 +1,5 @@ /** - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -162,6 +162,24 @@ extern "C" { #define ECC_MULT_PY_MEM (DR_REG_ECC_MULT_BASE + 0x140) #define ECC_MULT_PY_MEM_SIZE_BYTES 32 +/** ECC_MULT_QX_MEM register + * The memory that stores Qx. + */ +#define ECC_MULT_QX_MEM (DR_REG_ECC_MULT_BASE + 0x160) +#define ECC_MULT_QX_MEM_SIZE_BYTES 32 + +/** ECC_MULT_QY_MEM register + * The memory that stores Qy. + */ +#define ECC_MULT_QY_MEM (DR_REG_ECC_MULT_BASE + 0x180) +#define ECC_MULT_QY_MEM_SIZE_BYTES 32 + +/** ECC_MULT_QZ_MEM register + * The memory that stores Qz. + */ +#define ECC_MULT_QZ_MEM (DR_REG_ECC_MULT_BASE + 0x1A0) +#define ECC_MULT_QZ_MEM_SIZE_BYTES 32 + #ifdef __cplusplus } #endif diff --git a/components/soc/esp32h2/include/soc/ecc_mult_struct.h b/components/soc/esp32h2/include/soc/ecc_mult_struct.h index dd71b8b917..f1596693a8 100644 --- a/components/soc/esp32h2/include/soc/ecc_mult_struct.h +++ b/components/soc/esp32h2/include/soc/ecc_mult_struct.h @@ -1,11 +1,13 @@ /** - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once #include +#include "esp_assert.h" + #ifdef __cplusplus extern "C" { #endif @@ -151,12 +153,15 @@ typedef struct { volatile uint32_t k[8]; volatile uint32_t px[8]; volatile uint32_t py[8]; + volatile uint32_t qx[8]; + volatile uint32_t qy[8]; + volatile uint32_t qz[8]; } ecc_mult_dev_t; extern ecc_mult_dev_t ECC; #ifndef __cplusplus -_Static_assert(sizeof(ecc_mult_dev_t) == 0x160, "Invalid size of ecc_mult_dev_t structure"); +_Static_assert(sizeof(ecc_mult_dev_t) == 0x1C0, "Invalid size of ecc_mult_dev_t structure"); #endif #ifdef __cplusplus diff --git a/components/soc/esp32h2/include/soc/periph_defs.h b/components/soc/esp32h2/include/soc/periph_defs.h index 502ca39bd4..2f1789caba 100644 --- a/components/soc/esp32h2/include/soc/periph_defs.h +++ b/components/soc/esp32h2/include/soc/periph_defs.h @@ -35,6 +35,7 @@ typedef enum { PERIPH_RSA_MODULE, PERIPH_AES_MODULE, PERIPH_SHA_MODULE, + PERIPH_ECC_MODULE, PERIPH_HMAC_MODULE, PERIPH_DS_MODULE, PERIPH_GDMA_MODULE, diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index d24600c4ca..abb72b6a14 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -58,6 +58,8 @@ #define SOC_SHA_SUPPORTED 1 #define SOC_HMAC_SUPPORTED 1 #define SOC_DIG_SIGN_SUPPORTED 1 +#define SOC_ECC_SUPPORTED 1 +#define SOC_ECC_EXTENDED_MODES_SUPPORTED 1 #define SOC_FLASH_ENC_SUPPORTED 1 #define SOC_SECURE_BOOT_SUPPORTED 1 #define SOC_BOD_SUPPORTED 1