diff --git a/components/app_trace/Kconfig b/components/app_trace/Kconfig index 60f60d9aa7..8013b0690c 100644 --- a/components/app_trace/Kconfig +++ b/components/app_trace/Kconfig @@ -18,11 +18,13 @@ menu "Application Level Tracing" config APPTRACE_DEST_TRAX bool - depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX + depends on IDF_TARGET_ARCH_XTENSA && !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX select ESP32_MEMMAP_TRACEMEM select ESP32S2_MEMMAP_TRACEMEM + select ESP32S3_MEMMAP_TRACEMEM select ESP32_MEMMAP_TRACEMEM_TWOBANKS select ESP32S2_MEMMAP_TRACEMEM_TWOBANKS + select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS default n help Enables/disable TRAX tracing HW. diff --git a/components/app_trace/app_trace_membufs_proto.c b/components/app_trace/app_trace_membufs_proto.c index daa2d8cc41..f163daddc6 100644 --- a/components/app_trace/app_trace_membufs_proto.c +++ b/components/app_trace/app_trace_membufs_proto.c @@ -1,3 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + #include #include #include "sdkconfig.h" @@ -93,7 +99,8 @@ static esp_err_t esp_apptrace_membufs_swap(esp_apptrace_membufs_proto_data_t *pr if (proto->hw->host_data_pending() && hdr->block_sz > 0) { // TODO: add support for multiple blocks from host, currently there is no need for that uint8_t *p = proto->blocks[new_block_num].start + proto->blocks[new_block_num].sz; - ESP_APPTRACE_LOGD("Recvd %d bytes from host [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]", hdr->block_sz, + ESP_APPTRACE_LOGD("Recvd %d bytes from host (@ 0x%x) [%x %x %x %x %x %x %x %x .. %x %x %x %x %x %x %x %x]", + hdr->block_sz, proto->blocks[new_block_num].start, *(proto->blocks[new_block_num].start+0), *(proto->blocks[new_block_num].start+1), *(proto->blocks[new_block_num].start+2), *(proto->blocks[new_block_num].start+3), *(proto->blocks[new_block_num].start+4), *(proto->blocks[new_block_num].start+5), diff --git a/components/app_trace/port/xtensa/port.c b/components/app_trace/port/xtensa/port.c index b0dcaa1b21..d64f2631fd 100644 --- a/components/app_trace/port/xtensa/port.c +++ b/components/app_trace/port/xtensa/port.c @@ -1,3 +1,9 @@ +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ + // // How It Works // ************ @@ -143,9 +149,9 @@ #include "sdkconfig.h" #include "soc/soc.h" #include "soc/dport_access.h" -#if CONFIG_IDF_TARGET_ESP32 #include "soc/dport_reg.h" -#elif CONFIG_IDF_TARGET_ESP32S2 +#include "soc/tracemem_config.h" +#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 #include "soc/sensitive_reg.h" #endif #include "eri.h" @@ -154,18 +160,6 @@ #include "esp_app_trace_membufs_proto.h" #include "esp_app_trace_port.h" -// TODO: move these (and same definitions in trax.c to dport_reg.h) -#if CONFIG_IDF_TARGET_ESP32 -#define TRACEMEM_MUX_PROBLK0_APPBLK1 0 -#define TRACEMEM_MUX_BLK0_ONLY 1 -#define TRACEMEM_MUX_BLK1_ONLY 2 -#define TRACEMEM_MUX_PROBLK1_APPBLK0 3 -#elif CONFIG_IDF_TARGET_ESP32S2 -#define TRACEMEM_MUX_BLK0_NUM 19 -#define TRACEMEM_MUX_BLK1_NUM 20 -#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4)) -#endif - // TRAX is disabled, so we use its registers for our own purposes // | 31..XXXXXX..24 | 23 .(host_connect). 23 | 22 .(host_data). 22| 21..(block_id)..15 | 14..(block_len)..0 | #define ESP_APPTRACE_TRAX_CTRL_REG ERI_TRAX_DELAYCNT @@ -182,18 +176,6 @@ #define ESP_APPTRACE_TRAX_INITED(_hw_) ((_hw_)->inited & (1 << cpu_hal_get_core_id())) -#if CONFIG_IDF_TARGET_ESP32 -static uint8_t * const s_trax_blocks[] = { - (uint8_t *) 0x3FFFC000, - (uint8_t *) 0x3FFF8000 -}; -#elif CONFIG_IDF_TARGET_ESP32S2 -static uint8_t * const s_trax_blocks[] = { - (uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM), - (uint8_t *)TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM) -}; -#endif - #define ESP_APPTRACE_TRAX_BLOCK_SIZE (0x4000UL) /** TRAX HW transport data */ @@ -223,6 +205,12 @@ static bool esp_apptrace_trax_host_data_pending(void); const static char *TAG = "esp_apptrace"; +static uint8_t * const s_trax_blocks[] = { + (uint8_t *)TRACEMEM_BLK0_ADDR, + (uint8_t *)TRACEMEM_BLK1_ADDR +}; + + esp_apptrace_hw_t *esp_apptrace_uart_hw_get(int num, void **data) { return NULL; @@ -300,6 +288,14 @@ static inline void esp_apptrace_trax_select_memory_block(int block_num) DPORT_WRITE_PERI_REG(DPORT_TRACEMEM_MUX_MODE_REG, block_num ? TRACEMEM_MUX_BLK0_ONLY : TRACEMEM_MUX_BLK1_ONLY); #elif CONFIG_IDF_TARGET_ESP32S2 WRITE_PERI_REG(DPORT_PMS_OCCUPY_3_REG, block_num ? BIT(TRACEMEM_MUX_BLK0_NUM-4) : BIT(TRACEMEM_MUX_BLK1_NUM-4)); +#elif CONFIG_IDF_TARGET_ESP32S3 + // select memory block to be exposed to the TRAX module (accessed by host) + uint32_t block_bits = block_num ? TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM) + : TRACEMEM_CORE0_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM); + block_bits |= block_num ? TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK0_NUM) + : TRACEMEM_CORE1_MUX_BLK_BITS(TRACEMEM_MUX_BLK1_NUM); + ESP_EARLY_LOGV(TAG, "Select block %d @ %p (bits 0x%x)", block_num, s_trax_blocks[block_num], block_bits); + DPORT_WRITE_PERI_REG(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits); #endif } diff --git a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c index 268b389921..6398ae039d 100644 --- a/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c +++ b/components/app_trace/sys_view/Sample/Config/SEGGER_SYSVIEW_Config_FreeRTOS.c @@ -73,6 +73,8 @@ Revision: $Rev: 3734 $ #include "esp32/clk.h" #elif CONFIG_IDF_TARGET_ESP32S2 #include "esp32s2/clk.h" +#elif CONFIG_IDF_TARGET_ESP32S3 +#include "esp32s3/clk.h" #elif CONFIG_IDF_TARGET_ESP32C3 #include "esp32c3/clk.h" #endif @@ -142,6 +144,8 @@ extern const SEGGER_SYSVIEW_OS_API SYSVIEW_X_OS_TraceAPI; #define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000) #elif CONFIG_IDF_TARGET_ESP32S2 #define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000) +#elif CONFIG_IDF_TARGET_ESP32S3 +#define SYSVIEW_TIMESTAMP_FREQ (CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000) #endif #endif // TS_USE_CCOUNT diff --git a/components/esp_system/Kconfig b/components/esp_system/Kconfig index 12bc7901de..62b5bf8f6a 100644 --- a/components/esp_system/Kconfig +++ b/components/esp_system/Kconfig @@ -476,7 +476,7 @@ menu "ESP System Settings" config ESP_DEBUG_STUBS_ENABLE bool default COMPILER_OPTIMIZATION_LEVEL_DEBUG - depends on !ESP32_TRAX && !ESP32S2_TRAX + depends on !ESP32_TRAX && !ESP32S2_TRAX && !ESP32S3_TRAX help Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging stuff, e.g. GCOV data dump. diff --git a/components/esp_system/port/arch/xtensa/trax.c b/components/esp_system/port/arch/xtensa/trax.c index ef5a9ecb45..fd24aa1a54 100644 --- a/components/esp_system/port/arch/xtensa/trax.c +++ b/components/esp_system/port/arch/xtensa/trax.c @@ -1,17 +1,9 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #include #include "esp_err.h" @@ -20,12 +12,13 @@ #include "trax.h" #include "hal/trace_ll.h" #include "soc/dport_reg.h" +#include "soc/tracemem_config.h" #include "sdkconfig.h" // Utility functions for enabling TRAX in early startup (hence the use // of ESP_EARLY_LOGX) in Xtensa targets. -#if defined(CONFIG_ESP32_TRAX) || defined(CONFIG_ESP32S2_TRAX) +#if defined(CONFIG_ESP32_TRAX) || defined(CONFIG_ESP32S2_TRAX) || defined(CONFIG_ESP32S3_TRAX) #define WITH_TRAX 1 #endif @@ -49,12 +42,33 @@ int trax_enable(trax_ena_select_t which) trace_ll_mem_enable(0, (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP || which == TRAX_ENA_PRO)); trace_ll_mem_enable(1, (which == TRAX_ENA_PRO_APP || which == TRAX_ENA_PRO_APP_SWAP || which == TRAX_ENA_APP)); return ESP_OK; -#elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 +#elif CONFIG_IDF_TARGET_ESP32S2 if (which != TRAX_ENA_PRO) { return ESP_ERR_INVALID_ARG; } trace_ll_set_mem_block(TRACEMEM_MUX_BLK1_NUM); return ESP_OK; +#elif CONFIG_IDF_TARGET_ESP32S3 + if (which == TRAX_ENA_PRO) { + trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM); + } + else if (which == TRAX_ENA_APP) { + trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM); + } +#ifdef CONFIG_ESP32S3_TRAX_TWOBANKS + else if (which == TRAX_ENA_PRO_APP) { + trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK0_NUM); + trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK1_NUM); + } + else if (which == TRAX_ENA_PRO_APP_SWAP) { + trace_ll_set_mem_block(1, TRACEMEM_MUX_BLK0_NUM); + trace_ll_set_mem_block(0, TRACEMEM_MUX_BLK1_NUM); + } +#endif + else { + return ESP_ERR_INVALID_ARG; + } + return ESP_OK; #endif } diff --git a/components/esp_system/port/cpu_start.c b/components/esp_system/port/cpu_start.c index f5a64dd887..dca682c39d 100644 --- a/components/esp_system/port/cpu_start.c +++ b/components/esp_system/port/cpu_start.c @@ -72,7 +72,7 @@ #include "soc/rtc.h" #include "soc/spinlock.h" -#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX +#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX #include "trax.h" #endif @@ -186,10 +186,9 @@ void IRAM_ATTR call_start_cpu1(void) //has started, but it isn't active *on this CPU* yet. esp_cache_err_int_init(); -#if CONFIG_IDF_TARGET_ESP32 -#if CONFIG_ESP32_TRAX_TWOBANKS +#if (CONFIG_IDF_TARGET_ESP32 && CONFIG_ESP32_TRAX_TWOBANKS) || \ + (CONFIG_IDF_TARGET_ESP32S3 && CONFIG_ESP32S3_TRAX_TWOBANKS) trax_start_trace(TRAX_DOWNCOUNT_WORDS); -#endif #endif s_cpu_inited[1] = true; @@ -507,9 +506,9 @@ void IRAM_ATTR call_start_cpu0(void) #endif //Enable trace memory and immediately start trace. -#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX -#if CONFIG_IDF_TARGET_ESP32 -#if CONFIG_ESP32_TRAX_TWOBANKS +#if CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S3 +#if CONFIG_ESP32_TRAX_TWOBANKS || CONFIG_ESP32S3_TRAX_TWOBANKS trax_enable(TRAX_ENA_PRO_APP); #else trax_enable(TRAX_ENA_PRO); @@ -518,7 +517,7 @@ void IRAM_ATTR call_start_cpu0(void) trax_enable(TRAX_ENA_PRO); #endif trax_start_trace(TRAX_DOWNCOUNT_WORDS); -#endif // CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX +#endif // CONFIG_ESP32_TRAX || CONFIG_ESP32S2_TRAX || CONFIG_ESP32S3_TRAX esp_clk_init(); esp_perip_clk_init(); diff --git a/components/hal/esp32s3/include/hal/trace_ll.h b/components/hal/esp32s3/include/hal/trace_ll.h index b271409b0a..ccf4e88553 100644 --- a/components/hal/esp32s3/include/hal/trace_ll.h +++ b/components/hal/esp32s3/include/hal/trace_ll.h @@ -1,24 +1,23 @@ -// Copyright 2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include #include "soc/dport_reg.h" +#include "soc/tracemem_config.h" -static inline void trace_ll_set_mem_block(int block) +static inline void trace_ll_set_mem_block(int cpu, int block) { - // IDF-1785 - abort(); + uint32_t block_bits = 0; + + if (cpu == 0) { + block_bits = TRACEMEM_CORE0_MUX_BLK_BITS(block); + } else { + block_bits = TRACEMEM_CORE1_MUX_BLK_BITS(block); + } + DPORT_SET_PERI_REG_MASK(SENSITIVE_INTERNAL_SRAM_USAGE_2_REG, block_bits); } diff --git a/components/heap/port/esp32s2/memory_layout.c b/components/heap/port/esp32s2/memory_layout.c index bd47c3e030..b8cb6738c7 100644 --- a/components/heap/port/esp32s2/memory_layout.c +++ b/components/heap/port/esp32s2/memory_layout.c @@ -1,16 +1,8 @@ -// Copyright 2010-2019 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2010-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef BOOTLOADER_BUILD #include @@ -18,6 +10,7 @@ #include "sdkconfig.h" #include "soc/soc.h" +#include "soc/tracemem_config.h" #include "heap_memory_layout.h" #include "esp_heap_caps.h" @@ -145,7 +138,8 @@ SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_dat // Blocks 19 and 20 may be reserved for the trace memory #if CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM > 0 -SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem); +SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK0_ADDR, TRACEMEM_BLK0_ADDR + CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM / 2, trace_mem0); +SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK1_ADDR, TRACEMEM_BLK1_ADDR + CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM / 2, trace_mem1); #endif // RTC Fast RAM region diff --git a/components/heap/port/esp32s3/memory_layout.c b/components/heap/port/esp32s3/memory_layout.c index 30aca7c139..3e4450b734 100644 --- a/components/heap/port/esp32s3/memory_layout.c +++ b/components/heap/port/esp32s3/memory_layout.c @@ -11,6 +11,8 @@ #include "sdkconfig.h" #include "esp_attr.h" #include "soc/soc.h" +#include "soc/dport_reg.h" +#include "soc/tracemem_config.h" #include "heap_memory_layout.h" #include "esp_heap_caps.h" @@ -107,7 +109,8 @@ SOC_RESERVE_MEMORY_REGION( SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH, extram_dat #endif #if CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM > 0 -SOC_RESERVE_MEMORY_REGION(0x3fffc000 - CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM, 0x3fffc000, trace_mem); +SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK0_ADDR, TRACEMEM_BLK0_ADDR + CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM / 2, trace_mem0); +SOC_RESERVE_MEMORY_REGION(TRACEMEM_BLK1_ADDR, TRACEMEM_BLK1_ADDR + CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM / 2, trace_mem1); #endif // RTC Fast RAM region diff --git a/components/soc/esp32/include/soc/tracemem_config.h b/components/soc/esp32/include/soc/tracemem_config.h new file mode 100644 index 0000000000..4d73ecfe51 --- /dev/null +++ b/components/soc/esp32/include/soc/tracemem_config.h @@ -0,0 +1,17 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRACEMEM_BLK0_ADDR 0x3FFFC000UL +#define TRACEMEM_BLK1_ADDR 0x3FFF8000UL + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32s2/include/soc/dport_reg.h b/components/soc/esp32s2/include/soc/dport_reg.h index d38723706f..8eabe72787 100644 --- a/components/soc/esp32s2/include/soc/dport_reg.h +++ b/components/soc/esp32s2/include/soc/dport_reg.h @@ -1,16 +1,8 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_DPORT_REG_H_ #define _SOC_DPORT_REG_H_ @@ -25,10 +17,6 @@ extern "C" { #define DPORT_DATE_REG SYSTEM_DATE_REG -#define TRACEMEM_MUX_BLK0_NUM 19 -#define TRACEMEM_MUX_BLK1_NUM 20 -#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4)) - #ifndef __ASSEMBLER__ #include "dport_access.h" #endif diff --git a/components/soc/esp32s2/include/soc/tracemem_config.h b/components/soc/esp32s2/include/soc/tracemem_config.h new file mode 100644 index 0000000000..7175279de6 --- /dev/null +++ b/components/soc/esp32s2/include/soc/tracemem_config.h @@ -0,0 +1,21 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRACEMEM_MUX_BLK0_NUM 19 +#define TRACEMEM_MUX_BLK1_NUM 20 +#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4)) + +#define TRACEMEM_BLK0_ADDR TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK0_NUM) +#define TRACEMEM_BLK1_ADDR TRACEMEM_BLK_NUM2ADDR(TRACEMEM_MUX_BLK1_NUM) + +#ifdef __cplusplus +} +#endif diff --git a/components/soc/esp32s3/include/soc/dport_reg.h b/components/soc/esp32s3/include/soc/dport_reg.h index e0f773962d..e17afb79b5 100644 --- a/components/soc/esp32s3/include/soc/dport_reg.h +++ b/components/soc/esp32s3/include/soc/dport_reg.h @@ -1,16 +1,8 @@ -// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at -// -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #pragma once #include "soc.h" @@ -25,10 +17,6 @@ extern "C" { #define DPORT_DATE_REG SYSTEM_DATE_REG -#define TRACEMEM_MUX_BLK0_NUM 19 -#define TRACEMEM_MUX_BLK1_NUM 20 -#define TRACEMEM_BLK_NUM2ADDR(_n_) (0x3FFB8000UL + 0x4000UL*((_n_)-4)) - #ifndef __ASSEMBLER__ #include "dport_access.h" #endif diff --git a/components/soc/esp32s3/include/soc/tracemem_config.h b/components/soc/esp32s3/include/soc/tracemem_config.h new file mode 100644 index 0000000000..55c9b907dd --- /dev/null +++ b/components/soc/esp32s3/include/soc/tracemem_config.h @@ -0,0 +1,39 @@ +/* + * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#pragma once + +#ifdef __cplusplus +extern "C" { +#endif + +#define TRACEMEM_MUX_BLK0_NUM 22 +#define TRACEMEM_MUX_BLK1_NUM 23 + +#if (TRACEMEM_MUX_BLK0_NUM < 6) || (TRACEMEM_MUX_BLK0_NUM > 29) +#error Invalid TRAX block 0 num! +#endif +#if (TRACEMEM_MUX_BLK1_NUM < 6) || (TRACEMEM_MUX_BLK1_NUM > 29) +#error Invalid TRAX block 1 num! +#endif + +#if TRACEMEM_MUX_BLK0_NUM < 6 +#define TRACEMEM_BLK0_ADDR (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK0_NUM-2UL)) +#elif TRACEMEM_MUX_BLK0_NUM < 30 +#define TRACEMEM_BLK0_ADDR (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK0_NUM-6UL)) +#endif +#if TRACEMEM_MUX_BLK1_NUM < 6 +#define TRACEMEM_BLK1_ADDR (0x3FC88000UL + 0x2000UL*(TRACEMEM_MUX_BLK1_NUM-2UL)) +#elif TRACEMEM_MUX_BLK1_NUM < 30 +#define TRACEMEM_BLK1_ADDR (0x3FC90000UL + 0x4000UL*(TRACEMEM_MUX_BLK1_NUM-6UL)) +#endif + +#define TRACEMEM_MUX_BLK_ALLOC(_n_) (((_n_)-2UL)%4UL) +#define TRACEMEM_CORE0_MUX_BLK_BITS(_n_) (BIT(((_n_)-2UL)/4UL) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 14)) +#define TRACEMEM_CORE1_MUX_BLK_BITS(_n_) (BIT(7UL+(((_n_)-2UL)/4UL)) | (TRACEMEM_MUX_BLK_ALLOC(_n_) << 16)) + +#ifdef __cplusplus +} +#endif