docs: fix broken references to misc API functions and types.

docs/en/api-reference/system/app_image_format.rst

@@ -11,7 +11,7 @@ An application image consists of the following structures:
  * offset for 2 Segment = offset for 1 Segment + length of 1 Segment + sizeof(:cpp:type:`esp_image_segment_header_t`).
  * ...
 
-The count of each segment is defined in the ``segment_count`` field that is stored in :cpp:type:`esp_image_header_t`. The count cannot be more than :cpp:type:`ESP_IMAGE_MAX_SEGMENTS`.
+The count of each segment is defined in the ``segment_count`` field that is stored in :cpp:type:`esp_image_header_t`. The count cannot be more than :c:macro:`ESP_IMAGE_MAX_SEGMENTS`.
 
 To get the list of your image segments, please run the following command:
 

docs/en/api-reference/system/efuse.rst

@@ -377,4 +377,5 @@ esptool includes a useful tool for reading/writing {IDF_TARGET_NAME} eFuse bits
    .. include:: inc/espefuse_summary_{IDF_TARGET_NAME}.rst
 
 
-.. include-build-file:: inc/esp_efuse.inc
+.. include-build-file:: inc/components/efuse/{IDF_TARGET_PATH_NAME}/include/esp_efuse.inc
+.. include-build-file:: inc/components/efuse/include/esp_efuse.inc

docs/en/api-reference/system/esp_err.rst

@@ -10,5 +10,5 @@ For the full list of error codes defined in ESP-IDF, see :doc:`Error Code Refere
 API Reference
 -------------
 
+.. include-build-file:: inc/esp_check.inc
 .. include-build-file:: inc/esp_err.inc
-

docs/en/api-reference/system/himem.rst

@@ -8,13 +8,13 @@ The ESP32 can access external SPI RAM transparently, so you can use it as normal
 space for external memory is limited in size, only the first 4MiB can be used as such. Access to the remaining memory is still possible,
 however this needs to go through a bankswitching scheme controlled by the himem API.
 
-Specifically, what is implemented by the himem API is a bankswitching scheme. Hardware-wise, the 4MiB region for external SPI RAM is 
+Specifically, what is implemented by the himem API is a bankswitching scheme. Hardware-wise, the 4MiB region for external SPI RAM is
 mapped into the CPU address space by a MMU, which maps a configurable 32K bank/page of external SPI RAM into each of the 32K pages in the
 4MiB region accessed by the CPU. For external memories that are <=4MiB, this MMU is configured to unity mapping, effectively mapping each
 CPU address 1-to-1 to the external SPI RAM address.
 
-In order to use the himem API, you have to enable it in the menuconfig using :envvar:`CONFIG_SPIRAM_BANKSWITCH_ENABLE`, as well as set the amount 
-of banks reserved for this in :envvar:`CONFIG_SPIRAM_BANKSWITCH_RESERVE`. This decreases
+In order to use the himem API, you have to enable it in the menuconfig using :ref:`CONFIG_SPIRAM_BANKSWITCH_ENABLE`, as well as set the amount
+of banks reserved for this in :ref:`CONFIG_SPIRAM_BANKSWITCH_RESERVE`. This decreases
 the amount of external memory allocated by functions like ``malloc()``, but it allows you to use the himem api to map any of the remaining memory
 into the reserved banks.
 

docs/en/api-reference/system/index.rst

@@ -24,6 +24,7 @@ System API
     intr_alloc
     log
     system
+    soc_caps
     ota
     :CONFIG_IDF_TARGET_ARCH_XTENSA: perfmon
     power_management
@@ -36,6 +37,7 @@ System API
     :SOC_ULP_SUPPORTED: ulp
     :SOC_RISCV_COPROC_SUPPORTED: ulp-risc-v
     wdts
-    
+
+
 
 Code examples for this API section are provided in the :example:`system` directory of ESP-IDF examples.

docs/en/api-reference/system/mem_alloc.rst

@@ -153,7 +153,7 @@ Knowledge about the regions of memory in the chip comes from the "soc" component
 
 Each contiguous region of memory contains its own memory heap. The heaps are created using the `multi_heap <API Reference - Multi Heap API>`_ functionality. multi_heap allows any contiguous region of memory to be used as a heap.
 
-The heap capabilities allocator uses knowledge of the memory regions to initialize each individual heap. Allocation functions in the heap capabilities API will find the most appropriate heap for the allocation (based on desired capabilities, available space, and preferences for each region's use) and then calling :cpp:func:`multi_heap_malloc` or :cpp:func:`multi_heap_calloc` for the heap situated in that particular region.
+The heap capabilities allocator uses knowledge of the memory regions to initialize each individual heap. Allocation functions in the heap capabilities API will find the most appropriate heap for the allocation (based on desired capabilities, available space, and preferences for each region's use) and then calling :cpp:func:`multi_heap_malloc` for the heap situated in that particular region.
 
 Calling ``free()`` involves finding the particular heap corresponding to the freed address, and then calling :cpp:func:`multi_heap_free` on that particular multi_heap instance.
 

docs/en/api-reference/system/power_management.rst

@@ -100,10 +100,10 @@ When DFS is enabled, the APB frequency can be changed multiple times within a si
 
 The following peripherals work normally even when the APB frequency is changing:
 
-- **UART**: if REF_TICK is used as a clock source. See `use_ref_tick` member of :cpp:class:`uart_config_t`.
+- **UART**: if REF_TICK is used as a clock source. See cpp:member:`uart_config_t::use_ref_tick`.
 - **LEDC**: if REF_TICK is used as a clock source. See :cpp:func:`ledc_timer_config` function.
-- **RMT**: if REF_TICK or XTAL is used as a clock source. See `flags` member of :cpp:class:`rmt_config_t` and macro `RMT_CHANNEL_FLAGS_AWARE_DFS`.
-- **GPTimer**: if APB is used as the clock source. See :c:member:`clk_src` member of :c:type:`gptimer_config_t`.
+- **RMT**: if REF_TICK or XTAL is used as a clock source. See :cpp:member:`rmt_config_t::flags` and macro `RMT_CHANNEL_FLAGS_AWARE_DFS`.
+- **GPTimer**: if APB is used as the clock source. See :cpp:member:`gptimer_config_t::clk_src`.
 - **TSENS**: XTAL or RTC_8M is used as a clock source. So, APB frequency changing will not influence it.
 
 Currently, the following peripheral drivers are aware of DFS and will use the ``ESP_PM_APB_FREQ_MAX`` lock for the duration of the transaction:

docs/en/api-reference/system/sleep_modes.rst

@@ -78,7 +78,7 @@ This wakeup mode doesn't require RTC peripherals or RTC memories to be powered o
 
     RTC IO module contains logic to trigger wakeup when one of RTC GPIOs is set to a predefined logic level. RTC IO is part of RTC peripherals power domain, so RTC peripherals will be kept powered on during deep sleep if this wakeup source is requested.
 
-    Because RTC IO module is enabled in this mode, internal pullup or pulldown resistors can also be used. They need to be configured by the application using :cpp:func:`rtc_gpio_pullup_en` and :cpp:func:`rtc_gpio_pulldown_en` functions, before calling :cpp:func:`esp_sleep_start`.
+    Because RTC IO module is enabled in this mode, internal pullup or pulldown resistors can also be used. They need to be configured by the application using :cpp:func:`rtc_gpio_pullup_en` and :cpp:func:`rtc_gpio_pulldown_en` functions, before calling :cpp:func:`esp_deep_sleep_start`.
 
     .. only:: esp32
 
@@ -136,7 +136,7 @@ This wakeup mode doesn't require RTC peripherals or RTC memories to be powered o
 
     .. warning::
         Before entering light sleep mode, check if any GPIO pin to be driven is part of the {IDF_TARGET_SPI_POWER_DOMAIN} power domain. If so, this power domain must be configured to remain ON during sleep.
-        
+
         For example, on ESP32-WROOM-32 board, GPIO16 and GPIO17 are linked to {IDF_TARGET_SPI_POWER_DOMAIN} power domain. If they are configured to remain high during
         light sleep, the power domain should be configured to remain powered ON. This can be done with :cpp:func:`esp_sleep_pd_config()`::
 
@@ -195,10 +195,10 @@ Some {IDF_TARGET_NAME} IOs have internal pullups or pulldowns, which are enabled
 .. only:: esp32c3
 
     In deep sleep mode:
-        - digital GPIOs (GPIO6 ~ 21) are in a high impedance state. 
+        - digital GPIOs (GPIO6 ~ 21) are in a high impedance state.
         - RTC GPIOs (GPIO0 ~ 5) can be in the following states, depending on their hold function enabled or not:
             - if the hold function is not enabled, RTC GPIOs will be in a high impedance state.
-            - if the hold function is enabled, RTC GPIOs will retain the pin state latched at that hold moment. 
+            - if the hold function is enabled, RTC GPIOs will retain the pin state latched at that hold moment.
 
 UART output handling
 --------------------

docs/en/api-reference/system/soc_caps.rst

@@ -0,0 +1,14 @@
+SoC Capabilities
+================
+
+This section lists definitions of the {IDF_TARGET_NAME}'s SoC hardware capabilities. These definitions are commonly used in IDF to control which hardware dependent features are supported and thus compiled into the binary.
+
+.. note::
+
+    These defines are currently not considered to be part of the public API, and may be changed at any time.
+
+
+API Reference
+-------------
+
+.. include-build-file:: inc/soc_caps.inc

docs/en/api-reference/system/system.rst

@@ -204,3 +204,5 @@ API Reference
 .. include-build-file:: inc/esp_system.inc
 .. include-build-file:: inc/esp_idf_version.inc
 .. include-build-file:: inc/esp_mac.inc
+.. include-build-file:: inc/esp_chip_info.inc
+.. include-build-file:: inc/esp_cpu.inc

docs/en/api-reference/system/system_time.rst

@@ -114,7 +114,7 @@ To start synchronization via SNTP, just call the following three functions.
     sntp_setservername(0, "pool.ntp.org");
     sntp_init();
 
-An application with this initialization code will periodically synchronize the time. The time synchronization period is determined by :envvar:`CONFIG_LWIP_SNTP_UPDATE_DELAY` (default value is one hour). To modify the variable, set :ref:`CONFIG_LWIP_SNTP_UPDATE_DELAY` in project configuration.
+An application with this initialization code will periodically synchronize the time. The time synchronization period is determined by :ref:`CONFIG_LWIP_SNTP_UPDATE_DELAY` (default value is one hour). To modify the variable, set :ref:`CONFIG_LWIP_SNTP_UPDATE_DELAY` in project configuration.
 
 A code example that demonstrates the implementation of time synchronization based on the lwIP SNTP library is provided in :example:`protocols/sntp` directory.