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https://github.com/espressif/esp-idf.git
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Merge branch 'feature/mcpwm_support_c5' into 'master'
feat(mcpwm): add driver support on esp32c5 Closes IDF-8709 and IDF-9101 See merge request espressif/esp-idf!29876
This commit is contained in:
@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,14 +13,16 @@
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#include "esp_rom_gpio.h"
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#include "esp_intr_alloc.h"
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#include "soc/mcpwm_periph.h"
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#include "soc/io_mux_reg.h"
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#include "hal/mcpwm_hal.h"
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#include "hal/gpio_hal.h"
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#include "hal/mcpwm_ll.h"
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#include "driver/mcpwm_types_legacy.h"
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#include "driver/gpio.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_clk_tree.h"
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#include "esp_private/gpio.h"
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#include "esp_private/esp_clk.h"
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#include "esp_clk_tree.h"
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static const char *TAG = "mcpwm(legacy)";
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@@ -204,7 +206,7 @@ esp_err_t mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t io_signal,
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int capture_id = io_signal - MCPWM_CAP_0;
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esp_rom_gpio_connect_in_signal(gpio_num, mcpwm_periph_signals.groups[mcpwm_num].captures[capture_id].cap_sig, 0);
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}
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], PIN_FUNC_GPIO);
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gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
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return ESP_OK;
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}
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@@ -268,7 +270,6 @@ static inline uint32_t mcpwm_timer_get_resolution(mcpwm_unit_t mcpwm_num, mcpwm_
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esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, uint32_t resolution)
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{
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mcpwm_module_enable(mcpwm_num);
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mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
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uint32_t clk_src_hz = 0;
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esp_clk_tree_src_get_freq_hz(MCPWM_TIMER_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz);
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@@ -277,7 +278,7 @@ esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, uint32_t resolution
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context[mcpwm_num].group_resolution_hz = clk_src_hz / pre_scale_temp;
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MCPWM_CLOCK_SRC_ATOMIC() {
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mcpwm_ll_group_set_clock_prescale(hal->dev, pre_scale_temp);
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mcpwm_ll_group_set_clock_prescale(mcpwm_num, pre_scale_temp);
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}
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return ESP_OK;
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}
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@@ -467,8 +468,8 @@ esp_err_t mcpwm_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpw
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uint32_t timer_pre_scale = group_resolution / timer_resolution;
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MCPWM_CLOCK_SRC_ATOMIC() {
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mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
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mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
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mcpwm_ll_group_set_clock_source(mcpwm_num, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
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mcpwm_ll_group_set_clock_prescale(mcpwm_num, group_pre_scale);
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}
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mcpwm_critical_enter(mcpwm_num);
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@@ -864,8 +865,8 @@ esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_cha
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uint32_t group_pre_scale = clk_src_hz / group_resolution;
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MCPWM_CLOCK_SRC_ATOMIC() {
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mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
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mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
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mcpwm_ll_group_set_clock_source(mcpwm_num, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
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mcpwm_ll_group_set_clock_prescale(mcpwm_num, group_pre_scale);
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}
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mcpwm_critical_enter(mcpwm_num);
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -12,7 +12,9 @@
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#include "hal/gpio_hal.h"
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#include "esp_rom_gpio.h"
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#include "esp_private/esp_clk.h"
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#include "esp_private/gpio.h"
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#include "soc/mcpwm_periph.h"
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#include "soc/io_mux_reg.h"
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#include "driver/pulse_cnt.h"
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#include "driver/mcpwm.h"
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#include "driver/gpio.h"
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@@ -61,10 +63,12 @@ const static mcpwm_io_signals_t sync_io_sig_array[] = {MCPWM_SYNC_0, MCPWM_SYNC_
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const static mcpwm_capture_signal_t cap_sig_array[] = {MCPWM_SELECT_CAP0, MCPWM_SELECT_CAP1, MCPWM_SELECT_CAP2};
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const static mcpwm_io_signals_t cap_io_sig_array[] = {MCPWM_CAP_0, MCPWM_CAP_1, MCPWM_CAP_2};
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#if SOC_PCNT_SUPPORTED
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static pcnt_unit_handle_t pcnt_unit_a;
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static pcnt_channel_handle_t pcnt_chan_a;
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static pcnt_unit_handle_t pcnt_unit_b;
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static pcnt_channel_handle_t pcnt_chan_b;
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#endif
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// This GPIO init function is almost the same to public API `mcpwm_gpio_init()`, except that
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// this function will configure all MCPWM GPIOs into output and input capable
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@@ -93,7 +97,7 @@ static esp_err_t test_mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t
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int capture_id = io_signal - MCPWM_CAP_0;
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esp_rom_gpio_connect_in_signal(gpio_num, mcpwm_periph_signals.groups[mcpwm_num].captures[capture_id].cap_sig, 0);
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}
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], PIN_FUNC_GPIO);
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gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
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return ESP_OK;
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}
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@@ -119,6 +123,7 @@ static void mcpwm_setup_testbench(mcpwm_unit_t group, mcpwm_timer_t timer, uint3
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TEST_ESP_OK(mcpwm_init(group, timer, &pwm_config));
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}
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#if SOC_PCNT_SUPPORTED
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static void pcnt_setup_testbench(void)
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{
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// PWMA <--> PCNT UNIT0
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@@ -173,6 +178,7 @@ static uint32_t pcnt_get_pulse_number(pcnt_unit_handle_t pwm_pcnt_unit, int capt
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printf("count value: %d\r\n", count_value);
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return (uint32_t)count_value;
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}
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#endif // SOC_PCNT_SUPPORTED
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static void mcpwm_timer_duty_test(mcpwm_unit_t unit, mcpwm_timer_t timer, unsigned long int group_resolution, unsigned long int timer_resolution)
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{
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@@ -210,6 +216,7 @@ TEST_CASE("MCPWM duty test", "[mcpwm]")
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// -------------------------------------------------------------------------------------
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#if SOC_PCNT_SUPPORTED
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static void mcpwm_start_stop_test(mcpwm_unit_t unit, mcpwm_timer_t timer)
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{
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uint32_t pulse_number = 0;
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@@ -244,6 +251,7 @@ TEST_CASE("MCPWM start and stop test", "[mcpwm]")
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}
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}
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}
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#endif // SOC_PCNT_SUPPORTED
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// -------------------------------------------------------------------------------------
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@@ -276,6 +284,7 @@ TEST_CASE("MCPWM deadtime test", "[mcpwm]")
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}
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// -------------------------------------------------------------------------------------
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#if SOC_PCNT_SUPPORTED
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#define TEST_CARRIER_FREQ 250000
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static void mcpwm_carrier_test(mcpwm_unit_t unit, mcpwm_timer_t timer, mcpwm_carrier_out_ivt_t invert_or_not,
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uint8_t period, uint8_t duty, uint8_t os_width)
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@@ -315,6 +324,7 @@ TEST_CASE("MCPWM carrier test", "[mcpwm]")
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}
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}
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}
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#endif // SOC_PCNT_SUPPORTED
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// -------------------------------------------------------------------------------------
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