Merge branch 'feature/mcpwm_support_c5' into 'master'

feat(mcpwm): add driver support on esp32c5

Closes IDF-8709 and IDF-9101

See merge request espressif/esp-idf!29876
This commit is contained in:
morris
2024-05-29 10:27:35 +08:00
24 changed files with 2065 additions and 356 deletions

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -13,14 +13,16 @@
#include "esp_rom_gpio.h"
#include "esp_intr_alloc.h"
#include "soc/mcpwm_periph.h"
#include "soc/io_mux_reg.h"
#include "hal/mcpwm_hal.h"
#include "hal/gpio_hal.h"
#include "hal/mcpwm_ll.h"
#include "driver/mcpwm_types_legacy.h"
#include "driver/gpio.h"
#include "esp_private/periph_ctrl.h"
#include "esp_clk_tree.h"
#include "esp_private/gpio.h"
#include "esp_private/esp_clk.h"
#include "esp_clk_tree.h"
static const char *TAG = "mcpwm(legacy)";
@@ -204,7 +206,7 @@ esp_err_t mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t io_signal,
int capture_id = io_signal - MCPWM_CAP_0;
esp_rom_gpio_connect_in_signal(gpio_num, mcpwm_periph_signals.groups[mcpwm_num].captures[capture_id].cap_sig, 0);
}
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], PIN_FUNC_GPIO);
gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
return ESP_OK;
}
@@ -268,7 +270,6 @@ static inline uint32_t mcpwm_timer_get_resolution(mcpwm_unit_t mcpwm_num, mcpwm_
esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, uint32_t resolution)
{
mcpwm_module_enable(mcpwm_num);
mcpwm_hal_context_t *hal = &context[mcpwm_num].hal;
uint32_t clk_src_hz = 0;
esp_clk_tree_src_get_freq_hz(MCPWM_TIMER_CLK_SRC_DEFAULT, ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &clk_src_hz);
@@ -277,7 +278,7 @@ esp_err_t mcpwm_group_set_resolution(mcpwm_unit_t mcpwm_num, uint32_t resolution
context[mcpwm_num].group_resolution_hz = clk_src_hz / pre_scale_temp;
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_set_clock_prescale(hal->dev, pre_scale_temp);
mcpwm_ll_group_set_clock_prescale(mcpwm_num, pre_scale_temp);
}
return ESP_OK;
}
@@ -467,8 +468,8 @@ esp_err_t mcpwm_init(mcpwm_unit_t mcpwm_num, mcpwm_timer_t timer_num, const mcpw
uint32_t timer_pre_scale = group_resolution / timer_resolution;
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
mcpwm_ll_group_set_clock_source(mcpwm_num, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(mcpwm_num, group_pre_scale);
}
mcpwm_critical_enter(mcpwm_num);
@@ -864,8 +865,8 @@ esp_err_t mcpwm_capture_enable_channel(mcpwm_unit_t mcpwm_num, mcpwm_capture_cha
uint32_t group_pre_scale = clk_src_hz / group_resolution;
MCPWM_CLOCK_SRC_ATOMIC() {
mcpwm_ll_group_set_clock_source(hal->dev, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(hal->dev, group_pre_scale);
mcpwm_ll_group_set_clock_source(mcpwm_num, (soc_module_clk_t)MCPWM_CAPTURE_CLK_SRC_DEFAULT);
mcpwm_ll_group_set_clock_prescale(mcpwm_num, group_pre_scale);
}
mcpwm_critical_enter(mcpwm_num);

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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -12,7 +12,9 @@
#include "hal/gpio_hal.h"
#include "esp_rom_gpio.h"
#include "esp_private/esp_clk.h"
#include "esp_private/gpio.h"
#include "soc/mcpwm_periph.h"
#include "soc/io_mux_reg.h"
#include "driver/pulse_cnt.h"
#include "driver/mcpwm.h"
#include "driver/gpio.h"
@@ -61,10 +63,12 @@ const static mcpwm_io_signals_t sync_io_sig_array[] = {MCPWM_SYNC_0, MCPWM_SYNC_
const static mcpwm_capture_signal_t cap_sig_array[] = {MCPWM_SELECT_CAP0, MCPWM_SELECT_CAP1, MCPWM_SELECT_CAP2};
const static mcpwm_io_signals_t cap_io_sig_array[] = {MCPWM_CAP_0, MCPWM_CAP_1, MCPWM_CAP_2};
#if SOC_PCNT_SUPPORTED
static pcnt_unit_handle_t pcnt_unit_a;
static pcnt_channel_handle_t pcnt_chan_a;
static pcnt_unit_handle_t pcnt_unit_b;
static pcnt_channel_handle_t pcnt_chan_b;
#endif
// This GPIO init function is almost the same to public API `mcpwm_gpio_init()`, except that
// this function will configure all MCPWM GPIOs into output and input capable
@@ -93,7 +97,7 @@ static esp_err_t test_mcpwm_gpio_init(mcpwm_unit_t mcpwm_num, mcpwm_io_signals_t
int capture_id = io_signal - MCPWM_CAP_0;
esp_rom_gpio_connect_in_signal(gpio_num, mcpwm_periph_signals.groups[mcpwm_num].captures[capture_id].cap_sig, 0);
}
gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[gpio_num], PIN_FUNC_GPIO);
gpio_func_sel(gpio_num, PIN_FUNC_GPIO);
return ESP_OK;
}
@@ -119,6 +123,7 @@ static void mcpwm_setup_testbench(mcpwm_unit_t group, mcpwm_timer_t timer, uint3
TEST_ESP_OK(mcpwm_init(group, timer, &pwm_config));
}
#if SOC_PCNT_SUPPORTED
static void pcnt_setup_testbench(void)
{
// PWMA <--> PCNT UNIT0
@@ -173,6 +178,7 @@ static uint32_t pcnt_get_pulse_number(pcnt_unit_handle_t pwm_pcnt_unit, int capt
printf("count value: %d\r\n", count_value);
return (uint32_t)count_value;
}
#endif // SOC_PCNT_SUPPORTED
static void mcpwm_timer_duty_test(mcpwm_unit_t unit, mcpwm_timer_t timer, unsigned long int group_resolution, unsigned long int timer_resolution)
{
@@ -210,6 +216,7 @@ TEST_CASE("MCPWM duty test", "[mcpwm]")
// -------------------------------------------------------------------------------------
#if SOC_PCNT_SUPPORTED
static void mcpwm_start_stop_test(mcpwm_unit_t unit, mcpwm_timer_t timer)
{
uint32_t pulse_number = 0;
@@ -244,6 +251,7 @@ TEST_CASE("MCPWM start and stop test", "[mcpwm]")
}
}
}
#endif // SOC_PCNT_SUPPORTED
// -------------------------------------------------------------------------------------
@@ -276,6 +284,7 @@ TEST_CASE("MCPWM deadtime test", "[mcpwm]")
}
// -------------------------------------------------------------------------------------
#if SOC_PCNT_SUPPORTED
#define TEST_CARRIER_FREQ 250000
static void mcpwm_carrier_test(mcpwm_unit_t unit, mcpwm_timer_t timer, mcpwm_carrier_out_ivt_t invert_or_not,
uint8_t period, uint8_t duty, uint8_t os_width)
@@ -315,6 +324,7 @@ TEST_CASE("MCPWM carrier test", "[mcpwm]")
}
}
}
#endif // SOC_PCNT_SUPPORTED
// -------------------------------------------------------------------------------------