diff --git a/components/driver/i2s.c b/components/driver/i2s.c
index ee8b5d9bac..2d6e3ae02f 100644
--- a/components/driver/i2s.c
+++ b/components/driver/i2s.c
@@ -38,6 +38,7 @@
 #include "esp_attr.h"
 #include "esp_log.h"
 #include "esp_pm.h"
+#include "soc/chip_revision.h"
 #include "hal/efuse_hal.h"
 #include "esp_rom_gpio.h"
 
@@ -192,7 +193,7 @@ static float i2s_apll_get_fi2s(int bits_per_sample, int sdm0, int sdm1, int sdm2
 
 #if CONFIG_IDF_TARGET_ESP32
     /* ESP32 rev0 silicon issue for APLL range/accuracy, please see ESP32 ECO document for more information on this */
-    if (efuse_hal_get_major_chip_version() == 0) {
+    if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 100)) {
         sdm0 = 0;
         sdm1 = 0;
     }
diff --git a/components/esp_hw_support/port/esp32/rtc_clk.c b/components/esp_hw_support/port/esp32/rtc_clk.c
index 8069d002ba..64196d2002 100644
--- a/components/esp_hw_support/port/esp32/rtc_clk.c
+++ b/components/esp_hw_support/port/esp32/rtc_clk.c
@@ -288,7 +288,7 @@ void rtc_clk_apll_enable(bool enable, uint32_t sdm0, uint32_t sdm1, uint32_t sdm
 
     if (enable) {
         uint8_t sdm_stop_val_2 = APLL_SDM_STOP_VAL_2_REV1;
-        if (efuse_hal_get_major_chip_version() == 0) {
+        if (!ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 100)) {
             sdm0 = 0;
             sdm1 = 0;
             sdm_stop_val_2 = APLL_SDM_STOP_VAL_2_REV0;