Merge branch 'feature/support_touch_on_p4_eco5' into 'master'

feat(touch): support touch sensor on p4 eco5

Closes IDF-13423 and IDF-13424

See merge request espressif/esp-idf!41802
This commit is contained in:
Kevin (Lao Kaiyao)
2025-09-16 10:06:44 +08:00
11 changed files with 204 additions and 59 deletions

View File

@@ -19,6 +19,12 @@
extern "C" {
#endif
/**
* @brief The auto trigger rise count
* @note If the trigger_rise_cnt is '0', the recommended value will be selected automatically.
*/
#define TOUCH_SENSOR_AUTO_TRIGGER_RISE_CNT 0
/**
* @brief Helper macro to the default configurations of the touch sensor controller
*
@@ -32,6 +38,7 @@ extern "C" {
.max_meas_time_us = 0, \
.output_mode = TOUCH_PAD_OUT_AS_CLOCK, \
.sample_cfg_num = sample_cfg_number, \
.trigger_rise_cnt = TOUCH_SENSOR_AUTO_TRIGGER_RISE_CNT, \
.sample_cfg = sample_cfg_array, \
}
@@ -52,7 +59,6 @@ extern "C" {
.low_drv = fine_freq_tune, \
.high_drv = coarse_freq_tune, \
.bias_volt = 5, \
.bypass_shield_output = false, \
}
/**
@@ -74,7 +80,6 @@ extern "C" {
.low_drv = fine_freq_tune, \
.high_drv = coarse_freq_tune, \
.bias_volt = 5, \
.bypass_shield_output = false, \
}
/**
@@ -118,7 +123,6 @@ typedef struct {
uint8_t low_drv; /*!< Low speed touch driver, only effective when high speed driver is disabled */
uint8_t high_drv; /*!< High speed touch driver */
uint8_t bias_volt; /*!< The Internal LDO voltage, which decide the bias voltage of the sample wave, range [0,15] */
bool bypass_shield_output; /*!< Whether to bypass the shield output, enable when the charging/discharging rate greater than 10MHz */
} touch_sensor_sample_config_t;
/**
@@ -134,6 +138,11 @@ typedef struct {
*/
touch_out_mode_t output_mode; /*!< Touch channel counting mode of the binarized touch output */
uint32_t sample_cfg_num; /*!< The sample configuration number that used for sampling, CANNOT exceed TOUCH_SAMPLE_CFG_NUM */
uint32_t trigger_rise_cnt; /*!< The counter of triggered frequency points to judge whether a channel active.
* For example, there are 3 sample configurations activated, and the trigger_rise_cnt is 2,
* then the channel will only be active when at least 2 of 3 sample configurations triggered.
* Range: [0 ~ sample_cfg_num], '0' means select the recommended value automatically.
*/
touch_sensor_sample_config_t *sample_cfg; /*!< The array of this sample configuration configurations, the length should be specified in `touch_sensor_config_t::sample_cfg_num` */
} touch_sensor_config_t;
@@ -426,7 +435,10 @@ typedef struct {
*
*/
typedef struct {
bool do_reset; /*!< Whether to reset the benchmark to the channel's latest smooth data */
bool do_reset; /*!< Whether to reset the benchmark to the channel's latest smooth data, conflict with `do_force_update` */
bool do_force_update; /*!< Whether to force update the benchmark to the specified value, conflict with `do_reset` */
uint32_t benchmark; /*!< The specified benchmark value to update, only available when `do_force_update` is true */
uint32_t sample_cfg_id; /*!< The sample configuration index to update the benchmark, only available when `do_force_update` is true */
} touch_chan_benchmark_config_t;
#ifdef __cplusplus

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@@ -137,6 +137,12 @@ static esp_err_t s_touch_convert_to_hal_config(touch_sensor_handle_t sens_handle
"at least one sample configuration required");
ESP_RETURN_ON_FALSE(sens_cfg->sample_cfg_num <= TOUCH_SAMPLE_CFG_NUM, ESP_ERR_INVALID_ARG, TAG,
"at most %d sample configurations supported", (int)(TOUCH_SAMPLE_CFG_NUM));
ESP_RETURN_ON_FALSE(sens_cfg->trigger_rise_cnt <= sens_cfg->sample_cfg_num, ESP_ERR_INVALID_ARG, TAG,
"trigger_rise_cnt should within 0 ~ sample_cfg_num");
#if CONFIG_IDF_TARGET_ESP32P4 && CONFIG_ESP_REV_MIN_FULL < 300
ESP_RETURN_ON_FALSE(sens_cfg->trigger_rise_cnt < 2, ESP_ERR_INVALID_ARG, TAG,
"this target do not support trigger_rise_cnt > 1");
#endif
/* Get the source clock frequency for the first time */
if (!sens_handle->src_freq_hz) {
@@ -161,6 +167,7 @@ static esp_err_t s_touch_convert_to_hal_config(touch_sensor_handle_t sens_handle
ESP_RETURN_ON_FALSE(hal_cfg->timeout_ticks <= TOUCH_LL_TIMEOUT_MAX, ESP_ERR_INVALID_ARG, TAG,
"max_meas_time_ms should within %"PRIu32, TOUCH_LL_TIMEOUT_MAX / src_freq_mhz);
hal_cfg->sample_cfg_num = sens_cfg->sample_cfg_num;
hal_cfg->trigger_rise_cnt = sens_cfg->trigger_rise_cnt ? sens_cfg->trigger_rise_cnt : (sens_cfg->sample_cfg_num == 1 ? 1 : 2);
hal_cfg->output_mode = sens_cfg->output_mode;
for (uint32_t smp_cfg_id = 0; smp_cfg_id < sens_cfg->sample_cfg_num; smp_cfg_id++) {
@@ -317,9 +324,17 @@ esp_err_t touch_channel_config_benchmark(touch_channel_handle_t chan_handle, con
{
TOUCH_NULL_POINTER_CHECK_ISR(chan_handle);
TOUCH_NULL_POINTER_CHECK_ISR(benchmark_cfg);
#if CONFIG_IDF_TARGET_ESP32P4 && CONFIG_ESP_REV_MIN_FULL < 300
ESP_RETURN_ON_FALSE_ISR(!benchmark_cfg->do_force_update, ESP_ERR_INVALID_ARG, TAG, "this target do not support force update benchmark");
#else
ESP_RETURN_ON_FALSE_ISR(benchmark_cfg->do_reset != benchmark_cfg->do_force_update, ESP_ERR_INVALID_ARG, TAG, "do_reset and do_force_update cannot be both true");
#endif
if (benchmark_cfg->do_reset) {
touch_ll_reset_chan_benchmark(BIT(chan_handle->id));
}
if (benchmark_cfg->do_force_update) {
touch_ll_force_update_benchmark(chan_handle->id, benchmark_cfg->sample_cfg_id, benchmark_cfg->benchmark);
}
return ESP_OK;
}

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@@ -25,6 +25,7 @@
#include "soc/pmu_struct.h"
#include "soc/soc_caps.h"
#include "hal/touch_sens_types.h"
#include "hal/config.h"
#ifdef __cplusplus
extern "C" {
@@ -586,6 +587,18 @@ static inline uint32_t touch_ll_sample_cfg_get_engaged_num(void)
return sample_cfg_num ? sample_cfg_num : 1;
}
/**
* Set the number of trigger rise count (only available since P4 ver3)
*
* @param rise_cnt Configure the number of hit frequency points that need to be determined for touch
* in frequency hopping mode.
*/
static inline void touch_ll_sample_cfg_set_trigger_rise_cnt(uint8_t rise_cnt)
{
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
LP_ANA_PERI.touch_ctrl.freq_scan_cnt_rise = rise_cnt;
#endif
}
/**
* Set capacitance and resistance of the RC filter of the sampling frequency.
@@ -615,18 +628,6 @@ static inline void touch_ll_sample_cfg_set_driver(uint8_t sample_cfg_id, uint32_
LP_ANA_PERI.touch_freq_scan_para[sample_cfg_id].touch_freq_drv_hs = hs_drv;
}
/**
* Bypass the shield channel output for the specify sample configuration
*
* @param sample_cfg_id The sample configuration index
* @param enable Set true to bypass the shield channel output for the current channel
*/
static inline void touch_ll_sample_cfg_bypass_shield_output(uint8_t sample_cfg_id, bool enable)
{
HAL_ASSERT(sample_cfg_id < SOC_TOUCH_SAMPLE_CFG_NUM);
LP_ANA_PERI.touch_freq_scan_para[sample_cfg_id].touch_bypass_shield = enable;
}
/**
* Set the touch internal LDO bias voltage of the sampling frequency
*
@@ -753,13 +754,19 @@ static inline void touch_ll_filter_enable(bool enable)
}
/**
* Force the update the benchmark by software
* Force the update the benchmark by software (only available since P4 ver3)
* @note This benchmark will be applied to all enabled channel and all sampling frequency
*
* @param pad_num The pad number, range [1-14]
* @param sample_cfg_id The sample configuration index, range [0-2]
* @param benchmark The benchmark specified by software
*/
static inline void touch_ll_force_update_benchmark(uint32_t benchmark)
static inline void touch_ll_force_update_benchmark(uint32_t pad_num, uint8_t sample_cfg_id, uint32_t benchmark)
{
#if HAL_CONFIG(CHIP_SUPPORT_MIN_REV) >= 300
LP_ANA_PERI.touch_ctrl.touch_update_benchmark_pad_sel = pad_num;
LP_ANA_PERI.touch_ctrl.touch_update_benchmark_freq_sel = sample_cfg_id;
#endif
HAL_FORCE_MODIFY_U32_REG_FIELD(LP_ANA_PERI.touch_filter3, touch_benchmark_sw, benchmark);
LP_ANA_PERI.touch_filter3.touch_update_benchmark_sw = 1;
// waiting for update

View File

@@ -105,8 +105,13 @@ typedef struct {
* of the sample configurations below.
*/
touch_out_mode_t output_mode; /*!< Touch channel counting mode of the binarized touch output */
#endif // SOC_TOUCH_SENSOR_VERSION == 3
#endif // SOC_TOUCH_SENSOR_VERSION == 3
uint32_t sample_cfg_num; /*!< The sample configuration number that used for sampling */
uint32_t trigger_rise_cnt; /*!< The counter of triggered frequency points to judge whether a channel active.
* For example, there are 3 sample configurations activated, and the trigger_rise_cnt is 2,
* then the channel will only be active when at least 2 of 3 sample configurations triggered.
* Range: [0 ~ sample_cfg_num], '0' means select the recommended value automatically.
*/
touch_hal_sample_config_t *sample_cfg; /*!< The array of the sample configuration configurations, the length should be specified in `touch_hal_sample_config_t::sample_cfg_num` */
} touch_hal_config_t;

View File

@@ -47,13 +47,13 @@ void touch_hal_config_controller(const touch_hal_config_t *cfg)
touch_ll_sleep_set_channel_num(TOUCH_LL_NULL_CHANNEL);
touch_ll_set_timeout(cfg->timeout_ticks);
touch_ll_sample_cfg_set_engaged_num(cfg->sample_cfg_num);
touch_ll_sample_cfg_set_trigger_rise_cnt(cfg->trigger_rise_cnt);
touch_ll_set_out_mode(cfg->output_mode);
for (int i = 0; i < cfg->sample_cfg_num; i++) {
touch_ll_set_clock_div(i, cfg->sample_cfg[i].div_num);
touch_ll_set_charge_times(i, cfg->sample_cfg[i].charge_times);
touch_ll_sample_cfg_set_rc_filter(i, cfg->sample_cfg[i].rc_filter_cap, cfg->sample_cfg[i].rc_filter_res);
touch_ll_sample_cfg_set_driver(i, cfg->sample_cfg[i].low_drv, cfg->sample_cfg[i].high_drv);
touch_ll_sample_cfg_bypass_shield_output(i, cfg->sample_cfg[i].bypass_shield_output);
touch_ll_sample_cfg_set_bias_voltage(i, cfg->sample_cfg[i].bias_volt);
}
#else

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@@ -11,8 +11,6 @@
extern "C" {
#endif
// TODO: IDF-13424
/** LP_ANALOG_PERI_BOD_MODE0_CNTL_REG register
* need_des
*/
@@ -199,6 +197,18 @@ extern "C" {
#define LP_ANALOG_PERI_VDDBAT_CHARGE_UNDERVOLTAGE_TARGET_V 0x000003FFU
#define LP_ANALOG_PERI_VDDBAT_CHARGE_UNDERVOLTAGE_TARGET_S 22
/** LP_ANALOG_PERI_CK_GLITCH_CNTL_REG register
* need_des
*/
#define LP_ANALOG_PERI_CK_GLITCH_CNTL_REG (DR_REG_LP_ANALOG_PERI_BASE + 0x14)
/** LP_ANALOG_PERI_CK_GLITCH_RESET_ENA : R/W; bitpos: [31]; default: 0;
* need_des
*/
#define LP_ANALOG_PERI_CK_GLITCH_RESET_ENA (BIT(31))
#define LP_ANALOG_PERI_CK_GLITCH_RESET_ENA_M (LP_ANALOG_PERI_CK_GLITCH_RESET_ENA_V << LP_ANALOG_PERI_CK_GLITCH_RESET_ENA_S)
#define LP_ANALOG_PERI_CK_GLITCH_RESET_ENA_V 0x00000001U
#define LP_ANALOG_PERI_CK_GLITCH_RESET_ENA_S 31
/** LP_ANALOG_PERI_PG_GLITCH_CNTL_REG register
* need_des
*/
@@ -223,8 +233,6 @@ extern "C" {
#define LP_ANALOG_PERI_ANA_FIB_ENA_V 0xFFFFFFFFU
#define LP_ANALOG_PERI_ANA_FIB_ENA_S 0
#define LP_ANALOG_PERI_LP_ANA_FIB_BOD_RST BIT(1)
/** LP_ANALOG_PERI_INT_RAW_REG register
* need_des
*/
@@ -1595,11 +1603,38 @@ extern "C" {
#define LP_ANALOG_PERI_TOUCH_PAD14_TH2_V 0x0000FFFFU
#define LP_ANALOG_PERI_TOUCH_PAD14_TH2_S 16
/** LP_ANALOG_PERI_TOUCH_CTRL_REG register
* Touch Control Register
*/
#define LP_ANALOG_PERI_TOUCH_CTRL_REG (DR_REG_LP_ANALOG_PERI_BASE + 0x1fc)
/** LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL : R/W; bitpos: [1:0]; default: 0;
* Configure the frequency point for software to update the baseline
*/
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL 0x00000003U
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL_M (LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL_V << LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL_S)
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL_V 0x00000003U
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_FREQ_SEL_S 0
/** LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL : R/W; bitpos: [5:2]; default: 0;
* Configure the channel for software to update the baseline.
*/
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL 0x0000000FU
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL_M (LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL_V << LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL_S)
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL_V 0x0000000FU
#define LP_ANALOG_PERI_TOUCH_UPDATE_BENCHMARK_PAD_SEL_S 2
/** LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE : R/W; bitpos: [7:6]; default: 1;
* Configure the number of hit frequency points that need to be determined for touch
* in frequency hopping mode.
*/
#define LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE 0x00000003U
#define LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE_M (LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE_V << LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE_S)
#define LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE_V 0x00000003U
#define LP_ANALOG_PERI_FREQ_SCAN_CNT_RISE_S 6
/** LP_ANALOG_PERI_DATE_REG register
* need_des
*/
#define LP_ANALOG_PERI_DATE_REG (DR_REG_LP_ANALOG_PERI_BASE + 0x3fc)
/** LP_ANALOG_PERI_LP_ANALOG_PERI_DATE : R/W; bitpos: [30:0]; default: 2294816;
/** LP_ANALOG_PERI_LP_ANALOG_PERI_DATE : R/W; bitpos: [30:0]; default: 2425376;
* need_des
*/
#define LP_ANALOG_PERI_LP_ANALOG_PERI_DATE 0x7FFFFFFFU

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@@ -10,8 +10,6 @@
extern "C" {
#endif
// TODO: IDF-13424
/** Group: configure_register */
/** Type of bod_mode0_cntl register
* need_des
@@ -154,6 +152,20 @@ typedef union {
uint32_t val;
} lp_analog_peri_vddbat_charge_cntl_reg_t;
/** Type of ck_glitch_cntl register
* need_des
*/
typedef union {
struct {
uint32_t reserved_0:31;
/** ck_glitch_reset_ena : R/W; bitpos: [31]; default: 0;
* need_des
*/
uint32_t ck_glitch_reset_ena:1;
};
uint32_t val;
} lp_analog_peri_ck_glitch_cntl_reg_t;
/** Type of pg_glitch_cntl register
* need_des
*/
@@ -692,14 +704,10 @@ typedef union {
* High speed touch driver
*/
uint32_t touch_freq_drv_hs:5;
/** touch_bypass_shield : R/W; bitpos: [18]; default: 0;
* bypass the shield channel output (only available since ECO1)
*/
uint32_t touch_bypass_shield:1;
/** touch_freq_dbias : R/W; bitpos: [22:19]; default: 0;
/** touch_freq_dbias : R/W; bitpos: [22:18]; default: 0;
* Internal LDO voltage
*/
uint32_t touch_freq_dbias:4;
uint32_t touch_freq_dbias:5;
uint32_t reserved_23:9;
};
uint32_t val;
@@ -799,7 +807,7 @@ typedef union {
uint32_t val;
} lp_analog_peri_touch_mux1_reg_t;
/** Type of touch_pad0_th0 register
/** Type of touch_pad_thn register
* need_des
*/
typedef union {
@@ -813,12 +821,35 @@ typedef union {
uint32_t val;
} lp_analog_peri_touch_pad_thn_reg_t;
/** Type of touch_ctrl register
* Touch Control Register
*/
typedef union {
struct {
/** touch_update_benchmark_freq_sel : R/W; bitpos: [1:0]; default: 0;
* Configure the frequency point for software to update the benchmark
*/
uint32_t touch_update_benchmark_freq_sel:2;
/** touch_update_benchmark_pad_sel : R/W; bitpos: [5:2]; default: 0;
* Configure the channel for software to update the benchmark.
*/
uint32_t touch_update_benchmark_pad_sel:4;
/** freq_scan_cnt_rise : R/W; bitpos: [7:6]; default: 1;
* Configure the number of hit frequency points that need to be determined for touch
* in frequency hopping mode.
*/
uint32_t freq_scan_cnt_rise:2;
uint32_t reserved_8:24;
};
uint32_t val;
} lp_analog_peri_touch_ctrl_reg_t;
/** Type of date register
* need_des
*/
typedef union {
struct {
/** lp_analog_peri_date : R/W; bitpos: [30:0]; default: 2294816;
/** lp_analog_peri_date : R/W; bitpos: [30:0]; default: 2425376;
* need_des
*/
uint32_t lp_analog_peri_date:31;
@@ -841,7 +872,7 @@ typedef struct {
volatile lp_analog_peri_vdd_source_cntl_reg_t vdd_source_cntl;
volatile lp_analog_peri_vddbat_bod_cntl_reg_t vddbat_bod_cntl;
volatile lp_analog_peri_vddbat_charge_cntl_reg_t vddbat_charge_cntl;
uint32_t reserved_014;
volatile lp_analog_peri_ck_glitch_cntl_reg_t ck_glitch_cntl;
volatile lp_analog_peri_pg_glitch_cntl_reg_t pg_glitch_cntl;
volatile lp_analog_peri_fib_enable_reg_t fib_enable;
volatile lp_analog_peri_int_raw_reg_t int_raw;
@@ -870,7 +901,9 @@ typedef struct {
volatile lp_analog_peri_touch_mux0_reg_t touch_mux0;
volatile lp_analog_peri_touch_mux1_reg_t touch_mux1;
volatile lp_analog_peri_touch_padx_thn_reg_t touch_padx_thn[15];
uint32_t reserved_1f8[129];
uint32_t reserved_1f8;
volatile lp_analog_peri_touch_ctrl_reg_t touch_ctrl;
uint32_t reserved_200[127];
volatile lp_analog_peri_date_reg_t date;
} lp_analog_peri_dev_t;

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@@ -11,8 +11,6 @@
extern "C" {
#endif
// TODO: IDF-13423
/** RTC_TOUCH_INT_RAW_REG register
* need_des
*/
@@ -59,6 +57,13 @@ extern "C" {
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_RAW_M (RTC_TOUCH_APPROACH_LOOP_DONE_INT_RAW_V << RTC_TOUCH_APPROACH_LOOP_DONE_INT_RAW_S)
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_RAW_V 0x00000001U
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_RAW_S 5
/** RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW : R/WTC/SS; bitpos: [6]; default: 0;
* need_des
*/
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW (BIT(6))
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW_M (RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW_V << RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW_S)
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW_V 0x00000001U
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_RAW_S 6
/** RTC_TOUCH_INT_ST_REG register
* need_des
@@ -106,6 +111,13 @@ extern "C" {
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ST_M (RTC_TOUCH_APPROACH_LOOP_DONE_INT_ST_V << RTC_TOUCH_APPROACH_LOOP_DONE_INT_ST_S)
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ST_V 0x00000001U
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ST_S 5
/** RTC_TOUCH_BENCHMARK_UPDATE_INT_ST : RO; bitpos: [6]; default: 0;
* need_des
*/
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ST (BIT(6))
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ST_M (RTC_TOUCH_BENCHMARK_UPDATE_INT_ST_V << RTC_TOUCH_BENCHMARK_UPDATE_INT_ST_S)
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ST_V 0x00000001U
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ST_S 6
/** RTC_TOUCH_INT_ENA_REG register
* need_des
@@ -153,6 +165,13 @@ extern "C" {
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ENA_M (RTC_TOUCH_APPROACH_LOOP_DONE_INT_ENA_V << RTC_TOUCH_APPROACH_LOOP_DONE_INT_ENA_S)
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ENA_V 0x00000001U
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_ENA_S 5
/** RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA : R/W; bitpos: [6]; default: 0;
* need_des
*/
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA (BIT(6))
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA_M (RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA_V << RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA_S)
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA_V 0x00000001U
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_ENA_S 6
/** RTC_TOUCH_INT_CLR_REG register
* need_des
@@ -200,6 +219,13 @@ extern "C" {
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_CLR_M (RTC_TOUCH_APPROACH_LOOP_DONE_INT_CLR_V << RTC_TOUCH_APPROACH_LOOP_DONE_INT_CLR_S)
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_CLR_V 0x00000001U
#define RTC_TOUCH_APPROACH_LOOP_DONE_INT_CLR_S 5
/** RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR : WT; bitpos: [6]; default: 0;
* need_des
*/
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR (BIT(6))
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR_M (RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR_V << RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR_S)
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR_V 0x00000001U
#define RTC_TOUCH_BENCHMARK_UPDATE_INT_CLR_S 6
/** RTC_TOUCH_CHN_STATUS_REG register
* need_des
@@ -219,7 +245,7 @@ extern "C" {
#define RTC_TOUCH_MEAS_DONE_M (RTC_TOUCH_MEAS_DONE_V << RTC_TOUCH_MEAS_DONE_S)
#define RTC_TOUCH_MEAS_DONE_V 0x00000001U
#define RTC_TOUCH_MEAS_DONE_S 15
/** RTC_TOUCH_SCAN_CURR : RO; bitpos: [19:16]; default: 0;
/** RTC_TOUCH_SCAN_CURR : RO; bitpos: [19:16]; default: 15;
* need_des
*/
#define RTC_TOUCH_SCAN_CURR 0x0000000FU
@@ -746,13 +772,6 @@ extern "C" {
* need_des
*/
#define RTC_TOUCH_DATE_REG (DR_REG_LP_TOUCH_BASE + 0x100)
/** RTC_TOUCH_DATE : R/W; bitpos: [27:0]; default: 2294548;
* need_des
*/
#define RTC_TOUCH_DATE 0x0FFFFFFFU
#define RTC_TOUCH_DATE_M (RTC_TOUCH_DATE_V << RTC_TOUCH_DATE_S)
#define RTC_TOUCH_DATE_V 0x0FFFFFFFU
#define RTC_TOUCH_DATE_S 0
/** RTC_TOUCH_CLK_EN : R/W; bitpos: [31]; default: 0;
* need_des
*/

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@@ -10,8 +10,6 @@
extern "C" {
#endif
// TODO: IDF-13423
/** Group: configure_register */
/** Type of int_raw register
* need_des
@@ -42,7 +40,11 @@ typedef union {
* need_des
*/
uint32_t approach_loop_done_int_raw:1;
uint32_t reserved_6:26;
/** benchmark_update_int_raw : R/WTC/SS; bitpos: [6]; default: 0;
* need_des
*/
uint32_t benchmark_update_int_raw:1;
uint32_t reserved_7:25;
};
uint32_t val;
} rtc_touch_int_raw_reg_t;
@@ -76,7 +78,11 @@ typedef union {
* need_des
*/
uint32_t approach_loop_done_int_st:1;
uint32_t reserved_6:26;
/** benchmark_update_int_st : RO; bitpos: [6]; default: 0;
* need_des
*/
uint32_t benchmark_update_int_st:1;
uint32_t reserved_7:25;
};
uint32_t val;
} rtc_touch_int_st_reg_t;
@@ -110,7 +116,11 @@ typedef union {
* need_des
*/
uint32_t approach_loop_done_int_ena:1;
uint32_t reserved_6:26;
/** benchmark_update_int_ena : R/W; bitpos: [6]; default: 0;
* need_des
*/
uint32_t benchmark_update_int_ena:1;
uint32_t reserved_7:25;
};
uint32_t val;
} rtc_touch_int_ena_reg_t;
@@ -144,7 +154,11 @@ typedef union {
* need_des
*/
uint32_t approach_loop_done_int_clr:1;
uint32_t reserved_6:26;
/** benchmark_update_int_clr : WT; bitpos: [6]; default: 0;
* need_des
*/
uint32_t benchmark_update_int_clr:1;
uint32_t reserved_7:25;
};
uint32_t val;
} rtc_touch_int_clr_reg_t;
@@ -162,7 +176,7 @@ typedef union {
* need_des
*/
uint32_t meas_done:1;
/** scan_curr : RO; bitpos: [19:16]; default: 0;
/** scan_curr : RO; bitpos: [19:16]; default: 15;
* need_des
*/
uint32_t scan_curr:4;
@@ -299,11 +313,7 @@ typedef union {
*/
typedef union {
struct {
/** date : R/W; bitpos: [27:0]; default: 2294548;
* need_des
*/
uint32_t date:28;
uint32_t reserved_28:3;
uint32_t reserved_0:31;
/** clk_en : R/W; bitpos: [31]; default: 0;
* need_des
*/

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@@ -195,3 +195,8 @@ Touch Element
The ``touch_element`` component is moved to [ESP Component Registry](https://components.espressif.com/components/espressif/touch_element/versions/1.0.0/readme).
You can add this dependency to your project by running ``idf.py add-dependency "espressif/touch_element"``.
Touch Sensor
------------
The ``touch_sensor_sample_config_t::bypass_shield_output`` member for version 3 touch sensor has been removed because it is not supported in the version 3 hardware.

View File

@@ -196,3 +196,7 @@ Touch Element
您可以通过运行 ``idf.py add-dependency "espressif/touch_element"`` 将这个依赖添加到您的项目中。
Touch Sensor
------------
第三版触摸传感器的驱动配置项 ``touch_sensor_sample_config_t::bypass_shield_output`` 已被移除,因为第三版触摸传感器硬件已不支持该功能。